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Re: Synchronizing auxiliary mutex data
On Jun 21 2017, Alexander Monakov <firstname.lastname@example.org> wrote:
> Inside LLL_MUTEX_LOCK there's an atomic operation with acquire memory ordering.
> The compiler and the hardware are responsible, together, for ensuring proper
> ordering: the compiler may not move the load of __owner up prior to that atomic
> operation, and must emit machine code that will cause the CPU to keep the
> ordering at runtime (on some architectures, e.g. ARM, this implies emitting memory
> barrier instructions, but on x86 the atomic operation will be a lock-prefixed
> memory operation, enforcing proper ordering on its own).
Does that mean that an atomic operation flushes the cpu caches?
Andreas Schwab, SUSE Labs, email@example.com
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