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[PATCH v2] mips: Fix store/load gp registers to/from ucontext_t
- From: Gordana Cmiljanovic <Gordana dot Cmiljanovic at imgtec dot com>
- To: Joseph Myers <joseph at codesourcery dot com>
- Cc: "libc-alpha at sourceware dot org" <libc-alpha at sourceware dot org>, Petar Jovanovic <Petar dot Jovanovic at imgtec dot com>
- Date: Wed, 7 Jun 2017 19:24:32 +0000
- Subject: [PATCH v2] mips: Fix store/load gp registers to/from ucontext_t
- Authentication-results: sourceware.org; auth=none
I tried to use debian scripts for building glibc 2.24-10: fakeroot debian/rules binary-arch
but they did not finish successfully (even without the patch).
Ended up with manually building for all three ABIs for LE and BE and here is the status:
mips o32 (LE + BE): test bug-getcontext-mips-gp failed without the patch and passed with the patch. There are no regressions introduced with the patch.
mips n32, mips n64 (LE + BE): stripped installed library with: strip --strip-unneeded libc-2.25.90.so
but the libraries are not identical. The difference is caused by two new symbols (MCONTEXT_GREGSZ and MCONTEXT_GREGOFF) in the GOT table, so the offsets for symbols below them are changed.
So, there are changes like this one throughout the code:
3c1e0: df83a858 ld v1,-22440(gp)
turns into:
3c1e0: df83a850 ld v1,-22448(gp)
Just to note: objdump of four modified functions is identical.
In case this is not sufficient, is there glibc build/test infrastructure that could run tests on mips n32/n64?
Also to mention that I run tst-sigcontext.c (from https://sourceware.org/bugzilla/attachment.cgi?id=4480) and it did not detect this issue.
Regards,
Gordana
________________________________________
From: Joseph Myers [joseph@codesourcery.com]
Sent: Thursday, May 18, 2017 7:51 PM
To: Gordana Cmiljanovic
Cc: libc-alpha@sourceware.org; Petar Jovanovic
Subject: RE: [PATCH] mips: Fix store/load gp registers to/from ucontext_t
On Thu, 18 May 2017, Gordana Cmiljanovic wrote:
> I have a simple test case which manifests getcontext() failure but since
> it is mips only test I was not sure where to add it. Do you have any
> suggestion?
It could be added to e.g. sysdeps/unix/sysv/linux/mips/ (or .../mips32/ if
o32-specific). Such a file would need to have a clearly MIPS-specific
name so it can't conflict with any architecture-independent test. The
appropriate sysdeps Makefile would need to add it to tests, conditional on
the value of $(subdir).
> I would say that mips N32 and mips64 are not affected by the change,
> since SZREG for them is 8 as per:
They shouldn't be affected - but to make sure there aren't any bugs in the
change that accidentally affect them, stripped installed shared libraries
before and after the change should be compared for all combinations of n32
or n64, BE or LE (the binaries should be identical).
--
Joseph S. Myers
joseph@codesourcery.com
General purpose registers in mcontext_t structure
are 8 bytes long for both MIPS32/MIPS64.
get/set/make/swap context implementations for MIPS O32
incorrectly assume that general purpose registers
in this structure are 4 bytes long.
This patch is fixing that.
Tested for MIPS O32 LE and BE.
Compared objdump of modified functions for mips n32 and mips n64.
2017-06-02 Gordana Cmiljanovic <gordana.cmiljanovic@imgtec.com>
[BZ #21548]
* sysdeps/unix/sysv/linux/mips/getcontext.S: Define MCONTEXT_SZGREG as
8 and use it when copying general purpose registers.
* sysdeps/unix/sysv/linux/mips/makecontext.S: Likewise.
* sysdeps/unix/sysv/linux/mips/mips32/Makefile: Include new test for
mips o32.
* sysdeps/unix/sysv/linux/mips/mips32/bug-getcontext-mips-gp.c: Added
new test for mips o32.
* sysdeps/unix/sysv/linux/mips/setcontext.S: Define MCONTEXT_SZGREG as
8 and use it when copying general purpose registers.
* sysdeps/unix/sysv/linux/mips/swapcontext.S: Likewise.
diff --git a/sysdeps/unix/sysv/linux/mips/getcontext.S b/sysdeps/unix/sysv/linux/mips/getcontext.S
index 64de2eb..8e56f86 100644
--- a/sysdeps/unix/sysv/linux/mips/getcontext.S
+++ b/sysdeps/unix/sysv/linux/mips/getcontext.S
@@ -38,6 +38,12 @@ MASK = 0x10000000
#endif
FRAMESZ = ((LOCALSZ * SZREG) + ALSZ) & ALMASK
GPOFF = FRAMESZ - (1 * SZREG)
+MCONTEXT_GREGSZ = 8
+# if _MIPS_SIM == _ABIO32 && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+MCONTEXT_GREGOFF = 4
+# else
+MCONTEXT_GREGOFF = 0
+# endif
NESTED (__getcontext, FRAMESZ, ra)
.mask MASK, 0
@@ -74,23 +80,24 @@ NESTED (__getcontext, FRAMESZ, ra)
/* Store a magic flag. */
li v1, 1
- REG_S v1, (0 * SZREG + MCONTEXT_GREGS)(a0) /* zero */
-
- REG_S s0, (16 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S s1, (17 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S s2, (18 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S s3, (19 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S s4, (20 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S s5, (21 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S s6, (22 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S s7, (23 * SZREG + MCONTEXT_GREGS)(a0)
+ /* zero */
+ REG_S v1, (MCONTEXT_GREGOFF + 0 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+
+ REG_S s0, (MCONTEXT_GREGOFF + 16 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S s1, (MCONTEXT_GREGOFF + 17 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S s2, (MCONTEXT_GREGOFF + 18 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S s3, (MCONTEXT_GREGOFF + 19 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S s4, (MCONTEXT_GREGOFF + 20 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S s5, (MCONTEXT_GREGOFF + 21 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S s6, (MCONTEXT_GREGOFF + 22 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S s7, (MCONTEXT_GREGOFF + 23 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
#if ! defined (__PIC__) || _MIPS_SIM != _ABIO32
- REG_S _GP, (28 * SZREG + MCONTEXT_GREGS)(a0)
+ REG_S _GP, (MCONTEXT_GREGOFF + 28 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
#endif
- REG_S _SP, (29 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S fp, (30 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S ra, (31 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S ra, MCONTEXT_PC(a0)
+ REG_S _SP, (MCONTEXT_GREGOFF + 29 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S fp, (MCONTEXT_GREGOFF + 30 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S ra, (MCONTEXT_GREGOFF + 31 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S ra, (MCONTEXT_GREGOFF + MCONTEXT_PC)(a0)
#ifdef __mips_hard_float
# if _MIPS_SIM == _ABI64
diff --git a/sysdeps/unix/sysv/linux/mips/makecontext.S b/sysdeps/unix/sysv/linux/mips/makecontext.S
index 5c3af04..83b1299 100644
--- a/sysdeps/unix/sysv/linux/mips/makecontext.S
+++ b/sysdeps/unix/sysv/linux/mips/makecontext.S
@@ -53,6 +53,12 @@ NARGREGS = 8
A3OFF = FRAMESZ + (3 * SZREG) /* caller-allocated */
NARGREGS = 4
#endif
+MCONTEXT_GREGSZ = 8
+# if _MIPS_SIM == _ABIO32 && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+MCONTEXT_GREGOFF = 4
+# else
+MCONTEXT_GREGOFF = 0
+# endif
NESTED (__makecontext, FRAMESZ, ra)
.mask MASK, -(ARGSZ * SZREG)
@@ -89,7 +95,8 @@ NESTED (__makecontext, FRAMESZ, ra)
/* Store a magic flag. */
li v1, 1
- REG_S v1, (0 * SZREG + MCONTEXT_GREGS)(a0) /* zero */
+ /* zero */
+ REG_S v1, (MCONTEXT_GREGOFF + 0 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
/* Set up the stack. */
PTR_L t0, STACK_SP(a0)
@@ -100,14 +107,14 @@ NESTED (__makecontext, FRAMESZ, ra)
blez a2, 2f /* no arguments */
/* Store register arguments. */
- PTR_ADDIU t2, a0, MCONTEXT_GREGS + 4 * SZREG
+ PTR_ADDIU t2, a0, MCONTEXT_GREGS + 4 * MCONTEXT_GREGSZ + MCONTEXT_GREGOFF
move t3, zero
0:
addiu t3, 1
REG_L v1, (t1)
PTR_ADDIU t1, SZREG
REG_S v1, (t2)
- PTR_ADDIU t2, SZREG
+ PTR_ADDIU t2, MCONTEXT_GREGSZ
bgeu t3, a2, 2f /* all done */
bltu t3, NARGREGS, 0b /* next */
@@ -138,13 +145,17 @@ NESTED (__makecontext, FRAMESZ, ra)
#else
PTR_LA t9, 99f
#endif
- REG_S t0, (29 * SZREG + MCONTEXT_GREGS)(a0) /* sp */
- REG_S v1, (16 * SZREG + MCONTEXT_GREGS)(a0) /* s0 */
+ /* sp */
+ REG_S t0, (MCONTEXT_GREGOFF + 29 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ /* s0 */
+ REG_S v1, (MCONTEXT_GREGOFF + 16 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
#ifdef __PIC__
- REG_S gp, (17 * SZREG + MCONTEXT_GREGS)(a0) /* s1 */
+ /* s1 */
+ REG_S gp, (MCONTEXT_GREGOFF + 17 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
#endif
- REG_S t9, (31 * SZREG + MCONTEXT_GREGS)(a0) /* ra */
- REG_S a1, MCONTEXT_PC(a0)
+ /* ra */
+ REG_S t9, (MCONTEXT_GREGOFF + 31 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S a1, (MCONTEXT_GREGOFF + MCONTEXT_PC)(a0)
#ifdef __PIC__
RESTORE_GP64_STACK
diff --git a/sysdeps/unix/sysv/linux/mips/mips32/Makefile b/sysdeps/unix/sysv/linux/mips/mips32/Makefile
index 9439d29..b4b702b 100644
--- a/sysdeps/unix/sysv/linux/mips/mips32/Makefile
+++ b/sysdeps/unix/sysv/linux/mips/mips32/Makefile
@@ -2,3 +2,8 @@ ifeq ($(subdir),conform)
# For bugs 17786 and 21278.
conformtest-xfail-conds += mips-o32-linux
endif
+
+ifeq ($(subdir),stdlib)
+sysdep_routines += getcontext
+tests += bug-getcontext-mips-gp
+endif
diff --git a/sysdeps/unix/sysv/linux/mips/mips32/bug-getcontext-mips-gp.c b/sysdeps/unix/sysv/linux/mips/mips32/bug-getcontext-mips-gp.c
new file mode 100644
index 0000000..c1a9b0a
--- /dev/null
+++ b/sysdeps/unix/sysv/linux/mips/mips32/bug-getcontext-mips-gp.c
@@ -0,0 +1,45 @@
+#include <errno.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <ucontext.h>
+
+
+#if !defined __mips__ || _MIPS_SIM != _ABIO32
+ #error "MIPS O32 specific test."
+#endif
+
+#define SP_REG 29
+
+static int
+do_test (void)
+{
+ ucontext_t ctx;
+ memset(&ctx, 0, sizeof(ctx));
+ int status = getcontext(&ctx);
+ if (status)
+ {
+ printf("\ngetcontext() failed, errno: %d.\n", errno);
+ return 1;
+ }
+
+ if (ctx.uc_mcontext.gregs[SP_REG] == 0 ||
+ ctx.uc_mcontext.gregs[SP_REG] > 0xffffffff)
+ {
+ printf("\nError getcontext(): invalid $sp = 0x%llx.\n",
+ ctx.uc_mcontext.gregs[SP_REG]);
+ return 1;
+ }
+ if (ctx.uc_mcontext.pc == 0 ||
+ ctx.uc_mcontext.pc > 0xffffffff)
+ {
+ printf("\nError getcontext(): invalid ctx.uc_mcontext.pc = 0x%llx.\n",
+ ctx.uc_mcontext.pc);
+ return 1;
+ }
+
+ return 0;
+}
+
+#define TEST_FUNCTION do_test ()
+#include "../test-skeleton.c"
diff --git a/sysdeps/unix/sysv/linux/mips/setcontext.S b/sysdeps/unix/sysv/linux/mips/setcontext.S
index 4e363d9..7a2fb90 100644
--- a/sysdeps/unix/sysv/linux/mips/setcontext.S
+++ b/sysdeps/unix/sysv/linux/mips/setcontext.S
@@ -47,6 +47,12 @@ A0OFF = FRAMESZ - (1 * SZREG) /* callee-allocated */
#else
A0OFF = FRAMESZ + (0 * SZREG) /* caller-allocated */
#endif
+MCONTEXT_GREGSZ = 8
+# if _MIPS_SIM == _ABIO32 && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+MCONTEXT_GREGOFF = 4
+# else
+MCONTEXT_GREGOFF = 0
+# endif
NESTED (__setcontext, FRAMESZ, ra)
.mask MASK, -(ARGSZ * SZREG)
@@ -73,7 +79,8 @@ NESTED (__setcontext, FRAMESZ, ra)
/* Check for the magic flag. */
li v0, 1
- REG_L v1, (0 * SZREG + MCONTEXT_GREGS)(a0) /* zero */
+ /* zero */
+ REG_L v1, (MCONTEXT_GREGOFF + 0 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
bne v0, v1, 98f
REG_S a0, A0OFF(sp)
@@ -117,32 +124,32 @@ NESTED (__setcontext, FRAMESZ, ra)
/* Note the contents of argument registers will be random
unless makecontext() has been called. */
- REG_L a0, (4 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L a1, (5 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L a2, (6 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L a3, (7 * SZREG + MCONTEXT_GREGS)(v0)
+ REG_L a0, (MCONTEXT_GREGOFF + 4 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L a1, (MCONTEXT_GREGOFF + 5 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L a2, (MCONTEXT_GREGOFF + 6 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L a3, (MCONTEXT_GREGOFF + 7 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
#if _MIPS_SIM != _ABIO32
- REG_L a4, (8 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L a5, (9 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L a6, (10 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L a7, (11 * SZREG + MCONTEXT_GREGS)(v0)
+ REG_L a4, (MCONTEXT_GREGOFF + 8 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L a5, (MCONTEXT_GREGOFF + 9 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L a6, (MCONTEXT_GREGOFF + 10 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L a7, (MCONTEXT_GREGOFF + 11 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
#endif
- REG_L s0, (16 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L s1, (17 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L s2, (18 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L s3, (19 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L s4, (20 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L s5, (21 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L s6, (22 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L s7, (23 * SZREG + MCONTEXT_GREGS)(v0)
+ REG_L s0, (MCONTEXT_GREGOFF + 16 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L s1, (MCONTEXT_GREGOFF + 17 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L s2, (MCONTEXT_GREGOFF + 18 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L s3, (MCONTEXT_GREGOFF + 19 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L s4, (MCONTEXT_GREGOFF + 20 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L s5, (MCONTEXT_GREGOFF + 21 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L s6, (MCONTEXT_GREGOFF + 22 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L s7, (MCONTEXT_GREGOFF + 23 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
#if ! defined (__PIC__) || _MIPS_SIM != _ABIO32
- REG_L gp, (28 * SZREG + MCONTEXT_GREGS)(v0)
+ REG_L gp, (MCONTEXT_GREGOFF + 28 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
#endif
- REG_L sp, (29 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L fp, (30 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L ra, (31 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L t9, MCONTEXT_PC(v0)
+ REG_L sp, (MCONTEXT_GREGOFF + 29 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L fp, (MCONTEXT_GREGOFF + 30 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L ra, (MCONTEXT_GREGOFF + 31 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L t9, (MCONTEXT_GREGOFF + MCONTEXT_PC)(v0)
move v0, zero
jr t9
diff --git a/sysdeps/unix/sysv/linux/mips/swapcontext.S b/sysdeps/unix/sysv/linux/mips/swapcontext.S
index fde6e5e..a98747c 100644
--- a/sysdeps/unix/sysv/linux/mips/swapcontext.S
+++ b/sysdeps/unix/sysv/linux/mips/swapcontext.S
@@ -47,6 +47,12 @@ A1OFF = FRAMESZ - (1 * SZREG) /* callee-allocated */
#else
A1OFF = FRAMESZ + (1 * SZREG) /* caller-allocated */
#endif
+MCONTEXT_GREGSZ = 8
+# if _MIPS_SIM == _ABIO32 && __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
+MCONTEXT_GREGOFF = 4
+# else
+MCONTEXT_GREGOFF = 0
+# endif
NESTED (__swapcontext, FRAMESZ, ra)
.mask MASK, -(ARGSZ * SZREG)
@@ -83,23 +89,24 @@ NESTED (__swapcontext, FRAMESZ, ra)
/* Store a magic flag. */
li v1, 1
- REG_S v1, (0 * SZREG + MCONTEXT_GREGS)(a0) /* zero */
-
- REG_S s0, (16 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S s1, (17 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S s2, (18 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S s3, (19 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S s4, (20 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S s5, (21 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S s6, (22 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S s7, (23 * SZREG + MCONTEXT_GREGS)(a0)
+ /* zero */
+ REG_S v1, (MCONTEXT_GREGOFF + 0 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+
+ REG_S s0, (MCONTEXT_GREGOFF + 16 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S s1, (MCONTEXT_GREGOFF + 17 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S s2, (MCONTEXT_GREGOFF + 18 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S s3, (MCONTEXT_GREGOFF + 19 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S s4, (MCONTEXT_GREGOFF + 20 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S s5, (MCONTEXT_GREGOFF + 21 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S s6, (MCONTEXT_GREGOFF + 22 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S s7, (MCONTEXT_GREGOFF + 23 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
#if ! defined (__PIC__) || _MIPS_SIM != _ABIO32
- REG_S _GP, (28 * SZREG + MCONTEXT_GREGS)(a0)
+ REG_S _GP, (MCONTEXT_GREGOFF + 28 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
#endif
- REG_S _SP, (29 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S fp, (30 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S ra, (31 * SZREG + MCONTEXT_GREGS)(a0)
- REG_S ra, MCONTEXT_PC(a0)
+ REG_S _SP, (MCONTEXT_GREGOFF + 29 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S fp, (MCONTEXT_GREGOFF + 30 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S ra, (MCONTEXT_GREGOFF + 31 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(a0)
+ REG_S ra, (MCONTEXT_GREGOFF + MCONTEXT_PC)(a0)
#ifdef __mips_hard_float
# if _MIPS_SIM == _ABI64
@@ -167,32 +174,32 @@ NESTED (__swapcontext, FRAMESZ, ra)
/* Note the contents of argument registers will be random
unless makecontext() has been called. */
- REG_L a0, (4 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L a1, (5 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L a2, (6 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L a3, (7 * SZREG + MCONTEXT_GREGS)(v0)
+ REG_L a0, (MCONTEXT_GREGOFF + 4 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L a1, (MCONTEXT_GREGOFF + 5 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L a2, (MCONTEXT_GREGOFF + 6 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L a3, (MCONTEXT_GREGOFF + 7 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
#if _MIPS_SIM != _ABIO32
- REG_L a4, (8 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L a5, (9 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L a6, (10 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L a7, (11 * SZREG + MCONTEXT_GREGS)(v0)
+ REG_L a4, (MCONTEXT_GREGOFF + 8 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L a5, (MCONTEXT_GREGOFF + 9 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L a6, (MCONTEXT_GREGOFF + 10 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L a7, (MCONTEXT_GREGOFF + 11 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
#endif
- REG_L s0, (16 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L s1, (17 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L s2, (18 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L s3, (19 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L s4, (20 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L s5, (21 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L s6, (22 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L s7, (23 * SZREG + MCONTEXT_GREGS)(v0)
+ REG_L s0, (MCONTEXT_GREGOFF + 16 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L s1, (MCONTEXT_GREGOFF + 17 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L s2, (MCONTEXT_GREGOFF + 18 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L s3, (MCONTEXT_GREGOFF + 19 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L s4, (MCONTEXT_GREGOFF + 20 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L s5, (MCONTEXT_GREGOFF + 21 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L s6, (MCONTEXT_GREGOFF + 22 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L s7, (MCONTEXT_GREGOFF + 23 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
#if ! defined (__PIC__) || _MIPS_SIM != _ABIO32
- REG_L gp, (28 * SZREG + MCONTEXT_GREGS)(v0)
+ REG_L gp, (MCONTEXT_GREGOFF + 28 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
#endif
- REG_L sp, (29 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L fp, (30 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L ra, (31 * SZREG + MCONTEXT_GREGS)(v0)
- REG_L t9, MCONTEXT_PC(v0)
+ REG_L sp, (MCONTEXT_GREGOFF + 29 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L fp, (MCONTEXT_GREGOFF + 30 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L ra, (MCONTEXT_GREGOFF + 31 * MCONTEXT_GREGSZ + MCONTEXT_GREGS)(v0)
+ REG_L t9, (MCONTEXT_GREGOFF + MCONTEXT_PC)(v0)
move v0, zero
jr t9