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Re: arch maintainers: RFC on spinlock refactoring


On 03/09/2017 02:32 PM, Chris Metcalf wrote:
> One thing that's important to note is that the above is all about
> TILE-Gx, our more recent 64-bit processor.  TILEPro, the older 32-bit
> processor, had only a single atomic operation, a "test and set one",
> which everything else is built on top of using kernel fast syscalls to
> provide CAS and various other simple atomic patterns.  I believe this
> is similar to the existing sparc32 atomic support.  As a result, on
> TILEPro you have to use "atomic exchange" (via the kernel fast
> syscall) to implement atomic store, since a plain store can race with
> the kernel implementation of atomics.  This isn't true on TILE-Gx,
> where an atomic store really can be just a plain store operation.

Right, TILEPro is therefore like hppa in this regard, every atomic
operation has to go into the kernel because you have to use the same
set of locks in the kernel to ensure happens-before between the threads.

-- 
Cheers,
Carlos.


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