This patch activates c11 atomic builtins by defining
USE_ATOMIC_COMPILER_BUILTINS to 1.
Note:
E.g. in nptl/pthread_key_delete.c if compiled with GCCs 6 and before,
an extra stack-frame is generated and the old value is stored on stack
before cs instruction but it never loads this value from stack.
An unreleased GCC 7 omit those stack operations.
E.g. in nptl/pthread_once.c the condition code of cs instruction is
evaluated by a sequence of ipm, sra, compare and jump instructions
instead of one conditional jump instruction.
This also occurs with an unreleased GCC 7.
These shortcomings does not really hurt. Nevertheless, the gcc guys are
investigating those ones and plan to fix them before GCC 7 release.
The atomic_fetch_abc_def c11 builtins are now using load-and-abc
instructions on z196 zarch and higher cpus instead of a loop
with compare-and-swap instruction.
Some of the non-c11 atomic macros from include/atomic.h are now
implemented with help of the c11 atomic builtins.
The other non-c11 atomic macros are using the macros defined here.
Optimizations like using load-and-and for exchanging memory to zero
will be done by GCC in future.
ChangeLog:
* sysdeps/s390/atomic-machine.h
(USE_ATOMIC_COMPILER_BUILTINS): Define to 1.
(__arch_compare_and_exchange_val_8_acq,
__arch_compare_and_exchange_val_16_acq,
__arch_compare_and_exchange_val_32_acq,
__arch_compare_and_exchange_val_64_acq):
Delete macro.
(atomic_compare_and_exchange_val_acq,
atomic_compare_and_exchange_val_rel,
atomic_compare_and_exchange_bool_acq,
catomic_compare_and_exchange_bool_acq,
atomic_exchange_acq, atomic_exchange_rel,
atomic_exchange_and_add_acq,
atomic_exchange_and_add_rel,
catomic_exchange_and_add, atomic_or_val,
atomic_or, catomic_or, atomic_bit_test_set,
atomic_and_val, atomic_and, catomic_and):
Define macros with help of c11 atomic builtins.