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Re: [PATCH] Count number of logical processors sharing L2 cache
- From: "H.J. Lu" <hjl dot tools at gmail dot com>
- To: Florian Weimer <fweimer at redhat dot com>
- Cc: GNU C Library <libc-alpha at sourceware dot org>
- Date: Fri, 20 May 2016 05:13:33 -0700
- Subject: Re: [PATCH] Count number of logical processors sharing L2 cache
- Authentication-results: sourceware.org; auth=none
- References: <CAMe9rOoy2YaQTdyqZpQ3=ytDc5dywNshzHAN2ymN60=L5KwbiA at mail dot gmail dot com> <CAMe9rOoq8MNkX0GvoePQ-C51mfUr2ikrRJgqCZE0CoGoJEmOOw at mail dot gmail dot com> <d4cf36ee-f402-41fe-5108-e072b47f2399 at redhat dot com>
On Fri, May 20, 2016 at 1:56 AM, Florian Weimer <fweimer@redhat.com> wrote:
> On 05/19/2016 07:50 PM, H.J. Lu wrote:
>>
>> On Fri, May 13, 2016 at 1:39 PM, H.J. Lu <hjl.tools@gmail.com> wrote:
>>>
>>>
>>> We need count number of available logical processors sharing L2
>>> cache.
>>
>>
>> For Intel processors, when there are both L2 and L3 caches, SMT level
>> type should be ued to count number of available logical processors
>> sharing L2 cache. If there is only L2 cache, core level type should
>> be used to count number of available logical processors sharing L2
>> cache. Number of available logical processors sharing L2 cache should
>> be used for non-inclusive L2 and L3 caches.
>>
>> Any comments?
>
>
> Is this accounting even relevant anymore, now that cache allocation can be
> tweaked dynamically?
Can you elaborate?
--
H.J.