This is the mail archive of the mailing list for the glibc project.

Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: [RFC PATCH 0/3] bugfix for aarch64 ILP32

On 18/03/15 10:30, Zhang Jian(Bamvor) wrote:
> This is bamvor from Huawei OS team. We test ILP32 support through
> LTP testcases for both little endian and big endian. There are some
> failures we thought they should be fixed in glibc level, so, here they are.
> Hope these series of patch could help other people who is interested
> in ILP32 in aarch64. We will send another series in LTP mailing list about
> LTP relative patches.
> These work is base on Andrew's ilp32 patch [ilp32 v3 patch]
> [ilp32_glibc_patch].
> The test of build is based on the toolchain built by linaro ABE environment
> [linaro_abe].
> [ilp32 v3 patch] (
> [ilp32_glibc_patch] (
> [linaro_abe] (

(added Marcus to cc)

i hope you followed the recent discussion about ilp32 kernel uapi:

in short some of the conformance issues should be fixed on the
kernel side, so the current ilp32 patch is not ready for upstream

(please share your opinion there if you have some particular
ilp32 usecase in mind that depends on kernel uapi behaviour)

> Yang Yingliang (3):
>   ARM64: ILP32: change register x1 to PTR_REG
>   ARM64: ILP32: use __fsword_t in generic/bits/statfs.h
>   ARM64: ILP32: change register x##R to PTR_REG (R)

the PTR_REG changes look ok to me, but depend on the aarch64 ilp32 patches

the __fsword_t change looks ok too, not sure how statfs worked for x32 before

>  sysdeps/aarch64/sysdep.h                      |  2 +-
>  sysdeps/unix/sysv/linux/aarch64/sysdep.h      |  2 +-
>  sysdeps/unix/sysv/linux/generic/bits/statfs.h | 24 ++++++++++++------------
>  3 files changed, 14 insertions(+), 14 deletions(-)

Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]