This is the mail archive of the libc-alpha@sourceware.org mailing list for the glibc project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: [PATCH 0/4] Provide C11 atomic operations


On Thu, 2014-11-20 at 20:50 +0000, Joseph Myers wrote:
> On Thu, 20 Nov 2014, Torvald Riegel wrote:
> 
> > I have committed this patch after some more code comparison for x86_64
> > pthread_once using a current GCC, and a regression check on x86_64.  The
> > fast path has identical code.  On the slow path, there are some minor
> > differences in which instructions are used, but I didn't spot anything
> > hat looked significant.
> > I've also fixed the Changelog; Adhemerval, thanks for spotting this.
> 
> What is the basis for __HAVE_64B_ATOMICS in 
> sysdeps/microblaze/bits/atomic.h?  It looks to me as if the existing 
> 64-bit operations there all abort.

It's a mistake.  Thanks for spotting this.  I have committed the
following fix:

diff --git a/ChangeLog b/ChangeLog
index 76fda28..b0041ea 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,8 @@
+2014-11-21  Torvald Riegel  <triegel@redhat.com>
+
+       * sysdeps/microblaze/bits/atomic.h (__HAVE_64B_ATOMICS): Fix
value
+       by setting it to 0.  64b atomics are not supported currently.
+
 2014-11-21  Alexandre Oliva <aoliva@redhat.com>
 
        [BZ #16469]
diff --git a/sysdeps/microblaze/bits/atomic.h
b/sysdeps/microblaze/bits/atomic.h
index 395162d..315c872 100644
--- a/sysdeps/microblaze/bits/atomic.h
+++ b/sysdeps/microblaze/bits/atomic.h
@@ -35,7 +35,7 @@ typedef uintptr_t uatomicptr_t;
 typedef intmax_t atomic_max_t;
 typedef uintmax_t uatomic_max_t;
 
-#define __HAVE_64B_ATOMICS 1
+#define __HAVE_64B_ATOMICS 0
 #define USE_ATOMIC_COMPILER_BUILTINS 0
 



Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]