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Re: Possible bug in sysdeps/x86_64/cacheinfo.c
- From: "H.J. Lu" <hjl dot tools at gmail dot com>
- To: Paul Pluzhnikov <ppluzhnikov at gmail dot com>
- Cc: GLIBC Devel <libc-alpha at sourceware dot org>, Ulrich Drepper <drepper at gmail dot com>
- Date: Mon, 10 Nov 2014 11:23:44 -0800
- Subject: Re: Possible bug in sysdeps/x86_64/cacheinfo.c
- Authentication-results: sourceware.org; auth=none
- References: <CALoOobPn2facphaCn5mXz2vymWfu9Z9wdRN=F6i7ne8J-XM4Yw at mail dot gmail dot com>
On Mon, Nov 10, 2014 at 9:50 AM, Paul Pluzhnikov <firstname.lastname@example.org> wrote:
> In sysdeps/x86_64/cacheinfo.c intel_check_word(), we have this code:
> commit 2a1156010784332cbe4bf033ccedb19f52e56a75
> Author: Ulrich Drepper <email@example.com>
> Date: Sun Mar 20 08:14:30 2011 -0400
> Implement x86 cpuid handling of leaf4 for cache information.
> asm volatile ("xchgl %%ebx, %1; cpuid; xchgl %%ebx, %1"
> : "=a" (eax), "=r" (ebx), "=c" (ecx), "=d" (edx)
> : "0" (4), "2" (round));
> AFAICT, this clobbers the high 32 bits of %rbx, which causes a crash
> if the caller had a live %rbx and non-0 high bits in it.
> (I am not sure why this isn't causing a problem with current glibc
> builds; possibly %rbx is not live?)
and fixed by
Author: H.J. Lu <firstname.lastname@example.org>
Date: Tue Aug 12 17:02:51 2014 -0700
Replace cpuid asm statement with __cpuid_count
The compiler doesn't know that the cpuid asm statement in intel_check_word
will trash RBX. We are lucky that it doesn't cause any problems since
RBX is also used by compiler for other purposes so that RBX is saved and
restored. This patch replaces it with __cpuid_count.
* sysdeps/x86_64/cacheinfo.c (intel_check_word): Replace cpuid
asm statement with __cpuid_count.