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Possible bug in sysdeps/x86_64/cacheinfo.c
- From: Paul Pluzhnikov <ppluzhnikov at gmail dot com>
- To: GLIBC Devel <libc-alpha at sourceware dot org>
- Cc: Ulrich Drepper <drepper at gmail dot com>
- Date: Mon, 10 Nov 2014 09:50:57 -0800
- Subject: Possible bug in sysdeps/x86_64/cacheinfo.c
- Authentication-results: sourceware.org; auth=none
In sysdeps/x86_64/cacheinfo.c intel_check_word(), we have this code:
Author: Ulrich Drepper <email@example.com>
Date: Sun Mar 20 08:14:30 2011 -0400
Implement x86 cpuid handling of leaf4 for cache information.
asm volatile ("xchgl %%ebx, %1; cpuid; xchgl %%ebx, %1"
: "=a" (eax), "=r" (ebx), "=c" (ecx), "=d" (edx)
: "0" (4), "2" (round));
AFAICT, this clobbers the high 32 bits of %rbx, which causes a crash
if the caller had a live %rbx and non-0 high bits in it.
(I am not sure why this isn't causing a problem with current glibc
builds; possibly %rbx is not live?)