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Re: [PATCH RFC V4] Improve 64bit memcpy/memove for Corei7 with unaligned avx instruction
- From: Ling Ma <ling dot ma dot program at gmail dot com>
- To: Ondřej Bílka <neleai at seznam dot cz>
- Cc: Andreas Jaeger <aj at suse dot com>, libc-alpha at sourceware dot org, liubov dot dmitrieva at gmail dot com, Ma Ling <ling dot ml at alibaba-inc dot com>
- Date: Mon, 29 Jul 2013 18:53:44 +0800
- Subject: Re: [PATCH RFC V4] Improve 64bit memcpy/memove for Corei7 with unaligned avx instruction
- References: <1375090855-8312-1-git-send-email-ling dot ma dot program at gmail dot com> <51F63B77 dot 7020003 at suse dot com> <20130729100519 dot GA9158 at domone dot kolej dot mff dot cuni dot cz>
> It should be correct one unless ifunc selection was wrong. Does
> haswell have bit_Slow_BSF bit set?
Ling: i'm not sure, atom cpus will be sensitive for this instruction,
but core2, nehalem, sandybridge have good performance on it.
Thanks
Ling