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Re: [PATCH] PPC Add Power6x Support to dl-procinfo
- From: Steven Munroe <munroesj at us dot ibm dot com>
- To: Jakub Jelinek <jakub at redhat dot com>
- Cc: libc-alpha at sources dot redhat dot com, Paul Mackerras <paulus at samba dot org>
- Date: Mon, 13 Nov 2006 16:11:23 -0600
- Subject: Re: [PATCH] PPC Add Power6x Support to dl-procinfo
- References: <45580119.4010408@us.ibm.com> <20061113184544.GA3849@sunsite.mff.cuni.cz>
Jakub Jelinek wrote:
>On Sun, Nov 12, 2006 at 11:22:33PM -0600, Steven Munroe wrote:
>
>>The POWER6 processor includes addtional instructions beyond the 2.05 ISA
>>(Move Float to GRP, Move Float from GRP) which are available as the
>>default on unmanaged systems (single partition systems identified by
>>the AT_PLATFORM="power6x"). For Partitioned systems those instructions
>>are disabled by default (AT_PLATFORM="power6"). Paul Mackerras recently
>>posted the power6, power6x kernel support:
>>http://patchwork.ozlabs.org/linuxppc/patch?id=7989
>>
>
>Shouldn't arch_2_05 and PPC_FEATURE_ARCH_2_05 be renamed to
>power6 and PPC_FEATURE_POWER6 respectively?
>
>
Not really power6x is a special case. We got off to a bad start with
PPC_FEATURE_POWER4/5/5+, before Uli pushed us to use AT_PLATFORM for
hardware/chip differences. In the new scheme PPC_FEATURE_POWER4,
PPC_FEATURE_POWER5, PPC_FEATURE_POWER5+ should be renamed to
PPC_FEATURE_ARCH_2_0 PPC_FEATURE_ARCH_2_02 and PPC_FEATURE_ARCH_2_03
respectively. These correspond to versions of "The PowerPC Architecure"
(each level adds new instructions).
The current thinking is to use AT_PLATFORM for
hardware/chip/micro-architecure differences (970 vs power5 vs power6)
and AT_HWCAP for Hardware facilities (FPU, ALTIVEC, DFP) and Instruction
Set Architecture levels (ARCH_2_05).
power6x is odd because two instruction where retroactively removed from
ARCH_2_05. Perhaps we should change PPC_FEATURE_POWER6_EXT to
PPC_FEATURE_HAS_MFTGPR (move float to/from gpr) which is more inline
with a instruction set facility.