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This patch updates ia64 libm to Intel libm 2005-03-21. It fixed the
nextafter bug. There are no math failures with "make xcheck".
H.J.
---
2005-03-30 H.J. Lu <hongjiu.lu@intel.com>
* sysdeps/ia64/fpu/e_acosf.S: Update from Intel libm 2005-03-21.
* sysdeps/ia64/fpu/e_acoshf.S: Likewise.
* sysdeps/ia64/fpu/e_acoshl.S: Likewise.
* sysdeps/ia64/fpu/e_acosh.S: Likewise.
* sysdeps/ia64/fpu/e_acosl.S: Likewise.
* sysdeps/ia64/fpu/e_acos.S: Likewise.
* sysdeps/ia64/fpu/e_asinf.S: Likewise.
* sysdeps/ia64/fpu/e_asinl.S: Likewise.
* sysdeps/ia64/fpu/e_asin.S: Likewise.
* sysdeps/ia64/fpu/e_atan2f.S: Likewise.
* sysdeps/ia64/fpu/e_atan2.S: Likewise.
* sysdeps/ia64/fpu/e_atanhf.S: Likewise.
* sysdeps/ia64/fpu/e_atanhl.S: Likewise.
* sysdeps/ia64/fpu/e_atanh.S: Likewise.
* sysdeps/ia64/fpu/e_coshf.S: Likewise.
* sysdeps/ia64/fpu/e_coshl.S: Likewise.
* sysdeps/ia64/fpu/e_cosh.S: Likewise.
* sysdeps/ia64/fpu/e_exp10f.S: Likewise.
* sysdeps/ia64/fpu/e_exp10l.S: Likewise.
* sysdeps/ia64/fpu/e_exp10.S: Likewise.
* sysdeps/ia64/fpu/e_exp2f.S: Likewise.
* sysdeps/ia64/fpu/e_exp2l.S: Likewise.
* sysdeps/ia64/fpu/e_exp2.S: Likewise.
* sysdeps/ia64/fpu/e_expf.S: Likewise.
* sysdeps/ia64/fpu/e_exp.S: Likewise.
* sysdeps/ia64/fpu/e_fmodf.S: Likewise.
* sysdeps/ia64/fpu/e_fmodl.S: Likewise.
* sysdeps/ia64/fpu/e_fmod.S: Likewise.
* sysdeps/ia64/fpu/e_hypotf.S: Likewise.
* sysdeps/ia64/fpu/e_hypotl.S: Likewise.
* sysdeps/ia64/fpu/e_hypot.S: Likewise.
* sysdeps/ia64/fpu/e_lgammaf_r.c: Likewise.
* sysdeps/ia64/fpu/e_lgammal_r.c: Likewise.
* sysdeps/ia64/fpu/e_lgamma_r.c: Likewise.
* sysdeps/ia64/fpu/e_log2f.S: Likewise.
* sysdeps/ia64/fpu/e_log2l.S: Likewise.
* sysdeps/ia64/fpu/e_log2.S: Likewise.
* sysdeps/ia64/fpu/e_logf.S: Likewise.
* sysdeps/ia64/fpu/e_logl.S: Likewise.
* sysdeps/ia64/fpu/e_log.S: Likewise.
* sysdeps/ia64/fpu/e_powf.S: Likewise.
* sysdeps/ia64/fpu/e_powl.S: Likewise.
* sysdeps/ia64/fpu/e_pow.S: Likewise.
* sysdeps/ia64/fpu/e_remainderf.S: Likewise.
* sysdeps/ia64/fpu/e_remainderl.S: Likewise.
* sysdeps/ia64/fpu/e_remainder.S: Likewise.
* sysdeps/ia64/fpu/e_scalbf.S: Likewise.
* sysdeps/ia64/fpu/e_scalbl.S: Likewise.
* sysdeps/ia64/fpu/e_scalb.S: Likewise.
* sysdeps/ia64/fpu/e_sinhf.S: Likewise.
* sysdeps/ia64/fpu/e_sinhl.S: Likewise.
* sysdeps/ia64/fpu/e_sinh.S: Likewise.
* sysdeps/ia64/fpu/e_sqrtf.S: Likewise.
* sysdeps/ia64/fpu/e_sqrtl.S: Likewise.
* sysdeps/ia64/fpu/e_sqrt.S: Likewise.
* sysdeps/ia64/fpu/libm_error.c: Likewise.
* sysdeps/ia64/fpu/libm_lgammaf.S: Likewise.
* sysdeps/ia64/fpu/libm_lgammal.S: Likewise.
* sysdeps/ia64/fpu/libm_lgamma.S: Likewise.
* sysdeps/ia64/fpu/libm_scalblnf.S: Likewise.
* sysdeps/ia64/fpu/libm_sincosf.S: Likewise.
* sysdeps/ia64/fpu/libm_sincos_large.S: Likewise.
* sysdeps/ia64/fpu/libm_sincosl.S: Likewise.
* sysdeps/ia64/fpu/libm_sincos.S: Likewise.
* sysdeps/ia64/fpu/libm_support.h: Likewise.
* sysdeps/ia64/fpu/s_asinhl.S: Likewise.
* sysdeps/ia64/fpu/s_asinh.S: Likewise.
* sysdeps/ia64/fpu/s_atanf.S: Likewise.
* sysdeps/ia64/fpu/s_atanl.S: Likewise.
* sysdeps/ia64/fpu/s_cbrtf.S: Likewise.
* sysdeps/ia64/fpu/s_cbrtl.S: Likewise.
* sysdeps/ia64/fpu/s_cosf.S: Likewise.
* sysdeps/ia64/fpu/s_cosl.S: Likewise.
* sysdeps/ia64/fpu/s_cos.S: Likewise.
* sysdeps/ia64/fpu/s_erfcf.S: Likewise.
* sysdeps/ia64/fpu/s_erfcl.S: Likewise.
* sysdeps/ia64/fpu/s_erfc.S: Likewise.
* sysdeps/ia64/fpu/s_erfl.S: Likewise.
* sysdeps/ia64/fpu/s_erf.S: Likewise.
* sysdeps/ia64/fpu/s_expm1f.S: Likewise.
* sysdeps/ia64/fpu/s_expm1l.S: Likewise.
* sysdeps/ia64/fpu/s_expm1.S: Likewise.
* sysdeps/ia64/fpu/s_fdimf.S: Likewise.
* sysdeps/ia64/fpu/s_fdiml.S: Likewise.
* sysdeps/ia64/fpu/s_fdim.S: Likewise.
* sysdeps/ia64/fpu/s_frexp.c: Likewise.
* sysdeps/ia64/fpu/s_frexpf.c: Likewise.
* sysdeps/ia64/fpu/s_frexpl.c: Likewise.
* sysdeps/ia64/fpu/s_ilogbf.S: Likewise.
* sysdeps/ia64/fpu/s_ilogbl.S: Likewise.
* sysdeps/ia64/fpu/s_ilogb.S: Likewise.
* sysdeps/ia64/fpu/s_ldexp.c: Likewise.
* sysdeps/ia64/fpu/s_ldexpf.c: Likewise.
* sysdeps/ia64/fpu/s_ldexpl.c: Likewise.
* sysdeps/ia64/fpu/s_libm_ldexpf.S: Likewise.
* sysdeps/ia64/fpu/s_libm_ldexpl.S: Likewise.
* sysdeps/ia64/fpu/s_libm_ldexp.S: Likewise.
* sysdeps/ia64/fpu/s_libm_scalbnf.S: Likewise.
* sysdeps/ia64/fpu/s_libm_scalbnl.S: Likewise.
* sysdeps/ia64/fpu/s_libm_scalbn.S: Likewise.
* sysdeps/ia64/fpu/s_log1pf.S: Likewise.
* sysdeps/ia64/fpu/s_log1pl.S: Likewise.
* sysdeps/ia64/fpu/s_log1p.S: Likewise.
* sysdeps/ia64/fpu/s_logbf.S: Likewise.
* sysdeps/ia64/fpu/s_logbl.S: Likewise.
* sysdeps/ia64/fpu/s_logb.S: Likewise.
* sysdeps/ia64/fpu/s_nearbyintf.S: Likewise.
* sysdeps/ia64/fpu/s_nearbyintl.S: Likewise.
* sysdeps/ia64/fpu/s_nearbyint.S: Likewise.
* sysdeps/ia64/fpu/s_nextafterf.S: Likewise.
* sysdeps/ia64/fpu/s_nextafterl.S: Likewise.
* sysdeps/ia64/fpu/s_nextafter.S: Likewise.
* sysdeps/ia64/fpu/s_nexttowardf.S: Likewise.
* sysdeps/ia64/fpu/s_nexttowardl.S: Likewise.
* sysdeps/ia64/fpu/s_nexttoward.S: Likewise.
* sysdeps/ia64/fpu/s_roundf.S: Likewise.
* sysdeps/ia64/fpu/s_roundl.S: Likewise.
* sysdeps/ia64/fpu/s_round.S: Likewise.
* sysdeps/ia64/fpu/s_scalblnf.c: Likewise.
* sysdeps/ia64/fpu/s_scalbn.c: Likewise.
* sysdeps/ia64/fpu/s_scalbnf.c: Likewise.
* sysdeps/ia64/fpu/s_scalbnl.c: Likewise.
* sysdeps/ia64/fpu/s_tanf.S: Likewise.
* sysdeps/ia64/fpu/s_tanhl.S: Likewise.
* sysdeps/ia64/fpu/s_tanh.S: Likewise.
* sysdeps/ia64/fpu/s_tanl.S: Likewise.
* sysdeps/ia64/fpu/s_tan.S: Likewise.
* sysdeps/ia64/fpu/w_lgamma.c: Likewise.
* sysdeps/ia64/fpu/w_lgammaf.c: Likewise.
* sysdeps/ia64/fpu/w_lgammal.c: Likewise.
* sysdeps/ia64/fpu/w_tgammaf.S: Likewise.
* sysdeps/ia64/fpu/w_tgammal.S: Likewise.
* sysdeps/ia64/fpu/w_tgamma.S: Likewise.
* sysdeps/ia64/fpu/libm_cpu_defs.h: New file.
* sysdeps/ia64/fpu/libm_error_codes.h: Likewise.
* sysdeps/ia64/fpu/gen_import_file_list: Updated for Intel libm
2005-03-21.
* sysdeps/ia64/fpu/import_file.awk: Likewise.
* sysdeps/ia64/fpu/import_intel_libm: Likewise.
* sysdeps/ia64/fpu/Makefile: Likewise.
diff -uprN sysdeps/ia64/fpu-old/e_acosf.S sysdeps/ia64/fpu/e_acosf.S
--- sysdeps/ia64/fpu-old/e_acosf.S 2005-01-07 14:13:48.000000000 -0800
+++ sysdeps/ia64/fpu/e_acosf.S 2005-03-30 16:22:02.699734848 -0800
@@ -601,6 +601,7 @@ ACOSF_ABS_ONE:
GLOBAL_LIBM_END(acosf)
+
// Stack operations when calling error support.
// (1) (2)
// sp -> + psp -> +
diff -uprN sysdeps/ia64/fpu-old/e_acoshf.S sysdeps/ia64/fpu/e_acoshf.S
--- sysdeps/ia64/fpu-old/e_acoshf.S 2005-01-06 03:29:19.000000000 -0800
+++ sysdeps/ia64/fpu/e_acoshf.S 2005-03-30 16:22:02.703734331 -0800
@@ -968,6 +968,7 @@ ACOSH_LESS_ONE:
GLOBAL_LIBM_END(acoshf)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
diff -uprN sysdeps/ia64/fpu-old/e_acoshl.S sysdeps/ia64/fpu/e_acoshl.S
--- sysdeps/ia64/fpu-old/e_acoshl.S 2005-01-06 03:29:19.000000000 -0800
+++ sysdeps/ia64/fpu/e_acoshl.S 2005-03-30 16:22:02.715732780 -0800
@@ -1650,6 +1650,7 @@ acoshl_lt_pone:
GLOBAL_LIBM_END(acoshl)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
{ .mfi
diff -uprN sysdeps/ia64/fpu-old/e_acosh.S sysdeps/ia64/fpu/e_acosh.S
--- sysdeps/ia64/fpu-old/e_acosh.S 2005-01-06 03:29:19.000000000 -0800
+++ sysdeps/ia64/fpu/e_acosh.S 2005-03-30 16:22:02.720732134 -0800
@@ -1139,6 +1139,7 @@ ACOSH_LESS_ONE:
GLOBAL_LIBM_END(acosh)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
diff -uprN sysdeps/ia64/fpu-old/e_acosl.S sysdeps/ia64/fpu/e_acosl.S
--- sysdeps/ia64/fpu-old/e_acosl.S 2005-01-07 14:13:51.000000000 -0800
+++ sysdeps/ia64/fpu/e_acosl.S 2005-03-30 16:22:02.726731359 -0800
@@ -35,7 +35,7 @@
//
// Intel Corporation is the author of this code, and requests that all
// problem reports or change requests be submitted to it directly at
-// http: //www.intel.com/software/products/opensource/libraries/num.htm.
+// http://www.intel.com/software/products/opensource/libraries/num.htm.
//
// History
//==============================================================
@@ -2482,6 +2482,7 @@ acosl_SPECIAL_CASES:
GLOBAL_LIBM_END(acosl)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
// (1)
diff -uprN sysdeps/ia64/fpu-old/e_acos.S sysdeps/ia64/fpu/e_acos.S
--- sysdeps/ia64/fpu-old/e_acos.S 2005-01-07 14:13:48.000000000 -0800
+++ sysdeps/ia64/fpu/e_acos.S 2005-03-30 16:22:02.730730842 -0800
@@ -824,6 +824,7 @@ acos_abs_gt_1:
GLOBAL_LIBM_END(acos)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
{ .mfi
diff -uprN sysdeps/ia64/fpu-old/e_asinf.S sysdeps/ia64/fpu/e_asinf.S
--- sysdeps/ia64/fpu-old/e_asinf.S 2005-01-07 14:13:51.000000000 -0800
+++ sysdeps/ia64/fpu/e_asinf.S 2005-03-30 16:22:02.740729550 -0800
@@ -583,6 +583,7 @@ ASINF_ABS_ONE:
;;
GLOBAL_LIBM_END(asinf)
+
// Stack operations when calling error support.
// (1) (2)
// sp -> + psp -> +
diff -uprN sysdeps/ia64/fpu-old/e_asinl.S sysdeps/ia64/fpu/e_asinl.S
--- sysdeps/ia64/fpu-old/e_asinl.S 2005-01-07 14:13:53.000000000 -0800
+++ sysdeps/ia64/fpu/e_asinl.S 2005-03-30 16:22:02.751728128 -0800
@@ -35,7 +35,7 @@
//
// Intel Corporation is the author of this code, and requests that all
// problem reports or change requests be submitted to it directly at
-// http: //www.intel.com/software/products/opensource/libraries/num.htm.
+// http://www.intel.com/software/products/opensource/libraries/num.htm.
//
// History
//==============================================================
@@ -2459,6 +2459,7 @@ SMALL_S:
GLOBAL_LIBM_END(asinl)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
// (1)
diff -uprN sysdeps/ia64/fpu-old/e_asin.S sysdeps/ia64/fpu/e_asin.S
--- sysdeps/ia64/fpu-old/e_asin.S 2005-01-07 14:13:51.000000000 -0800
+++ sysdeps/ia64/fpu/e_asin.S 2005-03-30 16:22:02.764726448 -0800
@@ -800,6 +800,7 @@ asin_abs_gt_1:
GLOBAL_LIBM_END(asin)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
{ .mfi
diff -uprN sysdeps/ia64/fpu-old/e_atan2f.S sysdeps/ia64/fpu/e_atan2f.S
--- sysdeps/ia64/fpu-old/e_atan2f.S 2005-01-07 14:13:53.000000000 -0800
+++ sysdeps/ia64/fpu/e_atan2f.S 2005-03-30 16:22:02.804721279 -0800
@@ -827,6 +827,7 @@ ATAN2F_XY_INF_NAN_ZERO:
GLOBAL_IEEE754_END(atan2f)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
mov GR_Parameter_TAG = 38
diff -uprN sysdeps/ia64/fpu-old/e_atan2.S sysdeps/ia64/fpu/e_atan2.S
--- sysdeps/ia64/fpu-old/e_atan2.S 2005-01-07 14:13:53.000000000 -0800
+++ sysdeps/ia64/fpu/e_atan2.S 2005-03-30 16:22:02.841716497 -0800
@@ -52,6 +52,7 @@
// 08/20/02 Corrected inexact flag and directed rounding symmetry bugs
// 02/06/03 Reordered header: .section, .global, .proc, .align
// 04/17/03 Added missing mutex directive
+// 12/23/03 atan2(NaN1,NaN2) now QNaN1, for consistency with atan2f, atan2l
//
// API
//==============================================================
@@ -142,7 +143,7 @@
// -0 -0 -pi
//
// Nan anything quiet Y
-// anything NaN quiet X
+// Not NaN NaN quiet X
// atan2(+-0/+-0) sets double error tag to 37
@@ -388,7 +389,7 @@ GLOBAL_IEEE754_ENTRY(atan2)
}
{ .mfb
ldfe atan2_P21 = [EXP_AD_P2],16
-(p10) fma.d.s0 f8 = atan2_Y,atan2_X,f0 // If y=nan, result quietized y
+(p10) fma.d.s0 f8 = atan2_X,atan2_Y,f0 // If y=nan, result quietized y
(p10) br.ret.spnt b0 // Exit if y=nan
;;
}
@@ -985,6 +986,7 @@ ATAN2_ERROR:
}
GLOBAL_IEEE754_END(atan2)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
// (1)
diff -uprN sysdeps/ia64/fpu-old/e_atanhf.S sysdeps/ia64/fpu/e_atanhf.S
--- sysdeps/ia64/fpu-old/e_atanhf.S 2005-01-06 03:29:20.000000000 -0800
+++ sysdeps/ia64/fpu/e_atanhf.S 2005-03-30 16:22:02.868713008 -0800
@@ -782,6 +782,7 @@ atanhf_ge_one:
GLOBAL_LIBM_END(atanhf)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
diff -uprN sysdeps/ia64/fpu-old/e_atanhl.S sysdeps/ia64/fpu/e_atanhl.S
--- sysdeps/ia64/fpu-old/e_atanhl.S 2005-01-06 03:29:20.000000000 -0800
+++ sysdeps/ia64/fpu/e_atanhl.S 2005-03-30 16:22:02.883711069 -0800
@@ -1101,6 +1101,7 @@ atanhl_gt_one:
};;
GLOBAL_LIBM_END(atanhl)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
{ .mfi
diff -uprN sysdeps/ia64/fpu-old/e_atanh.S sysdeps/ia64/fpu/e_atanh.S
--- sysdeps/ia64/fpu-old/e_atanh.S 2005-01-06 03:29:20.000000000 -0800
+++ sysdeps/ia64/fpu/e_atanh.S 2005-03-30 16:22:02.906708097 -0800
@@ -1008,6 +1008,7 @@ atanh_ge_one:
GLOBAL_LIBM_END(atanh)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
diff -uprN sysdeps/ia64/fpu-old/e_coshf.S sysdeps/ia64/fpu/e_coshf.S
--- sysdeps/ia64/fpu-old/e_coshf.S 2005-01-07 14:13:53.000000000 -0800
+++ sysdeps/ia64/fpu/e_coshf.S 2005-03-30 16:22:02.914707063 -0800
@@ -652,6 +652,7 @@ COSH_UNORM:
GLOBAL_IEEE754_END(coshf)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
{ .mfi
diff -uprN sysdeps/ia64/fpu-old/e_coshl.S sysdeps/ia64/fpu/e_coshl.S
--- sysdeps/ia64/fpu-old/e_coshl.S 2005-01-07 14:13:54.000000000 -0800
+++ sysdeps/ia64/fpu/e_coshl.S 2005-03-30 16:22:02.919706417 -0800
@@ -1033,6 +1033,7 @@ COSH_HUGE:
GLOBAL_IEEE754_END(coshl)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
diff -uprN sysdeps/ia64/fpu-old/e_cosh.S sysdeps/ia64/fpu/e_cosh.S
--- sysdeps/ia64/fpu-old/e_cosh.S 2005-01-07 14:13:53.000000000 -0800
+++ sysdeps/ia64/fpu/e_cosh.S 2005-03-30 16:22:02.923705900 -0800
@@ -811,6 +811,7 @@ COSH_UNORM:
GLOBAL_IEEE754_END(cosh)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
{ .mfi
diff -uprN sysdeps/ia64/fpu-old/e_exp10f.S sysdeps/ia64/fpu/e_exp10f.S
--- sysdeps/ia64/fpu-old/e_exp10f.S 2005-01-06 03:29:20.000000000 -0800
+++ sysdeps/ia64/fpu/e_exp10f.S 2005-03-30 16:22:02.930704995 -0800
@@ -1,7 +1,7 @@
.file "exp10f.s"
-// Copyright (c) 2000 - 2003, Intel Corporation
+// Copyright (c) 2000 - 2004, Intel Corporation
// All rights reserved.
//
// Contributed 2000 by the Intel Numerics Group, Intel Corporation
@@ -35,7 +35,7 @@
//
// Intel Corporation is the author of this code, and requests that all
// problem reports or change requests be submitted to it directly at
-// http: //www.intel.com/software/products/opensource/libraries/num.htm.
+// http://www.intel.com/software/products/opensource/libraries/num.htm.
//
// History
//==============================================================
@@ -43,6 +43,7 @@
// 05/20/02 Cleaned up namespace and sf0 syntax
// 09/06/02 Improved performance and accuracy; no inexact flags on exact cases
// 01/29/03 Added missing } to bundle templates
+// 12/16/04 Call error handling on underflow.
//
// API
//==============================================================
@@ -80,8 +81,8 @@
// Registers used
//==============================================================
// r2-r3, r14-r40
-// f6-f15, f32-f51
-// p6-p9, p12
+// f6-f15, f32-f52
+// p6-p12
//
@@ -102,6 +103,7 @@ GR_Fh_ADDR = r23
GR_EXPMAX = r24
GR_ROUNDVAL = r26
+GR_SNORM_LIMIT = r26
GR_MASK = r27
GR_KF0 = r28
GR_MASK_low = r29
@@ -153,6 +155,7 @@ FR_E = f49
FR_exact_limit = f50
FR_int_x = f51
+FR_SNORM_LIMIT = f52
// Data tables
@@ -246,8 +249,12 @@ GLOBAL_IEEE754_ENTRY(exp10f)
}
;;
-{.mib
+{.mlx
ldfe FR_LOG2_10= [ GR_COEFF_START ], 16 // load log2(10)*2^(10-63)
+ movl GR_SNORM_LIMIT= 0xc217b818 // Smallest normal threshold
+}
+{.mib
+ nop.m 0
nop.i 0
(p12) br.cond.spnt SPECIAL_exp10 // Branch if nan, inf, zero
}
@@ -261,7 +268,7 @@ GLOBAL_IEEE754_ENTRY(exp10f)
;;
{.mfi
- nop.m 0
+ setf.s FR_SNORM_LIMIT= GR_SNORM_LIMIT // Set smallest normal limit
(p8) fcvt.fx.s1 FR_int_x = f8 // Convert x to integer
nop.i 0
}
@@ -335,7 +342,7 @@ GLOBAL_IEEE754_ENTRY(exp10f)
{.mfb
ldf8 FR_T_high= [ GR_Fh_ADDR ] // load T_high= 2^{f_high}
- nop.f 0
+ fcmp.ge.s1 p11, p0= f8, FR_SNORM_LIMIT // Test x for normal range
(p12) br.cond.spnt OUT_RANGE_exp10
}
;;
@@ -390,10 +397,17 @@ GLOBAL_IEEE754_ENTRY(exp10f)
{.mfb
nop.m 0
(p9) fma.s.s1 f8= FR_P, FR_T, FR_T // result= T+T*P, exact use s1
- br.ret.sptk b0 // return
+ (p11) br.ret.sptk b0 // return, if result normal
}
;;
+// Here if result in denormal range (and not zero)
+{.mib
+ nop.m 0
+ mov GR_Parameter_TAG= 266
+ br.cond.sptk __libm_error_region // Branch to error handling
+}
+;;
SPECIAL_exp10:
{.mfi
@@ -446,53 +460,35 @@ SPECIAL_exp10:
OUT_RANGE_exp10:
+// underflow: p6= 1
// overflow: p8= 1
-{.mii
+.pred.rel "mutex",p6,p8
+{.mmi
(p8) mov GR_EXPMAX= 0x1fffe
- nop.i 0
- nop.i 0
-}
-;;
-
-
-{.mmb
- (p8) mov GR_Parameter_TAG= 167
- (p8) setf.exp FR_R= GR_EXPMAX
- nop.b 999
-}
-;;
-
-{.mfi
- nop.m 999
- (p8) fma.s.s0 f8= FR_R, FR_R, f0 // Create overflow
- nop.i 999
-}
-// underflow: p6= 1
-{.mii
- nop.m 0
(p6) mov GR_EXPMAX= 1
nop.i 0
}
;;
-{.mmb
- nop.m 0
- (p6) setf.exp FR_R= GR_EXPMAX
- nop.b 999
+{.mii
+ setf.exp FR_R= GR_EXPMAX
+ (p8) mov GR_Parameter_TAG= 167
+ (p6) mov GR_Parameter_TAG= 266
}
;;
{.mfb
- nop.m 999
- (p6) fma.s.s0 f8= FR_R, FR_R, f0 // Create underflow
- (p6) br.ret.sptk b0 // will not call libm_error for underflow
+ nop.m 0
+ fma.s.s0 f8= FR_R, FR_R, f0 // Create overflow/underflow
+ br.cond.sptk __libm_error_region // Branch to error handling
}
;;
GLOBAL_IEEE754_END(exp10f)
weak_alias (exp10f, pow10f)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
diff -uprN sysdeps/ia64/fpu-old/e_exp10l.S sysdeps/ia64/fpu/e_exp10l.S
--- sysdeps/ia64/fpu-old/e_exp10l.S 2005-01-06 03:29:20.000000000 -0800
+++ sysdeps/ia64/fpu/e_exp10l.S 2005-03-30 16:22:02.934704478 -0800
@@ -1,7 +1,7 @@
.file "exp10l.s"
-// Copyright (c) 2000 - 2003, Intel Corporation
+// Copyright (c) 2000 - 2004, Intel Corporation
// All rights reserved.
//
// Contributed 2000 by the Intel Numerics Group, Intel Corporation
@@ -44,6 +44,7 @@
// 02/06/03 Reordered header: .section, .global, .proc, .align
// 05/08/03 Reformatted assembly source; corrected overflow result for round to
// -inf and round to zero; exact results now don't set inexact flag
+// 12/16/04 Call error handling on underflow.
//
// API
//==============================================================
@@ -79,9 +80,9 @@
// Registers used
//==============================================================
-// f6-f15, f32-f62
+// f6-f15, f32-f63
// r14-r30, r32-r40
-// p6-p8, p12-p14
+// p6-p8, p11-p14
//
@@ -129,6 +130,7 @@
FR_4 = f60
FR_28 = f61
FR_32 = f62
+ FR_SNORM_LIMIT = f63
GR_ADDR0 = r14
@@ -178,6 +180,7 @@ LOCAL_OBJECT_START(poly_coeffs)
data8 0x3f55d87fe78a6731 // C_5
data8 0x3f2430912f86c787 // C_6
data8 0x9257edfe9b5fb698, 0x00003fbf // log2(10)_low (bits 64...127)
+ data8 0x9a1bc98027a81918, 0x0000c00b // Smallest normal threshold
LOCAL_OBJECT_END(poly_coeffs)
@@ -435,7 +438,7 @@ GLOBAL_IEEE754_ENTRY(exp10l)
{.mmf
// GR_D_ADDR = pointer to D table
- add GR_D_ADDR = 2048-64+96+16, GR_ADDR0
+ add GR_D_ADDR = 2048-64+96+32, GR_ADDR0
// load C_3, C_4
ldfpd FR_COEFF3, FR_COEFF4 = [ GR_ADDR0 ], 16
// y = x*log2(10)*2^8
@@ -471,7 +474,8 @@ GLOBAL_IEEE754_ENTRY(exp10l)
}
{.mfi
- nop.m 0
+ // load smallest normal limit
+ ldfe FR_SNORM_LIMIT = [ GR_ADDR0 ], 16
// x>overflow threshold ?
fcmp.gt.s1 p12, p7 = f8, FR_OF_TEST
nop.i 0 ;;
@@ -598,6 +602,13 @@ GLOBAL_IEEE754_ENTRY(exp10l)
{.mfi
nop.m 0
+ // test if x >= smallest normal limit
+ fcmp.ge.s1 p11, p0 = f8, FR_SNORM_LIMIT
+ nop.i 0 ;;
+}
+
+{.mfi
+ nop.m 0
// P36 = P34+r2*P56
fma.s1 FR_COEFF4 = FR_COEFF5, FR_COEFF3, FR_COEFF4
nop.i 0
@@ -646,9 +657,16 @@ GLOBAL_IEEE754_ENTRY(exp10l)
// result = T+T*P
(p14) fma.s0 f8 = FR_COEFF3, FR_UF_TEST, FR_UF_TEST
// return
- br.ret.sptk b0 ;;
+ (p11) br.ret.sptk b0 ;; // return, if result normal
}
+// Here if result in denormal range (and not zero)
+{.mib
+ nop.m 0
+ mov GR_Parameter_TAG= 264
+ br.cond.sptk __libm_error_region // Branch to error handling
+}
+;;
SPECIAL_EXP10:
@@ -703,47 +721,35 @@ SPECIAL_EXP10:
OUT_RANGE_EXP10:
-{.mii
- // overflow: p8 = 1
+// underflow: p6 = 1
+// overflow: p8 = 1
+
+.pred.rel "mutex",p6,p8
+{.mmi
(p8) mov GR_CONST1 = 0x1fffe
+ (p6) mov GR_CONST1 = 1
nop.i 0
- nop.i 0 ;;
}
+;;
-{.mmb
- (p8) mov GR_Parameter_TAG = 165
- (p8) setf.exp FR_KF0 = GR_CONST1
- nop.b 999 ;;
-}
-
-{.mfi
- nop.m 999
- (p8) fma.s0 f8 = FR_KF0, FR_KF0, f0
- nop.i 999
-}
{.mii
- nop.m 0
- // underflow: p6 = 1
- (p6) mov GR_CONST1 = 1
- nop.i 0 ;;
-}
-
-{.mmb
- nop.m 0
- (p6) setf.exp FR_KF0 = GR_CONST1
- nop.b 999 ;;
+ setf.exp FR_KF0 = GR_CONST1
+ (p8) mov GR_Parameter_TAG = 165
+ (p6) mov GR_Parameter_TAG = 264
}
+;;
{.mfb
nop.m 999
- (p6) fma.s0 f8 = FR_KF0, FR_KF0, f0
- // will not call libm_error for underflow
- (p6) br.ret.sptk b0 ;;
+ fma.s0 f8 = FR_KF0, FR_KF0, f0 // Create overflow/underflow
+ br.cond.sptk __libm_error_region // Branch to error handling
}
+;;
GLOBAL_IEEE754_END(exp10l)
weak_alias (exp10l, pow10l)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
{.mfi
diff -uprN sysdeps/ia64/fpu-old/e_exp10.S sysdeps/ia64/fpu/e_exp10.S
--- sysdeps/ia64/fpu-old/e_exp10.S 2005-01-06 03:29:20.000000000 -0800
+++ sysdeps/ia64/fpu/e_exp10.S 2005-03-30 16:22:02.944703186 -0800
@@ -1,7 +1,7 @@
.file "exp10.s"
-// Copyright (c) 2000 - 2003, Intel Corporation
+// Copyright (c) 2000 - 2004, Intel Corporation
// All rights reserved.
//
// Contributed 2000 by the Intel Numerics Group, Intel Corporation
@@ -35,7 +35,7 @@
//
// Intel Corporation is the author of this code, and requests that all
// problem reports or change requests be submitted to it directly at
-// http: //www.intel.com/software/products/opensource/libraries/num.htm.
+// http://www.intel.com/software/products/opensource/libraries/num.htm.
//
// History
//==============================================================
@@ -43,6 +43,7 @@
// 05/20/02 Cleaned up namespace and sf0 syntax
// 09/06/02 Improved performance; no inexact flags on exact cases
// 01/29/03 Added missing } to bundle templates
+// 12/16/04 Call error handling on underflow.
//
// API
//==============================================================
@@ -81,8 +82,8 @@
// Registers used
//==============================================================
// r2-r3, r14-r40
-// f6-f15, f32-f51
-// p6-p9, p12
+// f6-f15, f32-f52
+// p6-p12
//
@@ -104,6 +105,7 @@ GR_EXPMAX = r24
GR_BIAS53 = r25
GR_ROUNDVAL = r26
+GR_SNORM_LIMIT = r26
GR_MASK = r27
GR_KF0 = r28
GR_MASK_low = r29
@@ -161,6 +163,7 @@ FR_E = f49
FR_exact_limit = f50
FR_int_x = f51
+FR_SNORM_LIMIT = f52
// Data tables
@@ -256,8 +259,12 @@ GLOBAL_IEEE754_ENTRY(exp10)
}
;;
-{.mib
+{.mlx
ldfe FR_LOG2_10= [ GR_COEFF_START ], 16 // load log2(10)*2^(10-63)
+ movl GR_SNORM_LIMIT= 0xc0733a7146f72a41 // Smallest normal threshold
+}
+{.mib
+ nop.m 0
nop.i 0
(p12) br.cond.spnt SPECIAL_exp10 // Branch if nan, inf, zero
}
@@ -284,7 +291,7 @@ GLOBAL_IEEE754_ENTRY(exp10)
;;
{.mfi
- nop.m 0
+ setf.d FR_SNORM_LIMIT= GR_SNORM_LIMIT // Set smallest normal limit
fma.s1 FR_L2_10_high= FR_LOG2_10, FR_2P53, f0 // FR_LOG2_10= log2(10)_hi
nop.i 0
}
@@ -390,6 +397,13 @@ GLOBAL_IEEE754_ENTRY(exp10)
{.mfi
nop.m 0
+ fcmp.ge.s1 p11,p0= f8, FR_SNORM_LIMIT // Test x for normal range
+ nop.i 0
+}
+;;
+
+{.mfi
+ nop.m 0
fma.s1 FR_E= FR_E0, FR_COEFF1, f0 // E= C_1*e
nop.i 0
}
@@ -431,10 +445,17 @@ GLOBAL_IEEE754_ENTRY(exp10)
{.mfb
nop.m 0
(p9) fma.d.s1 f8= FR_P, FR_T, FR_T // result= T+T*P, exact use s1
- br.ret.sptk b0 // return
+ (p11) br.ret.sptk b0 // return, if result normal
}
;;
+// Here if result in denormal range (and not zero)
+{.mib
+ nop.m 0
+ mov GR_Parameter_TAG= 265
+ br.cond.sptk __libm_error_region // Branch to error handling
+}
+;;
SPECIAL_exp10:
{.mfi
@@ -487,53 +508,35 @@ SPECIAL_exp10:
OUT_RANGE_exp10:
+// underflow: p6= 1
// overflow: p8= 1
-{.mii
+.pred.rel "mutex",p6,p8
+{.mmi
(p8) mov GR_EXPMAX= 0x1fffe
- nop.i 0
- nop.i 0
-}
-;;
-
-
-{.mmb
- (p8) mov GR_Parameter_TAG= 166
- (p8) setf.exp FR_R= GR_EXPMAX
- nop.b 999
-}
-;;
-
-{.mfi
- nop.m 999
- (p8) fma.d.s0 f8= FR_R, FR_R, f0 // Create overflow
- nop.i 999
-}
-// underflow: p6= 1
-{.mii
- nop.m 0
(p6) mov GR_EXPMAX= 1
nop.i 0
}
;;
-{.mmb
- nop.m 0
- (p6) setf.exp FR_R= GR_EXPMAX
- nop.b 999
+{.mii
+ setf.exp FR_R= GR_EXPMAX
+ (p8) mov GR_Parameter_TAG= 166
+ (p6) mov GR_Parameter_TAG= 265
}
;;
{.mfb
- nop.m 999
- (p6) fma.d.s0 f8= FR_R, FR_R, f0 // Create underflow
- (p6) br.ret.sptk b0 // will not call libm_error for underflow
+ nop.m 0
+ fma.d.s0 f8= FR_R, FR_R, f0 // Create overflow/underflow
+ br.cond.sptk __libm_error_region // Branch to error handling
}
;;
GLOBAL_IEEE754_END(exp10)
weak_alias (exp10, pow10)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
diff -uprN sysdeps/ia64/fpu-old/e_exp2f.S sysdeps/ia64/fpu/e_exp2f.S
--- sysdeps/ia64/fpu-old/e_exp2f.S 2005-01-06 03:29:20.000000000 -0800
+++ sysdeps/ia64/fpu/e_exp2f.S 2005-03-30 16:22:02.952702152 -0800
@@ -35,7 +35,7 @@
//
// Intel Corporation is the author of this code, and requests that all
// problem reports or change requests be submitted to it directly at
-// http: //www.intel.com/software/products/opensource/libraries/num.htm.
+// http://www.intel.com/software/products/opensource/libraries/num.htm.
//
// History
//==============================================================
@@ -470,6 +470,7 @@ OUT_RANGE_exp2:
GLOBAL_LIBM_END(exp2f)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
diff -uprN sysdeps/ia64/fpu-old/e_exp2l.S sysdeps/ia64/fpu/e_exp2l.S
--- sysdeps/ia64/fpu-old/e_exp2l.S 2005-01-06 03:29:20.000000000 -0800
+++ sysdeps/ia64/fpu/e_exp2l.S 2005-03-30 16:22:02.956701635 -0800
@@ -747,6 +747,7 @@ OUT_RANGE_exp2l:
GLOBAL_LIBM_END(exp2l)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
{.mfi
diff -uprN sysdeps/ia64/fpu-old/e_exp2.S sysdeps/ia64/fpu/e_exp2.S
--- sysdeps/ia64/fpu-old/e_exp2.S 2005-01-06 03:29:20.000000000 -0800
+++ sysdeps/ia64/fpu/e_exp2.S 2005-03-30 16:22:02.959701247 -0800
@@ -35,7 +35,7 @@
//
// Intel Corporation is the author of this code, and requests that all
// problem reports or change requests be submitted to it directly at
-// http: //www.intel.com/software/products/opensource/libraries/num.htm.
+// http://www.intel.com/software/products/opensource/libraries/num.htm.
//
// History
//==============================================================
@@ -495,6 +495,7 @@ OUT_RANGE_exp2:
GLOBAL_LIBM_END(exp2)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
diff -uprN sysdeps/ia64/fpu-old/e_expf.S sysdeps/ia64/fpu/e_expf.S
--- sysdeps/ia64/fpu-old/e_expf.S 2005-01-07 14:13:54.000000000 -0800
+++ sysdeps/ia64/fpu/e_expf.S 2005-03-30 16:22:02.980698533 -0800
@@ -1,7 +1,7 @@
.file "expf.s"
-// Copyright (c) 2000 - 2002, Intel Corporation
+// Copyright (c) 2000 - 2003, Intel Corporation
// All rights reserved.
//
// Contributed 2000 by the Intel Numerics Group, Intel Corporation
@@ -52,6 +52,7 @@
// 09/26/02 support of higher precision inputs added, underflow threshold
// corrected
// 11/15/02 Improved performance on Itanium 2, added possible over/under paths
+// 05/30/03 Set inexact flag on unmasked overflow/underflow
//
//
// API
@@ -521,7 +522,7 @@ EXP_CERTAIN_OVERFLOW:
}
{ .mfb
mov GR_Parameter_TAG = 16
- fma.s.s0 FR_RESULT = fTmp, fTmp, f0 // Set I,O and +INF result
+ fma.s.s0 FR_RESULT = fTmp, fTmp, fTmp // Set I,O and +INF result
br.cond.sptk __libm_error_region
}
;;
@@ -604,6 +605,13 @@ EXP_CERTAIN_UNDERFLOW:
}
;;
+{ .mfi
+ nop.m 0
+ fmerge.se fTmp = fTmp, f64DivLn2 // Small with non-trial signif
+ nop.i 0
+}
+;;
+
{ .mfb
nop.m 0
fma.s.s0 f8 = fTmp, fTmp, f0 // Set I,U, tiny (+0.0) result
@@ -649,6 +657,7 @@ EXP_UNDERFLOW_ZERO:
GLOBAL_IEEE754_END(expf)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
{ .mfi
diff -uprN sysdeps/ia64/fpu-old/e_exp.S sysdeps/ia64/fpu/e_exp.S
--- sysdeps/ia64/fpu-old/e_exp.S 2005-01-07 14:13:54.000000000 -0800
+++ sysdeps/ia64/fpu/e_exp.S 2005-03-30 16:22:03.004695432 -0800
@@ -1,7 +1,7 @@
.file "exp.s"
-// Copyright (c) 2000 - 2002, Intel Corporation
+// Copyright (c) 2000 - 2003, Intel Corporation
// All rights reserved.
//
// Contributed 2000 by the Intel Numerics Group, Intel Corporation
@@ -52,6 +52,7 @@
// 05/20/02 Cleaned up namespace and sf0 syntax
// 09/07/02 Force inexact flag
// 11/15/02 Split underflow path into zero/nonzero; eliminated fma in main path
+// 05/30/03 Set inexact flag on unmasked overflow/underflow
// API
//==============================================================
@@ -602,7 +603,7 @@ EXP_CERTAIN_OVERFLOW:
}
{ .mfb
mov GR_Parameter_TAG = 14
- fma.d.s0 FR_RESULT = fTmp, fTmp, f0 // Set I,O and +INF result
+ fma.d.s0 FR_RESULT = fTmp, fTmp, fTmp // Set I,O and +INF result
br.cond.sptk __libm_error_region
}
;;
@@ -685,6 +686,13 @@ EXP_CERTAIN_UNDERFLOW:
}
;;
+{ .mfi
+ nop.m 0
+ fmerge.se fTmp = fTmp, fLn2_by_128_lo // Small with signif lsb 1
+ nop.i 0
+}
+;;
+
{ .mfb
nop.m 0
fma.d.s0 f8 = fTmp, fTmp, f0 // Set I,U, tiny (+0.0) result
@@ -730,6 +738,7 @@ EXP_UNDERFLOW_ZERO:
GLOBAL_IEEE754_END(exp)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
{ .mfi
diff -uprN sysdeps/ia64/fpu-old/e_fmodf.S sysdeps/ia64/fpu/e_fmodf.S
--- sysdeps/ia64/fpu-old/e_fmodf.S 2005-01-07 14:13:54.000000000 -0800
+++ sysdeps/ia64/fpu/e_fmodf.S 2005-03-30 16:22:03.020693364 -0800
@@ -514,6 +514,7 @@ EXP_ERROR_RETURN:
}
GLOBAL_IEEE754_END(fmodf)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
{ .mfi
diff -uprN sysdeps/ia64/fpu-old/e_fmodl.S sysdeps/ia64/fpu/e_fmodl.S
--- sysdeps/ia64/fpu-old/e_fmodl.S 2005-01-07 14:13:54.000000000 -0800
+++ sysdeps/ia64/fpu/e_fmodl.S 2005-03-30 16:22:03.033691684 -0800
@@ -1,7 +1,7 @@
.file "fmodl.s"
-// Copyright (c) 2000 - 2003, Intel Corporation
+// Copyright (c) 2000 - 2004, Intel Corporation
// All rights reserved.
//
// Contributed 2000 by the Intel Numerics Group, Intel Corporation
@@ -43,56 +43,88 @@
// 03/02/00 New Algorithm
// 04/04/00 Unwind support added
// 08/15/00 Bundle added after call to __libm_error_support to properly
-// set [the previously overwritten] GR_Parameter_RESULT.
+// set [ the previously overwritten ] GR_Parameter_RESULT.
// 11/28/00 Set FR_Y to f9
-// 03/11/02 Fixed flags for fmodl(qnan,zero)
+// 03/11/02 Fixed flags for fmodl(qnan, zero)
// 05/20/02 Cleaned up namespace and sf0 syntax
-// 02/10/03 Reordered header: .section, .global, .proc, .align
-// 04/28/03 Fix: fmod(sNaN,0) no longer sets errno
+// 02/10/03 Reordered header:.section,.global,.proc,.align
+// 04/28/03 Fix: fmod(sNaN, 0) no longer sets errno
+// 11/23/04 Reformatted routine and improved speed
//
// API
//====================================================================
-// long double fmodl(long double,long double);
+// long double fmodl(long double, long double);
//
// Overview of operation
//====================================================================
-// fmod(a,b)=a-i*b,
-// where i is an integer such that, if b!=0,
-// |i|<|a/b| and |a/b-i|<1
+// fmod(a, b)= a-i*b,
+// where i is an integer such that, if b!= 0,
+// |i|<|a/b| and |a/b-i|<1
//
// Algorithm
//====================================================================
// a). if |a|<|b|, return a
// b). get quotient and reciprocal overestimates accurate to
-// 33 bits (q2,y2)
+// 33 bits (q2, y2)
// c). if the exponent difference (exponent(a)-exponent(b))
-// is less than 32, truncate quotient to integer and
-// finish in one iteration
-// d). if exponent(a)-exponent(b)>=32 (q2>=2^32)
-// round quotient estimate to single precision (k=RN(q2)),
-// calculate partial remainder (a'=a-k*b),
-// get quotient estimate (a'*y2), and repeat from c).
+// is less than 32, truncate quotient to integer and
+// finish in one iteration
+// d). if exponent(a)-exponent(b)>= 32 (q2>= 2^32)
+// round quotient estimate to single precision (k= RN(q2)),
+// calculate partial remainder (a'= a-k*b),
+// get quotient estimate (a'*y2), and repeat from c).
//
// Registers used
//====================================================================
-// Predicate registers: p6-p11
-// General registers: r2,r29,r32 (ar.pfs), r33-r39
-// Floating point registers: f6-f15
-
-GR_SAVE_B0 = r33
-GR_SAVE_PFS = r34
-GR_SAVE_GP = r35
-GR_SAVE_SP = r36
-
-GR_Parameter_X = r37
-GR_Parameter_Y = r38
-GR_Parameter_RESULT = r39
-GR_Parameter_TAG = r40
-
-FR_X = f10
-FR_Y = f9
-FR_RESULT = f8
+GR_SMALLBIASEXP = r2
+GR_2P32 = r3
+GR_SMALLBIASEXP = r20
+GR_ROUNDCONST = r21
+GR_SIG_B = r22
+GR_ARPFS = r23
+GR_TMP1 = r24
+GR_TMP2 = r25
+GR_TMP3 = r26
+
+GR_SAVE_B0 = r33
+GR_SAVE_PFS = r34
+GR_SAVE_GP = r35
+GR_SAVE_SP = r36
+
+GR_Parameter_X = r37
+GR_Parameter_Y = r38
+GR_Parameter_RESULT = r39
+GR_Parameter_TAG = r40
+
+FR_X = f10
+FR_Y = f9
+FR_RESULT = f8
+
+FR_ABS_A = f6
+FR_ABS_B = f7
+FR_Y_INV = f10
+FR_SMALLBIAS = f11
+FR_E0 = f12
+FR_Q = f13
+FR_E1 = f14
+FR_2P32 = f15
+FR_TMPX = f32
+FR_TMPY = f33
+FR_ROUNDCONST = f34
+FR_QINT = f35
+FR_QRND24 = f36
+FR_NORM_B = f37
+FR_TMP = f38
+FR_TMP2 = f39
+FR_DFLAG = f40
+FR_Y_INV0 = f41
+FR_Y_INV1 = f42
+FR_Q0 = f43
+FR_Q1 = f44
+FR_QINT_Z = f45
+FR_QREM = f46
+FR_B_SGN_A = f47
.section .text
GLOBAL_IEEE754_ENTRY(fmodl)
@@ -101,495 +133,540 @@ GLOBAL_IEEE754_ENTRY(fmodl)
// result in f8
{ .mfi
- alloc r32=ar.pfs,1,4,4,0
- // f6=|a|
- fmerge.s f6=f0,f8
- mov r2 = 0x0ffdd
-}
- {.mfi
- getf.sig r29=f9
- // f7=|b|
- fmerge.s f7=f0,f9
- nop.i 0;;
+ getf.sig GR_SIG_B = f9
+ // FR_ABS_A = |a|
+ fmerge.s FR_ABS_A = f0, f8
+ mov GR_SMALLBIASEXP = 0x0ffdd
}
+{ .mfi
+ nop.m 0
+ // FR_ABS_B = |b|
+ fmerge.s FR_ABS_B = f0, f9
+ nop.i 0
+}
+;;
{ .mfi
- setf.exp f11 = r2
- // (1) y0
- frcpa.s1 f10,p6=f6,f7
- nop.i 0;;
+ setf.exp FR_SMALLBIAS = GR_SMALLBIASEXP
+ // (1) y0
+ frcpa.s1 FR_Y_INV0, p6 = FR_ABS_A, FR_ABS_B
+ nop.i 0
+}
+;;
+
+{ .mlx
+ nop.m 0
+ movl GR_ROUNDCONST = 0x33a00000
}
+;;
// eliminate special cases
-{.mmi
-nop.m 0
-nop.m 0
-// y pseudo-zero ?
-cmp.eq p7,p10=r29,r0;;
+{ .mmi
+ nop.m 0
+ nop.m 0
+ // y pseudo-zero ?
+ cmp.eq p7, p10 = GR_SIG_B, r0
+}
+;;
+
+// set p7 if b +/-NAN, +/-inf, +/-0
+{ .mfi
+ nop.m 0
+ (p10) fclass.m p7, p10 = f9, 0xe7
+ nop.i 0
+}
+;;
+
+{ .mfi
+ mov GR_2P32 = 0x1001f
+ // (2) q0 = a*y0
+ (p6) fma.s1 FR_Q0 = FR_ABS_A, FR_Y_INV0, f0
+ nop.i 0
+}
+{ .mfi
+ nop.m 0
+ // (3) e0 = 1 - b * y0
+ (p6) fnma.s1 FR_E0 = FR_ABS_B, FR_Y_INV0, f1
+ nop.i 0
}
+;;
-// Y +-NAN, +-inf, +-0? p7
+// set p9 if a +/-NAN, +/-inf
{ .mfi
- nop.m 999
-(p10) fclass.m p7,p10 = f9, 0xe7
- nop.i 999;;
+ nop.m 0
+ fclass.m.unc p9, p11 = f8, 0xe3
+ nop.i 0
}
+ // |a| < |b|? Return a, p8=1
+{ .mfi
+ nop.m 0
+ (p10) fcmp.lt.unc.s1 p8, p0 = FR_ABS_A, FR_ABS_B
+ nop.i 0
+}
+;;
-// qnan snan inf norm unorm 0 -+
-// 1 1 1 0 0 0 11
-// e 3
-// X +-NAN, +-inf, ? p9
+// set p7 if b +/-NAN, +/-inf, +/-0
+{ .mfi
+ nop.m 0
+ // pseudo-NaN ?
+ (p10) fclass.nm p7, p0 = f9, 0xff
+ nop.i 0
+}
+;;
+// set p9 if a is +/-NaN, +/-Inf
{ .mfi
- nop.m 999
- fclass.m.unc p9,p11 = f8, 0xe3
- nop.i 999
+ nop.m 0
+ (p11) fclass.nm p9, p0 = f8, 0xff
+ nop.i 0
}
+{ .mfi
+ nop.m 0
+ // b denormal ? set D flag (if |a|<|b|)
+ (p8) fnma.s0 FR_DFLAG = f9, f1, f9
+ nop.i 0
+}
+;;
-// |x| < |y|? Return x p8
{ .mfi
- nop.m 999
-(p10) fcmp.lt.unc.s1 p8,p0 = f6,f7
- nop.i 999 ;;
+ // FR_2P32 = 2^32
+ setf.exp FR_2P32 = GR_2P32
+ // (4) q1 = q0+e0*q0
+ (p6) fma.s1 FR_Q1 = FR_E0, FR_Q0, FR_Q0
+ nop.i 0
}
+{ .mfi
+ nop.m 0
+ // (5) e1 = e0 * e0 + 2^-34
+ (p6) fma.s1 FR_E1 = FR_E0, FR_E0, FR_SMALLBIAS
+ nop.i 0
+}
+;;
- { .mfi
- mov r2=0x1001f
- // (2) q0=a*y0
- (p6) fma.s1 f13=f6,f10,f0
- nop.i 0
-} { .mfi
- nop.m 0
- // (3) e0 = 1 - b * y0
- (p6) fnma.s1 f12=f7,f10,f1
- nop.i 0;;
+{ .mfi
+ nop.m 0
+ // normalize a (if |a|<|b|)
+ (p8) fma.s0 f8 = f8, f1, f0
+ nop.i 0
+}
+{ .bbb
+ (p9) br.cond.spnt FMOD_A_NAN_INF
+ (p7) br.cond.spnt FMOD_B_NAN_INF_ZERO
+ // if |a|<|b|, return
+ (p8) br.ret.spnt b0
}
+;;
+
-// Y +-NAN, +-inf, +-0? p7
{ .mfi
- nop.m 999
- // pseudo-NaN ?
-(p10) fclass.nm p7,p0 = f9, 0xff
- nop.i 999
+ nop.m 0
+ // (6) y1 = y0 + e0 * y0
+ (p6) fma.s1 FR_Y_INV1 = FR_E0, FR_Y_INV0, FR_Y_INV0
+ nop.i 0
}
+;;
-// qnan snan inf norm unorm 0 -+
-// 1 1 1 0 0 0 11
-// e 3
-// X +-NAN, +-inf, ? p9
+{ .mfi
+ nop.m 0
+ // a denormal ? set D flag
+ // b denormal ? set D flag
+ fcmp.eq.s0 p12,p0 = FR_ABS_A, FR_ABS_B
+ nop.i 0
+}
+{ .mfi
+ // set FR_ROUNDCONST = 1.25*2^{-24}
+ setf.s FR_ROUNDCONST = GR_ROUNDCONST
+ // (7) q2 = q1+e1*q1
+ (p6) fma.s1 FR_Q = FR_Q1, FR_E1, FR_Q1
+ nop.i 0
+}
+;;
{ .mfi
- nop.m 999
-(p11) fclass.nm p9,p0 = f8, 0xff
- nop.i 999;;
+ nop.m 0
+ fmerge.s FR_B_SGN_A = f8, f9
+ nop.i 0
+}
+{ .mfi
+ nop.m 0
+ // (8) y2 = y1 + e1 * y1
+ (p6) fma.s1 FR_Y_INV = FR_E1, FR_Y_INV1, FR_Y_INV1
+ // set p6 = 0, p10 = 0
+ cmp.ne.and p6, p10 = r0, r0
}
+;;
+// will compute integer quotient bits (24 bits per iteration)
+.align 32
+loop64:
{ .mfi
- nop.m 0
- // y denormal ? set D flag (if |x|<|y|)
- (p8) fnma.s0 f10=f9,f1,f9
- nop.i 0;;
+ nop.m 0
+ // compare q2, 2^32
+ fcmp.lt.unc.s1 p8, p7 = FR_Q, FR_2P32
+ nop.i 0
}
+{ .mfi
+ nop.m 0
+ // will truncate quotient to integer, if exponent<32 (in advance)
+ fcvt.fx.trunc.s1 FR_QINT = FR_Q
+ nop.i 0
+}
+;;
+{ .mfi
+ nop.m 0
+ // if exponent>32 round quotient to single precision (perform in advance)
+ fma.s.s1 FR_QRND24 = FR_Q, f1, f0
+ nop.i 0
+}
+;;
-{.mfi
- nop.m 0
- // normalize x (if |x|<|y|)
- (p8) fma.s0 f8=f8,f1,f0
- nop.i 0
+{ .mfi
+ nop.m 0
+ // set FR_ROUNDCONST = sgn(a)
+ (p8) fmerge.s FR_ROUNDCONST = f8, f1
+ nop.i 0
}
-{.bbb
- (p9) br.cond.spnt FMOD_X_NAN_INF
- (p7) br.cond.spnt FMOD_Y_NAN_INF_ZERO
- // if |x|<|y|, return
- (p8) br.ret.spnt b0;;
+{ .mfi
+ nop.m 0
+ // normalize truncated quotient
+ (p8) fcvt.xf FR_QRND24 = FR_QINT
+ nop.i 0
}
+;;
- {.mfi
- nop.m 0
- // x denormal ? set D flag
- fnma.s0 f32=f6,f1,f6
- nop.i 0
+{ .mfi
+ nop.m 0
+ // calculate remainder (assuming FR_QRND24 = RZ(Q))
+ (p7) fnma.s1 FR_E1 = FR_QRND24, FR_ABS_B, FR_ABS_A
+ nop.i 0
}
-{.mfi
- nop.m 0
- // y denormal ? set D flag
- fnma.s0 f33=f7,f1,f7
- nop.i 0;;
+{ .mfi
+ nop.m 0
+ // also if exponent>32, round quotient to single precision
+ // and subtract 1 ulp: q = q-q*(1.25*2^{-24})
+ (p7) fnma.s.s1 FR_QINT_Z = FR_QRND24, FR_ROUNDCONST, FR_QRND24
+ nop.i 0
}
+;;
- {.mfi
- // f15=2^32
- setf.exp f15=r2
- // (4) q1=q0+e0*q0
- (p6) fma.s1 f13=f12,f13,f13
- nop.i 0
+{ .mfi
+ nop.m 0
+ // (p8) calculate remainder (82-bit format)
+ (p8) fnma.s1 FR_QREM = FR_QRND24, FR_ABS_B, FR_ABS_A
+ nop.i 0
}
{ .mfi
- nop.m 0
- // (5) e1 = e0 * e0 + 2^-34
- (p6) fma.s1 f14=f12,f12,f11
- nop.i 0;;
+ nop.m 0
+ // (p7) calculate remainder (assuming FR_QINT_Z = RZ(Q))
+ (p7) fnma.s1 FR_ABS_A = FR_QINT_Z, FR_ABS_B, FR_ABS_A
+ nop.i 0
}
-{.mlx
- nop.m 0
- movl r2=0x33a00000;;
+;;
+
+{ .mfi
+ nop.m 0
+ // Final iteration (p8): is FR_ABS_A the correct remainder
+ // (quotient was not overestimated) ?
+ (p8) fcmp.lt.unc.s1 p6, p10 = FR_QREM, f0
+ nop.i 0
}
+;;
+
{ .mfi
- nop.m 0
- // (6) y1 = y0 + e0 * y0
- (p6) fma.s1 f10=f12,f10,f10
- nop.i 0;;
+ nop.m 0
+ // get new quotient estimation: a'*y2
+ (p7) fma.s1 FR_Q = FR_E1, FR_Y_INV, f0
+ nop.i 0
}
-{.mfi
- // set f12=1.25*2^{-24}
- setf.s f12=r2
- // (7) q2=q1+e1*q1
- (p6) fma.s1 f13=f13,f14,f13
- nop.i 0;;
+{ .mfb
+ nop.m 0
+ // was FR_Q = RZ(Q) ? (then new remainder FR_E1> = 0)
+ (p7) fcmp.lt.unc.s1 p7, p9 = FR_E1, f0
+ nop.b 0
}
-{.mfi
- nop.m 0
- fmerge.s f9=f8,f9
- nop.i 0
+;;
+
+.pred.rel "mutex", p6, p10
+{ .mfb
+ nop.m 0
+ // add b to estimated remainder (to cover the case when the quotient was
+ // overestimated)
+ // also set correct sign by using
+ // FR_B_SGN_A = |b|*sgn(a), FR_ROUNDCONST = sgn(a)
+ (p6) fma.s0 f8 = FR_QREM, FR_ROUNDCONST, FR_B_SGN_A
+ nop.b 0
}
+{ .mfb
+ nop.m 0
+ // set correct sign of result before returning: FR_ROUNDCONST = sgn(a)
+ (p10) fma.s0 f8 = FR_QREM, FR_ROUNDCONST, f0
+ (p8) br.ret.sptk b0
+}
+;;
+
{ .mfi
- nop.m 0
- // (8) y2 = y1 + e1 * y1
- (p6) fma.s1 f10=f14,f10,f10
- // set p6=0, p10=0
- cmp.ne.and p6,p10=r0,r0;;
+ nop.m 0
+ // if f13! = RZ(Q), get alternative quotient estimation: a''*y2
+ (p7) fma.s1 FR_Q = FR_ABS_A, FR_Y_INV, f0
+ nop.i 0
}
+{ .mfb
+ nop.m 0
+ // if FR_E1 was RZ(Q), set remainder to FR_E1
+ (p9) fma.s1 FR_ABS_A = FR_E1, f1, f0
+ br.cond.sptk loop64
+}
+;;
+FMOD_A_NAN_INF:
-.align 32
-loop64:
- {.mfi
- nop.m 0
- // compare q2, 2^32
- fcmp.lt.unc.s1 p8,p7=f13,f15
- nop.i 0
-}
- {.mfi
- nop.m 0
- // will truncate quotient to integer, if exponent<32 (in advance)
- fcvt.fx.trunc.s1 f11=f13
- nop.i 0;;
-}
- {.mfi
- nop.m 0
- // if exponent>32, round quotient to single precision (perform in advance)
- fma.s.s1 f13=f13,f1,f0
- nop.i 0;;
-}
-
-
- {.mfi
- nop.m 0
- // set f12=sgn(a)
- (p8) fmerge.s f12=f8,f1
- nop.i 0
-}
- {.mfi
- nop.m 0
- // normalize truncated quotient
- (p8) fcvt.xf f13=f11
- nop.i 0;;
-}
- { .mfi
- nop.m 0
- // calculate remainder (assuming f13=RZ(Q))
- (p7) fnma.s1 f14=f13,f7,f6
- nop.i 0
-}
- {.mfi
- nop.m 0
- // also if exponent>32, round quotient to single precision
- // and subtract 1 ulp: q=q-q*(1.25*2^{-24})
- (p7) fnma.s.s1 f11=f13,f12,f13
- nop.i 0;;
-}
-
- {.mfi
- nop.m 0
- // (p8) calculate remainder (82-bit format)
- (p8) fnma.s1 f11=f13,f7,f6
- nop.i 0
-}
- {.mfi
- nop.m 0
- // (p7) calculate remainder (assuming f11=RZ(Q))
- (p7) fnma.s1 f6=f11,f7,f6
- nop.i 0;;
-}
-
-
- {.mfi
- nop.m 0
- // Final iteration (p8): is f6 the correct remainder (quotient was not overestimated) ?
- (p8) fcmp.lt.unc.s1 p6,p10=f11,f0
- nop.i 0;;
-}
- {.mfi
- nop.m 0
- // get new quotient estimation: a'*y2
- (p7) fma.s1 f13=f14,f10,f0
- nop.i 0
-}
- {.mfb
- nop.m 0
- // was f13=RZ(Q) ? (then new remainder f14>=0)
- (p7) fcmp.lt.unc.s1 p7,p9=f14,f0
- nop.b 0;;
-}
-
-
-.pred.rel "mutex",p6,p10
- {.mfb
- nop.m 0
- // add b to estimated remainder (to cover the case when the quotient was overestimated)
- // also set correct sign by using f9=|b|*sgn(a), f12=sgn(a)
- (p6) fma.s0 f8=f11,f12,f9
- nop.b 0
-}
- {.mfb
- nop.m 0
- // set correct sign of result before returning: f12=sgn(a)
- (p10) fma.s0 f8=f11,f12,f0
- (p8) br.ret.sptk b0;;
-}
- {.mfi
- nop.m 0
- // if f13!=RZ(Q), get alternative quotient estimation: a''*y2
- (p7) fma.s1 f13=f6,f10,f0
- nop.i 0
-}
- {.mfb
- nop.m 0
- // if f14 was RZ(Q), set remainder to f14
- (p9) mov f6=f14
- br.cond.sptk loop64;;
-}
-
-
-
-FMOD_X_NAN_INF:
-
-// Y zero ?
-{.mfi
- nop.m 0
- fclass.m p10,p0=f8,0xc3 // Test x=nan
- nop.i 0
-}
-{.mfi
- nop.m 0
- fma.s1 f10=f9,f1,f0
- nop.i 0;;
-}
-
-{.mfi
- nop.m 0
- fma.s0 f8=f8,f1,f0
- nop.i 0
-}
-{.mfi
- nop.m 0
-(p10) fclass.m p10,p0=f9,0x07 // Test x=nan, and y=zero
- nop.i 0;;
-}
-{.mfb
- nop.m 0
- fcmp.eq.unc.s1 p11,p0=f10,f0
-(p10) br.ret.spnt b0;; // Exit with result=x if x=nan and y=zero
-}
-{.mib
- nop.m 0
- nop.i 0
- // if Y zero
- (p11) br.cond.spnt FMOD_Y_ZERO;;
-}
-
-// X infinity? Return QNAN indefinite
-{ .mfi
- // set p7 t0 0
- cmp.ne p7,p0=r0,r0
- fclass.m.unc p8,p9 = f8, 0x23
- nop.i 999;;
-}
-// Y NaN ?
-{.mfi
- nop.m 999
-(p8) fclass.m p9,p8=f9,0xc3
- nop.i 0;;
-}
-// Y not pseudo-zero ? (r29 holds significand)
-{.mii
- nop.m 999
-(p8) cmp.ne p7,p0=r29,r0
- nop.i 0;;
-}
-{.mfi
- nop.m 999
-(p8) frcpa.s0 f8,p0 = f8,f8
- nop.i 0
-}
-{ .mfi
- nop.m 999
- // also set Denormal flag if necessary
-(p7) fnma.s0 f9=f9,f1,f9
- nop.i 999 ;;
+// b zero ?
+{ .mfi
+ nop.m 0
+ fclass.m p10, p0 = f8, 0xc3 // Test a = nan
+ nop.i 0
+}
+{ .mfi
+ nop.m 0
+ fma.s1 FR_NORM_B = f9, f1, f0
+ nop.i 0
}
+;;
+
+{ .mfi
+ nop.m 0
+ fma.s0 f8 = f8, f1, f0
+ nop.i 0
+}
+{ .mfi
+ nop.m 0
+ (p10) fclass.m p10, p0 = f9, 0x07 // Test x = nan, and y = zero
+ nop.i 0
+}
+;;
{ .mfb
- nop.m 999
-(p8) fma.s0 f8=f8,f1,f0
- nop.b 999 ;;
+ nop.m 0
+ fcmp.eq.unc.s1 p11, p0 = FR_NORM_B, f0
+ (p10) br.ret.spnt b0 // Exit with result = a if a = nan and b = zero
+}
+;;
+
+{ .mib
+ nop.m 0
+ nop.i 0
+ // if Y zero
+ (p11) br.cond.spnt FMOD_B_ZERO
+}
+;;
+
+// a= infinity? Return QNAN indefinite
+{ .mfi
+ // set p7 t0 0
+ cmp.ne p7, p0 = r0, r0
+ fclass.m.unc p8, p9 = f8, 0x23
+ nop.i 0
+}
+;;
+
+// b NaN ?
+{ .mfi
+ nop.m 0
+ (p8) fclass.m p9, p8 = f9, 0xc3
+ nop.i 0
+}
+;;
+
+// b not pseudo-zero ? (GR_SIG_B holds significand)
+{ .mii
+ nop.m 0
+ (p8) cmp.ne p7, p0 = GR_SIG_B, r0
+ nop.i 0
}
+;;
+
+{ .mfi
+ nop.m 0
+ (p8) frcpa.s0 f8, p0 = f8, f8
+ nop.i 0
+}
+{ .mfi
+ nop.m 0
+ // also set Denormal flag if necessary
+ (p7) fnma.s0 f9 = f9, f1, f9
+ nop.i 0
+}
+;;
{ .mfb
- nop.m 999
-(p9) frcpa.s0 f8,p7=f8,f9
- br.ret.sptk b0 ;;
+ nop.m 0
+ (p8) fma.s0 f8 = f8, f1, f0
+ nop.b 0
}
+;;
+{ .mfb
+ nop.m 0
+ (p9) frcpa.s0 f8, p7 = f8, f9
+ br.ret.sptk b0
+}
+;;
-FMOD_Y_NAN_INF_ZERO:
-// Y INF
+FMOD_B_NAN_INF_ZERO:
+// b INF
{ .mfi
- nop.m 999
- fclass.m.unc p7,p0 = f9, 0x23
- nop.i 999 ;;
+ nop.m 0
+ fclass.m.unc p7, p0 = f9, 0x23
+ nop.i 0
}
+;;
{ .mfb
- nop.m 999
-(p7) fma.s0 f8=f8,f1,f0
-(p7) br.ret.spnt b0 ;;
+ nop.m 0
+ (p7) fma.s0 f8 = f8, f1, f0
+ (p7) br.ret.spnt b0
}
+;;
-// Y NAN?
+// b NAN?
{ .mfi
- nop.m 999
- fclass.m.unc p9,p10 = f9, 0xc3
- nop.i 999 ;;
+ nop.m 0
+ fclass.m.unc p9, p10 = f9, 0xc3
+ nop.i 0
}
+;;
+
{ .mfi
- nop.m 999
-(p10) fclass.nm p9,p0 = f9, 0xff
- nop.i 999 ;;
+ nop.m 0
+ (p10) fclass.nm p9, p0 = f9, 0xff
+ nop.i 0
}
+;;
{ .mfb
- nop.m 999
-(p9) fma.s0 f8=f9,f1,f0
-(p9) br.ret.spnt b0 ;;
+ nop.m 0
+ (p9) fma.s0 f8 = f9, f1, f0
+ (p9) br.ret.spnt b0
}
+;;
-FMOD_Y_ZERO:
+FMOD_B_ZERO:
// Y zero? Must be zero at this point
// because it is the only choice left.
// Return QNAN indefinite
-{.mfi
- nop.m 0
- // set Invalid
- frcpa.s0 f12,p0=f0,f0
- nop.i 0
-}
-// X NAN?
{ .mfi
- nop.m 999
- fclass.m.unc p9,p10 = f8, 0xc3
- nop.i 999 ;;
+ nop.m 0
+ // set Invalid
+ frcpa.s0 FR_TMP, p0 = f0, f0
+ nop.i 0
}
+;;
+
+// a NAN?
{ .mfi
- nop.m 999
-(p10) fclass.nm p9,p10 = f8, 0xff
- nop.i 999 ;;
+ nop.m 0
+ fclass.m.unc p9, p10 = f8, 0xc3
+ nop.i 0
}
+;;
-{.mfi
- nop.m 999
- (p9) frcpa.s0 f11,p7=f8,f0
- nop.i 0;;
+{ .mfi
+ alloc GR_ARPFS = ar.pfs, 1, 4, 4, 0
+ (p10) fclass.nm p9, p10 = f8, 0xff
+ nop.i 0
}
-
+;;
{ .mfi
- nop.m 999
-(p10) frcpa.s0 f11,p7 = f9,f9
- mov GR_Parameter_TAG = 120 ;;
+ nop.m 0
+ (p9) frcpa.s0 FR_TMP2, p7 = f8, f0
+ nop.i 0
}
+;;
{ .mfi
- nop.m 999
- fmerge.s f10 = f8, f8
- nop.i 999
+ nop.m 0
+ (p10) frcpa.s0 FR_TMP2, p7 = f9, f9
+ mov GR_Parameter_TAG = 120
}
+;;
+{ .mfi
+ nop.m 0
+ fmerge.s FR_X = f8, f8
+ nop.i 0
+}
{ .mfb
- nop.m 999
- fma.s0 f8=f11,f1,f0
- br.sptk __libm_error_region;;
+ nop.m 0
+ fma.s0 f8 = FR_TMP2, f1, f0
+ br.sptk __libm_error_region
}
+;;
GLOBAL_IEEE754_END(fmodl)
-
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
{ .mfi
- add GR_Parameter_Y=-32,sp // Parameter 2 value
- nop.f 0
-.save ar.pfs,GR_SAVE_PFS
- mov GR_SAVE_PFS=ar.pfs // Save ar.pfs
+ add GR_Parameter_Y = -32, sp // Parameter 2 value
+ nop.f 0
+.save ar.pfs, GR_SAVE_PFS
+ mov GR_SAVE_PFS = ar.pfs // Save ar.pfs
}
{ .mfi
.fframe 64
- add sp=-64,sp // Create new stack
- nop.f 0
- mov GR_SAVE_GP=gp // Save gp
-};;
+ add sp = -64, sp // Create new stack
+ nop.f 0
+ mov GR_SAVE_GP = gp // Save gp
+}
+;;
+
{ .mmi
- stfe [GR_Parameter_Y] = FR_Y,16 // Save Parameter 2 on stack
- add GR_Parameter_X = 16,sp // Parameter 1 address
-.save b0, GR_SAVE_B0
- mov GR_SAVE_B0=b0 // Save b0
-};;
+ stfe [ GR_Parameter_Y ] = FR_Y, 16 // Save Parameter 2 on stack
+ add GR_Parameter_X = 16, sp // Parameter 1 address
+.save b0, GR_SAVE_B0
+ mov GR_SAVE_B0 = b0 // Save b0
+}
+;;
+
.body
{ .mib
- stfe [GR_Parameter_X] = FR_X // Store Parameter 1 on stack
- add GR_Parameter_RESULT = 0,GR_Parameter_Y
- nop.b 0 // Parameter 3 address
+ stfe [ GR_Parameter_X ] = FR_X // Store Parameter 1 on stack
+ add GR_Parameter_RESULT = 0, GR_Parameter_Y
+ nop.b 0 // Parameter 3 address
}
{ .mib
- stfe [GR_Parameter_Y] = FR_RESULT // Store Parameter 3 on stack
- add GR_Parameter_Y = -16,GR_Parameter_Y
- br.call.sptk b0=__libm_error_support# // Call error handling function
-};;
+ stfe [ GR_Parameter_Y ] = FR_RESULT // Store Parameter 3 on stack
+ add GR_Parameter_Y = -16, GR_Parameter_Y
+ br.call.sptk b0 = __libm_error_support# // Call error handling function
+}
+;;
+
{ .mmi
- nop.m 0
- nop.m 0
- add GR_Parameter_RESULT = 48,sp
-};;
+ nop.m 0
+ nop.m 0
+ add GR_Parameter_RESULT = 48, sp
+}
+;;
+
{ .mmi
- ldfe f8 = [GR_Parameter_RESULT] // Get return result off stack
+ ldfe f8 = [ GR_Parameter_RESULT ] // Get return result off stack
.restore sp
- add sp = 64,sp // Restore stack pointer
- mov b0 = GR_SAVE_B0 // Restore return address
-};;
+ add sp = 64, sp // Restore stack pointer
+ mov b0 = GR_SAVE_B0 // Restore return address
+}
+;;
+
{ .mib
- mov gp = GR_SAVE_GP // Restore gp
- mov ar.pfs = GR_SAVE_PFS // Restore ar.pfs
- br.ret.sptk b0 // Return
-};;
+ mov gp = GR_SAVE_GP // Restore gp
+ mov ar.pfs = GR_SAVE_PFS // Restore ar.pfs
+ br.ret.sptk b0 // Return
+}
+;;
LOCAL_LIBM_END(__libm_error_region)
-
-
-
-.type __libm_error_support#,@function
+.type __libm_error_support#, @function
.global __libm_error_support#
-
-
diff -uprN sysdeps/ia64/fpu-old/e_fmod.S sysdeps/ia64/fpu/e_fmod.S
--- sysdeps/ia64/fpu-old/e_fmod.S 2005-01-07 14:13:54.000000000 -0800
+++ sysdeps/ia64/fpu/e_fmod.S 2005-03-30 16:22:03.036691296 -0800
@@ -499,6 +499,7 @@ FMOD_Y_ZERO:
}
GLOBAL_IEEE754_END(fmod)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
{ .mfi
diff -uprN sysdeps/ia64/fpu-old/e_hypotf.S sysdeps/ia64/fpu/e_hypotf.S
--- sysdeps/ia64/fpu-old/e_hypotf.S 2005-01-07 14:13:55.000000000 -0800
+++ sysdeps/ia64/fpu/e_hypotf.S 2005-03-30 16:22:03.064687678 -0800
@@ -106,6 +106,7 @@ FR_RESULT = f8
LOCAL_LIBM_ENTRY(cabsf)
LOCAL_LIBM_END(cabsf)
+
GLOBAL_IEEE754_ENTRY(hypotf)
{.mfi
alloc r32= ar.pfs,0,4,4,0
@@ -337,6 +338,7 @@ GLOBAL_IEEE754_ENTRY(hypotf)
(p9) br.ret.sptk b0;;
}
GLOBAL_IEEE754_END(hypotf)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
{ .mii
diff -uprN sysdeps/ia64/fpu-old/e_hypotl.S sysdeps/ia64/fpu/e_hypotl.S
--- sysdeps/ia64/fpu-old/e_hypotl.S 2005-01-07 14:13:55.000000000 -0800
+++ sysdeps/ia64/fpu/e_hypotl.S 2005-03-30 16:22:03.067687290 -0800
@@ -105,6 +105,7 @@ FR_RESULT = f8
LOCAL_LIBM_ENTRY(cabsl)
LOCAL_LIBM_END(cabsl)
+
GLOBAL_IEEE754_ENTRY(hypotl)
{.mfi
alloc r32= ar.pfs,0,4,4,0
@@ -421,6 +422,7 @@ GLOBAL_IEEE754_ENTRY(hypotl)
(p9) br.ret.sptk b0;;
}
GLOBAL_IEEE754_END(hypotl)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
{ .mfi
diff -uprN sysdeps/ia64/fpu-old/e_hypot.S sysdeps/ia64/fpu/e_hypot.S
--- sysdeps/ia64/fpu-old/e_hypot.S 2005-01-07 14:13:55.000000000 -0800
+++ sysdeps/ia64/fpu/e_hypot.S 2005-03-30 16:22:03.078685868 -0800
@@ -106,6 +106,7 @@ FR_RESULT = f8
LOCAL_LIBM_ENTRY(cabs)
LOCAL_LIBM_END(cabs)
+
GLOBAL_IEEE754_ENTRY(hypot)
{.mfi
@@ -384,6 +385,7 @@ GLOBAL_IEEE754_ENTRY(hypot)
(p9) br.ret.sptk b0;;
}
GLOBAL_IEEE754_END(hypot)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
{ .mfi
diff -uprN sysdeps/ia64/fpu-old/e_lgammaf_r.c sysdeps/ia64/fpu/e_lgammaf_r.c
--- sysdeps/ia64/fpu-old/e_lgammaf_r.c 2005-01-06 03:29:21.000000000 -0800
+++ sysdeps/ia64/fpu/e_lgammaf_r.c 2005-03-30 16:22:03.097683413 -0800
@@ -1,5 +1,6 @@
/* file: lgammaf_r.c */
+
// Copyright (c) 2002 Intel Corporation
// All rights reserved.
//
@@ -20,7 +21,6 @@
// products derived from this software without specific prior written
// permission.
-// WARRANTY DISCLAIMER
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
diff -uprN sysdeps/ia64/fpu-old/e_lgammal_r.c sysdeps/ia64/fpu/e_lgammal_r.c
--- sysdeps/ia64/fpu-old/e_lgammal_r.c 2005-01-06 03:29:21.000000000 -0800
+++ sysdeps/ia64/fpu/e_lgammal_r.c 2005-03-30 16:22:03.100683025 -0800
@@ -1,5 +1,6 @@
/* file: lgammal_r.c */
+
// Copyright (c) 2002 Intel Corporation
// All rights reserved.
//
@@ -20,7 +21,6 @@
// products derived from this software without specific prior written
// permission.
-// WARRANTY DISCLAIMER
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
diff -uprN sysdeps/ia64/fpu-old/e_lgamma_r.c sysdeps/ia64/fpu/e_lgamma_r.c
--- sysdeps/ia64/fpu-old/e_lgamma_r.c 2005-01-06 03:29:21.000000000 -0800
+++ sysdeps/ia64/fpu/e_lgamma_r.c 2005-03-30 16:22:03.114681216 -0800
@@ -1,5 +1,6 @@
/* file: lgamma_r.c */
+
// Copyright (c) 2002 Intel Corporation
// All rights reserved.
//
@@ -20,7 +21,6 @@
// products derived from this software without specific prior written
// permission.
-// WARRANTY DISCLAIMER
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
diff -uprN sysdeps/ia64/fpu-old/e_log2f.S sysdeps/ia64/fpu/e_log2f.S
--- sysdeps/ia64/fpu-old/e_log2f.S 2005-01-06 03:29:21.000000000 -0800
+++ sysdeps/ia64/fpu/e_log2f.S 2005-03-30 16:22:03.168674237 -0800
@@ -493,6 +493,7 @@ SPECIAL_log2f:
GLOBAL_LIBM_END(log2f)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
{ .mfi
diff -uprN sysdeps/ia64/fpu-old/e_log2l.S sysdeps/ia64/fpu/e_log2l.S
--- sysdeps/ia64/fpu-old/e_log2l.S 2005-01-06 03:29:21.000000000 -0800
+++ sysdeps/ia64/fpu/e_log2l.S 2005-03-30 16:22:03.205669456 -0800
@@ -761,6 +761,7 @@ LOG2_PSEUDO_ZERO:
GLOBAL_IEEE754_END(log2l)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
{ .mfi
diff -uprN sysdeps/ia64/fpu-old/e_log2.S sysdeps/ia64/fpu/e_log2.S
--- sysdeps/ia64/fpu-old/e_log2.S 2005-01-06 03:29:21.000000000 -0800
+++ sysdeps/ia64/fpu/e_log2.S 2005-03-30 16:22:03.217667905 -0800
@@ -655,6 +655,7 @@ SPECIAL_LOG2:
GLOBAL_LIBM_END(log2)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
{ .mfi
diff -uprN sysdeps/ia64/fpu-old/e_logf.S sysdeps/ia64/fpu/e_logf.S
--- sysdeps/ia64/fpu-old/e_logf.S 2005-01-07 14:13:56.000000000 -0800
+++ sysdeps/ia64/fpu/e_logf.S 2005-03-30 16:22:03.238665191 -0800
@@ -841,6 +841,7 @@ GLOBAL_IEEE754_ENTRY(log10f)
br.cond.sptk logf_log10f_common
};;
GLOBAL_IEEE754_END(log10f)
+
GLOBAL_IEEE754_ENTRY(logf)
{ .mfi
getf.exp GR_Exp = f8 // if x is unorm then must recompute
@@ -1087,6 +1088,7 @@ logf_libm_err:
};;
GLOBAL_IEEE754_END(logf)
+
// Stack operations when calling error support.
// (1) (2) (3) (call) (4)
// sp -> + psp -> + psp -> + sp -> +
diff -uprN sysdeps/ia64/fpu-old/e_logl.S sysdeps/ia64/fpu/e_logl.S
--- sysdeps/ia64/fpu-old/e_logl.S 2005-01-06 03:29:21.000000000 -0800
+++ sysdeps/ia64/fpu/e_logl.S 2005-03-30 16:22:03.242664674 -0800
@@ -634,6 +634,7 @@ GLOBAL_IEEE754_ENTRY(logl)
GLOBAL_IEEE754_END(logl)
+
GLOBAL_IEEE754_ENTRY(log10l)
{ .mfi
alloc r32 = ar.pfs,0,21,4,0
@@ -1144,6 +1145,7 @@ LOGL_64_negative:
GLOBAL_IEEE754_END(log10l)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
{ .mfi
diff -uprN sysdeps/ia64/fpu-old/e_log.S sysdeps/ia64/fpu/e_log.S
--- sysdeps/ia64/fpu-old/e_log.S 2005-01-07 14:13:55.000000000 -0800
+++ sysdeps/ia64/fpu/e_log.S 2005-03-30 16:22:03.284659246 -0800
@@ -1386,6 +1386,7 @@ GLOBAL_IEEE754_ENTRY(log10)
};;
GLOBAL_IEEE754_END(log10)
+
GLOBAL_IEEE754_ENTRY(log)
{ .mfi
getf.exp GR_Exp = f8 // if x is unorm then must recompute
@@ -1667,6 +1668,7 @@ log_libm_err:
};;
GLOBAL_IEEE754_END(log)
+
LOCAL_LIBM_ENTRY(__libm_error_region)
.prologue
{ .mfi
diff -uprN sysdeps/ia64/fpu-old/e_powf.S sysdeps/ia64/fpu/e_powf.S
--- sysdeps/ia64/fpu-old/e_powf.S 2005-01-07 14:13:57.000000000 -0800
+++ sysdeps/ia64/fpu/e_powf.S 2005-03-30 16:22:03.310655886 -0800
@@ -64,6 +64,8 @@
// 05/20/02 Cleaned up namespace and sf0 syntax
// 08/29/02 Improved Itanium 2 performance
// 02/10/03 Reordered header: .section, .global, .proc, .align
+// 10/09/03 Modified algorithm to improve performance, reduce table size, and
+// fix boundary case powf(2.0,-150.0)
//
// API
//==============================================================
@@ -106,37 +108,33 @@
//
// Log(1/Cm) = log(1/frcpa(1+m/256)) where m goes from 0 to 255.
//
-// We tabluate as two doubles, T and t, where T +t is the value itself.
+// We tabluate as one double, T for single precision power
//
-// Log(x) = (K Log(2)_hi + T) + (Log(2)_hi + t) + Log( 1 + (Bx-1))
-// Log(x) = G + delta + Log( 1 + (Bx-1))
+// Log(x) = (K Log(2)_hi + T) + (K Log(2)_lo) + Log( 1 + (Bx-1))
+// Log(x) = G + delta + Log( 1 + (Bx-1))
//
// The Log( 1 + (Bx-1)) can be calculated as a series in r = Bx-1.
//
// Log( 1 + (Bx-1)) = r - rsq/2 + p
+// where p = r^3(P0 + P1*r + P2*r^2)
//
// Then,
//
// yLog(x) = yG + y delta + y(r-rsq/2) + yp
-// yLog(x) = Z1 + e3 + Z2 + Z3 + (e2 + e3)
+// yLog(x) = Z1 + e3 + Z2 + Z3
//
//
-// exp(yLog(x)) = exp(Z1 + Z2 + Z3) exp(e1 + e2 + e3)
+// exp(yLog(x)) = exp(Z1 + Z2) exp(Z3) exp(e3)
//
//
// exp(Z3) is another series.
-// exp(e1 + e2 + e3) is approximated as f3 = 1 + (e1 + e2 + e3)
+// exp(e3) is approximated as f3 = 1 + e3
//
-// Z1 (128/log2) = number of log2/128 in Z1 is N1
-// Z2 (128/log2) = number of log2/128 in Z2 is N2
-//
-// s1 = Z1 - N1 log2/128
-// s2 = Z2 - N2 log2/128
+// exp(Z1 + Z2) = exp(Z)
+// Z (128/log2) = number of log2/128 in Z is N
//
-// s = s1 + s2
-// N = N1 + N2
+// s = Z - N log2/128
//
-// exp(Z1 + Z2) = exp(Z)
// exp(Z) = exp(s) exp(N log2/128)
//
// exp(r) = exp(Z - N log2/128)
@@ -161,13 +159,11 @@
// N log2/128 = M log2 + I2 log2/8 + I1 log2/128
//
// exp(Z) = exp(s) (1+d) exp(log(2^M) + log(2^I2/8) + log(2^I1/128))
-// exp(Z) = exp(s) (1+d1) (1+d2)(2^M) 2^I2/8 2^I1/128
-// exp(Z) = exp(s) f1 f2 (2^M) 2^I2/8 2^I1/128
+// exp(Z) = exp(s) f12 (2^M) 2^I2/8 2^I1/128
//
// I1, I2 are table indices. Use a series for exp(s).
// Then get exp(Z)
//
-// exp(yLog(x)) = exp(Z1 + Z2 + Z3) exp(e1 + e2 + e3)
// exp(yLog(x)) = exp(Z) exp(Z3) f3
// exp(yLog(x)) = exp(Z)f3 exp(Z3)
// exp(yLog(x)) = A exp(Z3)
@@ -331,6 +327,8 @@
// +------------+----------------+-+
// | 13 bits | 50 bits | |
// +------------+----------------+-+
+//
+// Note: For powf only the table of T is needed
// Special Cases
@@ -402,10 +400,17 @@
// integer registers used
+pow_GR_exp_half = r10
+pow_GR_signexp_Xm1 = r11
+pow_GR_tmp = r11
+
pow_GR_signexp_X = r14
pow_GR_17ones = r15
+pow_GR_Fpsr = r15
pow_AD_P = r16
+pow_GR_rcs0_mask = r16
pow_GR_exp_2tom8 = r17
+pow_GR_rcs0 = r17
pow_GR_sig_X = r18
pow_GR_10033 = r19
pow_GR_16ones = r20
@@ -423,9 +428,6 @@ pow_GR_offset = r29
pow_GR_exp_Xm1 = r30
pow_GR_xneg_yodd = r31
-pow_GR_signexp_Xm1 = r35
-pow_GR_int_W1 = r36
-pow_GR_int_W2 = r37
pow_GR_int_N = r38
pow_GR_index1 = r39
pow_GR_index2 = r40
@@ -465,24 +467,20 @@ POW_B = f32
POW_NORM_X = f33
POW_Xm1 = f34
POW_r1 = f34
-POW_P4 = f35
-POW_P5 = f36
POW_NORM_Y = f37
POW_Q2 = f38
-POW_Q3 = f39
+POW_eps = f39
POW_P2 = f40
-POW_P3 = f41
POW_P0 = f42
POW_log2_lo = f43
POW_r = f44
POW_Q0_half = f45
-POW_Q1 = f46
POW_tmp = f47
POW_log2_hi = f48
-POW_Q4 = f49
+POW_Q1 = f49
POW_P1 = f50
POW_log2_by_128_hi = f51
@@ -491,54 +489,33 @@ POW_rsq = f53
POW_Yrcub = f54
POW_log2_by_128_lo = f55
-POW_v6 = f56
POW_xsq = f57
-POW_v4 = f58
POW_v2 = f59
POW_T = f60
-POW_Tt = f61
POW_RSHF = f62
-POW_v21ps = f63
-POW_s4 = f64
+POW_v210 = f63
POW_twoV = f65
POW_U = f66
POW_G = f67
POW_delta = f68
-POW_v3 = f69
POW_V = f70
POW_p = f71
-POW_Z1 = f72
+POW_Z = f72
POW_e3 = f73
-POW_e2 = f74
POW_Z2 = f75
-POW_e1 = f76
POW_W1 = f77
-POW_UmZ2 = f78
-POW_W2 = f79
POW_Z3 = f80
-POW_int_W1 = f81
-POW_e12 = f82
-POW_int_W2 = f83
-POW_UmZ2pV = f84
POW_Z3sq = f85
-POW_e123 = f86
-POW_N1float = f87
-POW_N2float = f88
+POW_Nfloat = f87
POW_f3 = f89
POW_q = f90
-POW_s1 = f91
-POW_Nfloat = f92
-POW_s2 = f93
-POW_f2 = f94
-POW_f1 = f95
-
POW_T1 = f96
POW_T2 = f97
POW_2M = f98
@@ -575,25 +552,18 @@ RODATA
.align 16
LOCAL_OBJECT_START(pow_table_P)
-data8 0x8000F7B249FF332D, 0x0000BFFC // P_5
-data8 0xAAAAAAA9E7902C7F, 0x0000BFFC // P_3
data8 0x80000000000018E5, 0x0000BFFD // P_1
data8 0xb8aa3b295c17f0bc, 0x00004006 // inv_ln2_by_128
//
//
data8 0x3FA5555555554A9E // Q_2
-data8 0x3F8111124F4DD9F9 // Q_3
-data8 0x3FE0000000000000 // Q_0
+data8 0x0000000000000000 // Pad
data8 0x3FC5555555554733 // Q_1
-data8 0x3F56C16D9360FFA0 // Q_4
data8 0x43e8000000000000 // Right shift constant for exp
data8 0xc9e3b39803f2f6af, 0x00003fb7 // ln2_by_128_lo
-data8 0x0000000000000000 // pad to eliminate bank conflicts with pow_table_Q
-data8 0x0000000000000000 // pad to eliminate bank conflicts with pow_table_Q
LOCAL_OBJECT_END(pow_table_P)
LOCAL_OBJECT_START(pow_table_Q)
-data8 0x9249FE7F0DC423CF, 0x00003FFC // P_4
data8 0xCCCCCCCC4ED2BA7F, 0x00003FFC // P_2
data8 0xAAAAAAAAAAAAB505, 0x00003FFD // P_0
data8 0x3fe62e42fefa39e8, 0x3cccd5e4f1d9cc02 // log2 hi lo = +6.93147e-001
@@ -602,262 +572,262 @@ LOCAL_OBJECT_END(pow_table_Q)
LOCAL_OBJECT_START(pow_Tt)
-data8 0x3f60040155d58800, 0x3c93bce0ce3ddd81 // log(1/frcpa(1+0/256))= +1.95503e-003
-data8 0x3f78121214586a00, 0x3cb540e0a5cfc9bc // log(1/frcpa(1+1/256))= +5.87661e-003
-data8 0x3f841929f9683200, 0x3cbdf1d57404da1f // log(1/frcpa(1+2/256))= +9.81362e-003
-data8 0x3f8c317384c75f00, 0x3c69806208c04c22 // log(1/frcpa(1+3/256))= +1.37662e-002
-data8 0x3f91a6b91ac73380, 0x3c7874daa716eb32 // log(1/frcpa(1+4/256))= +1.72376e-002
-data8 0x3f95ba9a5d9ac000, 0x3cacbb84e08d78ac // log(1/frcpa(1+5/256))= +2.12196e-002
-data8 0x3f99d2a807432580, 0x3cbcf80538b441e1 // log(1/frcpa(1+6/256))= +2.52177e-002
-data8 0x3f9d6b2725979800, 0x3c6095e5c8f8f359 // log(1/frcpa(1+7/256))= +2.87291e-002
-data8 0x3fa0c58fa19dfa80, 0x3cb4c5d4e9d0dda2 // log(1/frcpa(1+8/256))= +3.27573e-002
-data8 0x3fa2954c78cbce00, 0x3caa932b860ab8d6 // log(1/frcpa(1+9/256))= +3.62953e-002
-data8 0x3fa4a94d2da96c40, 0x3ca670452b76bbd5 // log(1/frcpa(1+10/256))= +4.03542e-002
-data8 0x3fa67c94f2d4bb40, 0x3ca84104f9941798 // log(1/frcpa(1+11/256))= +4.39192e-002
-data8 0x3fa85188b630f040, 0x3cb40a882cbf0153 // log(1/frcpa(1+12/256))= +4.74971e-002
-data8 0x3faa6b8abe73af40, 0x3c988d46e25c9059 // log(1/frcpa(1+13/256))= +5.16017e-002
-data8 0x3fac441e06f72a80, 0x3cae3e930a1a2a96 // log(1/frcpa(1+14/256))= +5.52072e-002
-data8 0x3fae1e6713606d00, 0x3c8a796f6283b580 // log(1/frcpa(1+15/256))= +5.88257e-002
-data8 0x3faffa6911ab9300, 0x3c5193070351e88a // log(1/frcpa(1+16/256))= +6.24574e-002
-data8 0x3fb0ec139c5da600, 0x3c623f2a75eb992d // log(1/frcpa(1+17/256))= +6.61022e-002
-data8 0x3fb1dbd2643d1900, 0x3ca649b2ef8927f0 // log(1/frcpa(1+18/256))= +6.97605e-002
-data8 0x3fb2cc7284fe5f00, 0x3cbc5e86599513e2 // log(1/frcpa(1+19/256))= +7.34321e-002
-data8 0x3fb3bdf5a7d1ee60, 0x3c90bd4bb69dada3 // log(1/frcpa(1+20/256))= +7.71173e-002
-data8 0x3fb4b05d7aa012e0, 0x3c54e377c9b8a54f // log(1/frcpa(1+21/256))= +8.08161e-002
-data8 0x3fb580db7ceb5700, 0x3c7fdb2f98354cde // log(1/frcpa(1+22/256))= +8.39975e-002
-data8 0x3fb674f089365a60, 0x3cb9994c9d3301c1 // log(1/frcpa(1+23/256))= +8.77219e-002
-data8 0x3fb769ef2c6b5680, 0x3caaec639db52a79 // log(1/frcpa(1+24/256))= +9.14602e-002
-data8 0x3fb85fd927506a40, 0x3c9f9f99a3cf8e25 // log(1/frcpa(1+25/256))= +9.52125e-002
-data8 0x3fb9335e5d594980, 0x3ca15c3abd47d99a // log(1/frcpa(1+26/256))= +9.84401e-002
-data8 0x3fba2b0220c8e5e0, 0x3cb4ca639adf6fc3 // log(1/frcpa(1+27/256))= +1.02219e-001
-data8 0x3fbb0004ac1a86a0, 0x3ca7cb81bf959a59 // log(1/frcpa(1+28/256))= +1.05469e-001
-data8 0x3fbbf968769fca00, 0x3cb0c646c121418e // log(1/frcpa(1+29/256))= +1.09274e-001
-data8 0x3fbccfedbfee13a0, 0x3ca0465fce24ab4b // log(1/frcpa(1+30/256))= +1.12548e-001
-data8 0x3fbda727638446a0, 0x3c82803f4e2e6603 // log(1/frcpa(1+31/256))= +1.15832e-001
-data8 0x3fbea3257fe10f60, 0x3cb986a3f2313d1a // log(1/frcpa(1+32/256))= +1.19677e-001
-data8 0x3fbf7be9fedbfde0, 0x3c97d16a6a621cf4 // log(1/frcpa(1+33/256))= +1.22985e-001
-data8 0x3fc02ab352ff25f0, 0x3c9cc6baad365600 // log(1/frcpa(1+34/256))= +1.26303e-001
-data8 0x3fc097ce579d2040, 0x3cb9ba16d329440b // log(1/frcpa(1+35/256))= +1.29633e-001
-data8 0x3fc1178e8227e470, 0x3cb7bc671683f8e6 // log(1/frcpa(1+36/256))= +1.33531e-001
-data8 0x3fc185747dbecf30, 0x3c9d1116f66d2345 // log(1/frcpa(1+37/256))= +1.36885e-001
-data8 0x3fc1f3b925f25d40, 0x3c8162c9ef939ac6 // log(1/frcpa(1+38/256))= +1.40250e-001
-data8 0x3fc2625d1e6ddf50, 0x3caad3a1ec384fc3 // log(1/frcpa(1+39/256))= +1.43627e-001
-data8 0x3fc2d1610c868130, 0x3cb3ad997036941b // log(1/frcpa(1+40/256))= +1.47015e-001
-data8 0x3fc340c597411420, 0x3cbc2308262c7998 // log(1/frcpa(1+41/256))= +1.50414e-001
-data8 0x3fc3b08b6757f2a0, 0x3cb2170d6cdf0526 // log(1/frcpa(1+42/256))= +1.53825e-001
-data8 0x3fc40dfb08378000, 0x3c9bb453c4f7b685 // log(1/frcpa(1+43/256))= +1.56677e-001
-data8 0x3fc47e74e8ca5f70, 0x3cb836a48fdfce9d // log(1/frcpa(1+44/256))= +1.60109e-001
-data8 0x3fc4ef51f6466de0, 0x3ca07a43919aa64b // log(1/frcpa(1+45/256))= +1.63553e-001
-data8 0x3fc56092e02ba510, 0x3ca85006899d97b0 // log(1/frcpa(1+46/256))= +1.67010e-001
-data8 0x3fc5d23857cd74d0, 0x3ca30a5ba6e7abbe // log(1/frcpa(1+47/256))= +1.70478e-001
-data8 0x3fc6313a37335d70, 0x3ca905586f0ac97e // log(1/frcpa(1+48/256))= +1.73377e-001
-data8 0x3fc6a399dabbd380, 0x3c9b2c6657a96684 // log(1/frcpa(1+49/256))= +1.76868e-001
-data8 0x3fc70337dd3ce410, 0x3cb50bc52f55cdd8 // log(1/frcpa(1+50/256))= +1.79786e-001
-data8 0x3fc77654128f6120, 0x3cad2eb7c9a39efe // log(1/frcpa(1+51/256))= +1.83299e-001
-data8 0x3fc7e9d82a0b0220, 0x3cba127e90393c01 // log(1/frcpa(1+52/256))= +1.86824e-001
-data8 0x3fc84a6b759f5120, 0x3cbd7fd52079f706 // log(1/frcpa(1+53/256))= +1.89771e-001
-data8 0x3fc8ab47d5f5a300, 0x3cbfae141751a3de // log(1/frcpa(1+54/256))= +1.92727e-001
-data8 0x3fc91fe490965810, 0x3cb69cf30a1c319e // log(1/frcpa(1+55/256))= +1.96286e-001
-data8 0x3fc981634011aa70, 0x3ca5bb3d208bc42a // log(1/frcpa(1+56/256))= +1.99261e-001
-data8 0x3fc9f6c407089660, 0x3ca04d68658179a0 // log(1/frcpa(1+57/256))= +2.02843e-001
-data8 0x3fca58e729348f40, 0x3c99f5411546c286 // log(1/frcpa(1+58/256))= +2.05838e-001
-data8 0x3fcabb55c31693a0, 0x3cb9a5350eb327d5 // log(1/frcpa(1+59/256))= +2.08842e-001
-data8 0x3fcb1e104919efd0, 0x3c18965fcce7c406 // log(1/frcpa(1+60/256))= +2.11855e-001
-data8 0x3fcb94ee93e367c0, 0x3cb503716da45184 // log(1/frcpa(1+61/256))= +2.15483e-001
-data8 0x3fcbf851c0675550, 0x3cbdf1b3f7ab5378 // log(1/frcpa(1+62/256))= +2.18516e-001
-data8 0x3fcc5c0254bf23a0, 0x3ca7aab9ed0b1d7b // log(1/frcpa(1+63/256))= +2.21558e-001
-data8 0x3fccc000c9db3c50, 0x3c92a7a2a850072a // log(1/frcpa(1+64/256))= +2.24609e-001
-data8 0x3fcd244d99c85670, 0x3c9f6019120edf4c // log(1/frcpa(1+65/256))= +2.27670e-001
-data8 0x3fcd88e93fb2f450, 0x3c6affb96815e081 // log(1/frcpa(1+66/256))= +2.30741e-001
-data8 0x3fcdedd437eaef00, 0x3c72553595897976 // log(1/frcpa(1+67/256))= +2.33820e-001
-data8 0x3fce530effe71010, 0x3c90913b020fa182 // log(1/frcpa(1+68/256))= +2.36910e-001
-data8 0x3fceb89a1648b970, 0x3c837ba4045bfd25 // log(1/frcpa(1+69/256))= +2.40009e-001
-data8 0x3fcf1e75fadf9bd0, 0x3cbcea6d13e0498d // log(1/frcpa(1+70/256))= +2.43117e-001
-data8 0x3fcf84a32ead7c30, 0x3ca5e3a67b3c6d77 // log(1/frcpa(1+71/256))= +2.46235e-001
-data8 0x3fcfeb2233ea07c0, 0x3cba0c6f0049c5a6 // log(1/frcpa(1+72/256))= +2.49363e-001
-data8 0x3fd028f9c7035c18, 0x3cb0a30b06677ff6 // log(1/frcpa(1+73/256))= +2.52501e-001
-data8 0x3fd05c8be0d96358, 0x3ca0f1c77ccb5865 // log(1/frcpa(1+74/256))= +2.55649e-001
-data8 0x3fd085eb8f8ae790, 0x3cbd513f45fe7a97 // log(1/frcpa(1+75/256))= +2.58174e-001
-data8 0x3fd0b9c8e32d1910, 0x3c927449047ca006 // log(1/frcpa(1+76/256))= +2.61339e-001
-data8 0x3fd0edd060b78080, 0x3c89b52d8435f53e // log(1/frcpa(1+77/256))= +2.64515e-001
-data8 0x3fd122024cf00638, 0x3cbdd976fabda4bd // log(1/frcpa(1+78/256))= +2.67701e-001
-data8 0x3fd14be2927aecd0, 0x3cb02f90ad0bc471 // log(1/frcpa(1+79/256))= +2.70257e-001
-data8 0x3fd180618ef18ad8, 0x3cbd003792c71a98 // log(1/frcpa(1+80/256))= +2.73461e-001
-data8 0x3fd1b50bbe2fc638, 0x3ca9ae64c6403ead // log(1/frcpa(1+81/256))= +2.76675e-001
-data8 0x3fd1df4cc7cf2428, 0x3cb43f0455f7e395 // log(1/frcpa(1+82/256))= +2.79254e-001
-data8 0x3fd214456d0eb8d0, 0x3cb0fbd748d75d30 // log(1/frcpa(1+83/256))= +2.82487e-001
-data8 0x3fd23ec5991eba48, 0x3c906edd746b77e2 // log(1/frcpa(1+84/256))= +2.85081e-001
-data8 0x3fd2740d9f870af8, 0x3ca9802e6a00a670 // log(1/frcpa(1+85/256))= +2.88333e-001
-data8 0x3fd29ecdabcdfa00, 0x3cacecef70890cfa // log(1/frcpa(1+86/256))= +2.90943e-001
-data8 0x3fd2d46602adcce8, 0x3cb97911955f3521 // log(1/frcpa(1+87/256))= +2.94214e-001
-data8 0x3fd2ff66b04ea9d0, 0x3cb12dabe191d1c9 // log(1/frcpa(1+88/256))= +2.96838e-001
-data8 0x3fd335504b355a30, 0x3cbdf9139df924ec // log(1/frcpa(1+89/256))= +3.00129e-001
-data8 0x3fd360925ec44f58, 0x3cb253e68977a1e3 // log(1/frcpa(1+90/256))= +3.02769e-001
-data8 0x3fd38bf1c3337e70, 0x3cb3d283d2a2da21 // log(1/frcpa(1+91/256))= +3.05417e-001
-data8 0x3fd3c25277333180, 0x3cadaa5b035eae27 // log(1/frcpa(1+92/256))= +3.08735e-001
-data8 0x3fd3edf463c16838, 0x3cb983d680d3c108 // log(1/frcpa(1+93/256))= +3.11399e-001
-data8 0x3fd419b423d5e8c0, 0x3cbc86dd921c139d // log(1/frcpa(1+94/256))= +3.14069e-001
-data8 0x3fd44591e0539f48, 0x3c86a76d6dc2782e // log(1/frcpa(1+95/256))= +3.16746e-001
-data8 0x3fd47c9175b6f0a8, 0x3cb59a2e013c6b5f // log(1/frcpa(1+96/256))= +3.20103e-001
-data8 0x3fd4a8b341552b08, 0x3c93f1e86e468694 // log(1/frcpa(1+97/256))= +3.22797e-001
-data8 0x3fd4d4f390890198, 0x3cbf5e4ea7c5105a // log(1/frcpa(1+98/256))= +3.25498e-001
-data8 0x3fd501528da1f960, 0x3cbf58da53e9ad10 // log(1/frcpa(1+99/256))= +3.28206e-001
-data8 0x3fd52dd06347d4f0, 0x3cb98a28cebf6eef // log(1/frcpa(1+100/256))= +3.30921e-001
-data8 0x3fd55a6d3c7b8a88, 0x3c9c76b67c2d1fd4 // log(1/frcpa(1+101/256))= +3.33644e-001
-data8 0x3fd5925d2b112a58, 0x3c9029616a4331b8 // log(1/frcpa(1+102/256))= +3.37058e-001
-data8 0x3fd5bf406b543db0, 0x3c9fb8292ecfc820 // log(1/frcpa(1+103/256))= +3.39798e-001
-data8 0x3fd5ec433d5c35a8, 0x3cb71a1229d17eec // log(1/frcpa(1+104/256))= +3.42545e-001
-data8 0x3fd61965cdb02c18, 0x3cbba94fe1dbb8d2 // log(1/frcpa(1+105/256))= +3.45300e-001
-data8 0x3fd646a84935b2a0, 0x3c9ee496d2c9ae57 // log(1/frcpa(1+106/256))= +3.48063e-001
-data8 0x3fd6740add31de90, 0x3cb1da3a6c7a9dfd // log(1/frcpa(1+107/256))= +3.50833e-001
-data8 0x3fd6a18db74a58c0, 0x3cb494c257add8dc // log(1/frcpa(1+108/256))= +3.53610e-001
-data8 0x3fd6cf31058670e8, 0x3cb0b244a70a8da9 // log(1/frcpa(1+109/256))= +3.56396e-001
-data8 0x3fd6f180e852f0b8, 0x3c9db7aefa866720 // log(1/frcpa(1+110/256))= +3.58490e-001
-data8 0x3fd71f5d71b894e8, 0x3cbe91c4bf324957 // log(1/frcpa(1+111/256))= +3.61289e-001
-data8 0x3fd74d5aefd66d58, 0x3cb06b3d9bfac023 // log(1/frcpa(1+112/256))= +3.64096e-001
-data8 0x3fd77b79922bd378, 0x3cb727d8804491f4 // log(1/frcpa(1+113/256))= +3.66911e-001
-data8 0x3fd7a9b9889f19e0, 0x3ca2ef22df5bc543 // log(1/frcpa(1+114/256))= +3.69734e-001
-data8 0x3fd7d81b037eb6a0, 0x3cb8fd3ba07a7ece // log(1/frcpa(1+115/256))= +3.72565e-001
-data8 0x3fd8069e33827230, 0x3c8bd1e25866e61a // log(1/frcpa(1+116/256))= +3.75404e-001
-data8 0x3fd82996d3ef8bc8, 0x3ca5aab9f5928928 // log(1/frcpa(1+117/256))= +3.77538e-001
-data8 0x3fd85855776dcbf8, 0x3ca56f33337789d6 // log(1/frcpa(1+118/256))= +3.80391e-001
-data8 0x3fd8873658327cc8, 0x3cbb8ef0401db49d // log(1/frcpa(1+119/256))= +3.83253e-001
-data8 0x3fd8aa75973ab8c8, 0x3cbb9961f509a680 // log(1/frcpa(1+120/256))= +3.85404e-001
-data8 0x3fd8d992dc8824e0, 0x3cb220512a53732d // log(1/frcpa(1+121/256))= +3.88280e-001
-data8 0x3fd908d2ea7d9510, 0x3c985f0e513bfb5c // log(1/frcpa(1+122/256))= +3.91164e-001
-data8 0x3fd92c59e79c0e50, 0x3cb82e073fd30d63 // log(1/frcpa(1+123/256))= +3.93332e-001
-data8 0x3fd95bd750ee3ed0, 0x3ca4aa7cdb6dd8a8 // log(1/frcpa(1+124/256))= +3.96231e-001
-data8 0x3fd98b7811a3ee58, 0x3caa93a5b660893e // log(1/frcpa(1+125/256))= +3.99138e-001
-data8 0x3fd9af47f33d4068, 0x3cac294b3b3190ba // log(1/frcpa(1+126/256))= +4.01323e-001
-data8 0x3fd9df270c1914a0, 0x3cbe1a58fd0cd67e // log(1/frcpa(1+127/256))= +4.04245e-001
-data8 0x3fda0325ed14fda0, 0x3cb1efa7950fb57e // log(1/frcpa(1+128/256))= +4.06442e-001
-data8 0x3fda33440224fa78, 0x3c8915fe75e7d477 // log(1/frcpa(1+129/256))= +4.09379e-001
-data8 0x3fda57725e80c380, 0x3ca72bd1062b1b7f // log(1/frcpa(1+130/256))= +4.11587e-001
-data8 0x3fda87d0165dd198, 0x3c91f7845f58dbad // log(1/frcpa(1+131/256))= +4.14539e-001
-data8 0x3fdaac2e6c03f890, 0x3cb6f237a911c509 // log(1/frcpa(1+132/256))= +4.16759e-001
-data8 0x3fdadccc6fdf6a80, 0x3c90ddc4b7687169 // log(1/frcpa(1+133/256))= +4.19726e-001
-data8 0x3fdb015b3eb1e790, 0x3c692dd7d90e1e8e // log(1/frcpa(1+134/256))= +4.21958e-001
-data8 0x3fdb323a3a635948, 0x3c6f85655cbe14de // log(1/frcpa(1+135/256))= +4.24941e-001
-data8 0x3fdb56fa04462908, 0x3c95252d841994de // log(1/frcpa(1+136/256))= +4.27184e-001
-data8 0x3fdb881aa659bc90, 0x3caa53a745a3642f // log(1/frcpa(1+137/256))= +4.30182e-001
-data8 0x3fdbad0bef3db160, 0x3cb32f2540dcc16a // log(1/frcpa(1+138/256))= +4.32437e-001
-data8 0x3fdbd21297781c28, 0x3cbd8e891e106f1d // log(1/frcpa(1+139/256))= +4.34697e-001
-data8 0x3fdc039236f08818, 0x3c809435af522ba7 // log(1/frcpa(1+140/256))= +4.37718e-001
-data8 0x3fdc28cb1e4d32f8, 0x3cb3944752fbd81e // log(1/frcpa(1+141/256))= +4.39990e-001
-data8 0x3fdc4e19b84723c0, 0x3c9a465260cd3fe5 // log(1/frcpa(1+142/256))= +4.42267e-001
-data8 0x3fdc7ff9c74554c8, 0x3c92447d5b6ca369 // log(1/frcpa(1+143/256))= +4.45311e-001
-data8 0x3fdca57b64e9db00, 0x3cb44344a8a00c82 // log(1/frcpa(1+144/256))= +4.47600e-001
-data8 0x3fdccb130a5ceba8, 0x3cbefaddfb97b73f // log(1/frcpa(1+145/256))= +4.49895e-001
-data8 0x3fdcf0c0d18f3268, 0x3cbd3e7bfee57898 // log(1/frcpa(1+146/256))= +4.52194e-001
-data8 0x3fdd232075b5a200, 0x3c9222599987447c // log(1/frcpa(1+147/256))= +4.55269e-001
-data8 0x3fdd490246defa68, 0x3cabafe9a767a80d // log(1/frcpa(1+148/256))= +4.57581e-001
-data8 0x3fdd6efa918d25c8, 0x3cb58a2624e1c6fd // log(1/frcpa(1+149/256))= +4.59899e-001
-data8 0x3fdd9509707ae528, 0x3cbdc3babce578e7 // log(1/frcpa(1+150/256))= +4.62221e-001
-data8 0x3fddbb2efe92c550, 0x3cb0ac0943c434a4 // log(1/frcpa(1+151/256))= +4.64550e-001
-data8 0x3fddee2f3445e4a8, 0x3cbba9d07ce820e8 // log(1/frcpa(1+152/256))= +4.67663e-001
-data8 0x3fde148a1a2726c8, 0x3cb6537e3375b205 // log(1/frcpa(1+153/256))= +4.70004e-001
-data8 0x3fde3afc0a49ff38, 0x3cbfed5518dbc20e // log(1/frcpa(1+154/256))= +4.72350e-001
-data8 0x3fde6185206d5168, 0x3cb6572601f73d5c // log(1/frcpa(1+155/256))= +4.74702e-001
-data8 0x3fde882578823d50, 0x3c9b24abd4584d1a // log(1/frcpa(1+156/256))= +4.77060e-001
-data8 0x3fdeaedd2eac9908, 0x3cb0ceb5e4d2c8f7 // log(1/frcpa(1+157/256))= +4.79423e-001
-data8 0x3fded5ac5f436be0, 0x3ca72f21f1f5238e // log(1/frcpa(1+158/256))= +4.81792e-001
-data8 0x3fdefc9326d16ab8, 0x3c85081a1639a45c // log(1/frcpa(1+159/256))= +4.84166e-001
-data8 0x3fdf2391a21575f8, 0x3cbf11015bdd297a // log(1/frcpa(1+160/256))= +4.86546e-001
-data8 0x3fdf4aa7ee031928, 0x3cb3795bc052a2d1 // log(1/frcpa(1+161/256))= +4.88932e-001
-data8 0x3fdf71d627c30bb0, 0x3c35c61f0f5a88f3 // log(1/frcpa(1+162/256))= +4.91323e-001
-data8 0x3fdf991c6cb3b378, 0x3c97d99419be6028 // log(1/frcpa(1+163/256))= +4.93720e-001
-data8 0x3fdfc07ada69a908, 0x3cbfe9341ded70b1 // log(1/frcpa(1+164/256))= +4.96123e-001
-data8 0x3fdfe7f18eb03d38, 0x3cb85718a640c33f // log(1/frcpa(1+165/256))= +4.98532e-001
-data8 0x3fe007c053c5002c, 0x3cb3addc9c065f09 // log(1/frcpa(1+166/256))= +5.00946e-001
-data8 0x3fe01b942198a5a0, 0x3c9d5aa4c77da6ac // log(1/frcpa(1+167/256))= +5.03367e-001
-data8 0x3fe02f74400c64e8, 0x3cb5a0ee4450ef52 // log(1/frcpa(1+168/256))= +5.05793e-001
-data8 0x3fe04360be7603ac, 0x3c9dd00c35630fe0 // log(1/frcpa(1+169/256))= +5.08225e-001
-data8 0x3fe05759ac47fe30, 0x3cbd063e1f0bd82c // log(1/frcpa(1+170/256))= +5.10663e-001
-data8 0x3fe06b5f1911cf50, 0x3cae8da674af5289 // log(1/frcpa(1+171/256))= +5.13107e-001
-data8 0x3fe078bf0533c568, 0x3c62241edf5fd1f7 // log(1/frcpa(1+172/256))= +5.14740e-001
-data8 0x3fe08cd9687e7b0c, 0x3cb3007febcca227 // log(1/frcpa(1+173/256))= +5.17194e-001
-data8 0x3fe0a10074cf9018, 0x3ca496e84603816b // log(1/frcpa(1+174/256))= +5.19654e-001
-data8 0x3fe0b5343a234474, 0x3cb46098d14fc90a // log(1/frcpa(1+175/256))= +5.22120e-001
-data8 0x3fe0c974c89431cc, 0x3cac0a7cdcbb86c6 // log(1/frcpa(1+176/256))= +5.24592e-001
-data8 0x3fe0ddc2305b9884, 0x3cb2f753210410ff // log(1/frcpa(1+177/256))= +5.27070e-001
-data8 0x3fe0eb524bafc918, 0x3c88affd6682229e // log(1/frcpa(1+178/256))= +5.28726e-001
-data8 0x3fe0ffb54213a474, 0x3cadeefbab9af993 // log(1/frcpa(1+179/256))= +5.31214e-001
-data8 0x3fe114253da97d9c, 0x3cbaf1c2b8bc160a // log(1/frcpa(1+180/256))= +5.33709e-001
-data8 0x3fe128a24f1d9afc, 0x3cb9cf4df375e650 // log(1/frcpa(1+181/256))= +5.36210e-001
-data8 0x3fe1365252bf0864, 0x3c985a621d4be111 // log(1/frcpa(1+182/256))= +5.37881e-001
-data8 0x3fe14ae558b4a92c, 0x3ca104c4aa8977d1 // log(1/frcpa(1+183/256))= +5.40393e-001
-data8 0x3fe15f85a19c7658, 0x3cbadf26e540f375 // log(1/frcpa(1+184/256))= +5.42910e-001
-data8 0x3fe16d4d38c119f8, 0x3cb3aea11caec416 // log(1/frcpa(1+185/256))= +5.44592e-001
-data8 0x3fe18203c20dd130, 0x3cba82d1211d1d6d // log(1/frcpa(1+186/256))= +5.47121e-001
-data8 0x3fe196c7bc4b1f38, 0x3cb6267acc4f4f4a // log(1/frcpa(1+187/256))= +5.49656e-001
-data8 0x3fe1a4a738b7a33c, 0x3c858930213c987d // log(1/frcpa(1+188/256))= +5.51349e-001
-data8 0x3fe1b981c0c9653c, 0x3c9bc2a4a30f697b // log(1/frcpa(1+189/256))= +5.53895e-001
-data8 0x3fe1ce69e8bb1068, 0x3cb7ae6199cf2a00 // log(1/frcpa(1+190/256))= +5.56447e-001
-data8 0x3fe1dc619de06944, 0x3c6b50bb38388177 // log(1/frcpa(1+191/256))= +5.58152e-001
-data8 0x3fe1f160a2ad0da0, 0x3cbd05b2778a5e1d // log(1/frcpa(1+192/256))= +5.60715e-001
-data8 0x3fe2066d7740737c, 0x3cb32e828f9c6bd6 // log(1/frcpa(1+193/256))= +5.63285e-001
-data8 0x3fe2147dba47a390, 0x3cbd579851b8b672 // log(1/frcpa(1+194/256))= +5.65001e-001
-data8 0x3fe229a1bc5ebac0, 0x3cbb321be5237ce8 // log(1/frcpa(1+195/256))= +5.67582e-001
-data8 0x3fe237c1841a502c, 0x3cb3b56e0915ea64 // log(1/frcpa(1+196/256))= +5.69306e-001
-data8 0x3fe24cfce6f80d98, 0x3cb34a4d1a422919 // log(1/frcpa(1+197/256))= +5.71898e-001
-data8 0x3fe25b2c55cd5760, 0x3cb237401ea5015e // log(1/frcpa(1+198/256))= +5.73630e-001
-data8 0x3fe2707f4d5f7c40, 0x3c9d30f20acc8341 // log(1/frcpa(1+199/256))= +5.76233e-001
-data8 0x3fe285e0842ca380, 0x3cbc4d866d5f21c0 // log(1/frcpa(1+200/256))= +5.78842e-001
-data8 0x3fe294294708b770, 0x3cb85e14d5dc54fa // log(1/frcpa(1+201/256))= +5.80586e-001
-data8 0x3fe2a9a2670aff0c, 0x3c7e6f8f468bbf91 // log(1/frcpa(1+202/256))= +5.83207e-001
-data8 0x3fe2b7fb2c8d1cc0, 0x3c930ffcf63c8b65 // log(1/frcpa(1+203/256))= +5.84959e-001
-data8 0x3fe2c65a6395f5f4, 0x3ca0afe20b53d2d2 // log(1/frcpa(1+204/256))= +5.86713e-001
-data8 0x3fe2dbf557b0df40, 0x3cb646be1188fbc9 // log(1/frcpa(1+205/256))= +5.89350e-001
-data8 0x3fe2ea64c3f97654, 0x3c96516fa8df33b2 // log(1/frcpa(1+206/256))= +5.91113e-001
-data8 0x3fe3001823684d70, 0x3cb96d64e16d1360 // log(1/frcpa(1+207/256))= +5.93762e-001
-data8 0x3fe30e97e9a8b5cc, 0x3c98ef96bc97cca0 // log(1/frcpa(1+208/256))= +5.95531e-001
-data8 0x3fe32463ebdd34e8, 0x3caef1dc9a56c1bf // log(1/frcpa(1+209/256))= +5.98192e-001
-data8 0x3fe332f4314ad794, 0x3caa4f0ac5d5fa11 // log(1/frcpa(1+210/256))= +5.99970e-001
-data8 0x3fe348d90e7464cc, 0x3cbe7889f0516acd // log(1/frcpa(1+211/256))= +6.02643e-001
-data8 0x3fe35779f8c43d6c, 0x3ca96bbab7245411 // log(1/frcpa(1+212/256))= +6.04428e-001
-data8 0x3fe36621961a6a98, 0x3ca31f32262db9fb // log(1/frcpa(1+213/256))= +6.06217e-001
-data8 0x3fe37c299f3c3668, 0x3cb15c72c107ee29 // log(1/frcpa(1+214/256))= +6.08907e-001
-data8 0x3fe38ae2171976e4, 0x3cba42a2554b2dd4 // log(1/frcpa(1+215/256))= +6.10704e-001
-data8 0x3fe399a157a603e4, 0x3cb99c62286d8919 // log(1/frcpa(1+216/256))= +6.12504e-001
-data8 0x3fe3afccfe77b9d0, 0x3ca11048f96a43bd // log(1/frcpa(1+217/256))= +6.15210e-001
-data8 0x3fe3be9d503533b4, 0x3ca4022f47588c3e // log(1/frcpa(1+218/256))= +6.17018e-001
-data8 0x3fe3cd7480b4a8a0, 0x3cb4ba7afc2dc56a // log(1/frcpa(1+219/256))= +6.18830e-001
-data8 0x3fe3e3c43918f76c, 0x3c859673d064b8ba // log(1/frcpa(1+220/256))= +6.21554e-001
-data8 0x3fe3f2acb27ed6c4, 0x3cb55c6b452a16a8 // log(1/frcpa(1+221/256))= +6.23373e-001
-data8 0x3fe4019c2125ca90, 0x3cb8c367879c5a31 // log(1/frcpa(1+222/256))= +6.25197e-001
-data8 0x3fe4181061389720, 0x3cb2c17a79c5cc6c // log(1/frcpa(1+223/256))= +6.27937e-001
-data8 0x3fe42711518df544, 0x3ca5f38d47012fc5 // log(1/frcpa(1+224/256))= +6.29769e-001
-data8 0x3fe436194e12b6bc, 0x3cb9854d65a9b426 // log(1/frcpa(1+225/256))= +6.31604e-001
-data8 0x3fe445285d68ea68, 0x3ca3ff9b3a81cd81 // log(1/frcpa(1+226/256))= +6.33442e-001
-data8 0x3fe45bcc464c8938, 0x3cb0a2d8011a6c05 // log(1/frcpa(1+227/256))= +6.36206e-001
-data8 0x3fe46aed21f117fc, 0x3c8a2be41f8e9f3d // log(1/frcpa(1+228/256))= +6.38053e-001
-data8 0x3fe47a1527e8a2d0, 0x3cba4a83594fab09 // log(1/frcpa(1+229/256))= +6.39903e-001
-data8 0x3fe489445efffcc8, 0x3cbf306a23dcbcde // log(1/frcpa(1+230/256))= +6.41756e-001
-data8 0x3fe4a018bcb69834, 0x3ca46c9285029fd1 // log(1/frcpa(1+231/256))= +6.44543e-001
-data8 0x3fe4af5a0c9d65d4, 0x3cbbc1db897580e3 // log(1/frcpa(1+232/256))= +6.46405e-001
-data8 0x3fe4bea2a5bdbe84, 0x3cb84d880d7ef775 // log(1/frcpa(1+233/256))= +6.48271e-001
-data8 0x3fe4cdf28f10ac44, 0x3cb3ec4b7893ce1f // log(1/frcpa(1+234/256))= +6.50140e-001
-data8 0x3fe4dd49cf994058, 0x3c897224d59d3408 // log(1/frcpa(1+235/256))= +6.52013e-001
-data8 0x3fe4eca86e64a680, 0x3cbccf620f24f0cd // log(1/frcpa(1+236/256))= +6.53889e-001
-data8 0x3fe503c43cd8eb68, 0x3c3f872c65971084 // log(1/frcpa(1+237/256))= +6.56710e-001
-data8 0x3fe513356667fc54, 0x3cb9ca64cc3d52c8 // log(1/frcpa(1+238/256))= +6.58595e-001
-data8 0x3fe522ae0738a3d4, 0x3cbe708164c75968 // log(1/frcpa(1+239/256))= +6.60483e-001
-data8 0x3fe5322e26867854, 0x3cb9988ba4aea615 // log(1/frcpa(1+240/256))= +6.62376e-001
-data8 0x3fe541b5cb979808, 0x3ca1662e3a6b95f5 // log(1/frcpa(1+241/256))= +6.64271e-001
-data8 0x3fe55144fdbcbd60, 0x3cb3acd4ca45c1e0 // log(1/frcpa(1+242/256))= +6.66171e-001
-data8 0x3fe560dbc45153c4, 0x3cb4988947959fed // log(1/frcpa(1+243/256))= +6.68074e-001
-data8 0x3fe5707a26bb8c64, 0x3cb3017fe6607ba9 // log(1/frcpa(1+244/256))= +6.69980e-001
-data8 0x3fe587f60ed5b8fc, 0x3cbe7a3266366ed4 // log(1/frcpa(1+245/256))= +6.72847e-001
-data8 0x3fe597a7977c8f30, 0x3ca1e12b9959a90e // log(1/frcpa(1+246/256))= +6.74763e-001
-data8 0x3fe5a760d634bb88, 0x3cb7c365e53d9602 // log(1/frcpa(1+247/256))= +6.76682e-001
-data8 0x3fe5b721d295f10c, 0x3cb716c2551ccbf0 // log(1/frcpa(1+248/256))= +6.78605e-001
-data8 0x3fe5c6ea94431ef8, 0x3ca02b2ed0e28261 // log(1/frcpa(1+249/256))= +6.80532e-001
-data8 0x3fe5d6bb22ea86f4, 0x3caf43a8bbb2f974 // log(1/frcpa(1+250/256))= +6.82462e-001
-data8 0x3fe5e6938645d38c, 0x3cbcedc98821b333 // log(1/frcpa(1+251/256))= +6.84397e-001
-data8 0x3fe5f673c61a2ed0, 0x3caa385eef5f2789 // log(1/frcpa(1+252/256))= +6.86335e-001
-data8 0x3fe6065bea385924, 0x3cb11624f165c5b4 // log(1/frcpa(1+253/256))= +6.88276e-001
-data8 0x3fe6164bfa7cc068, 0x3cbad884f87073fa // log(1/frcpa(1+254/256))= +6.90222e-001
-data8 0x3fe62643fecf9740, 0x3cb78c51da12f4df // log(1/frcpa(1+255/256))= +6.92171e-001
+data8 0x3f60040155d58800 // log(1/frcpa(1+0/256))= +1.95503e-003
+data8 0x3f78121214586a00 // log(1/frcpa(1+1/256))= +5.87661e-003
+data8 0x3f841929f9683200 // log(1/frcpa(1+2/256))= +9.81362e-003
+data8 0x3f8c317384c75f00 // log(1/frcpa(1+3/256))= +1.37662e-002
+data8 0x3f91a6b91ac73380 // log(1/frcpa(1+4/256))= +1.72376e-002
+data8 0x3f95ba9a5d9ac000 // log(1/frcpa(1+5/256))= +2.12196e-002
+data8 0x3f99d2a807432580 // log(1/frcpa(1+6/256))= +2.52177e-002
+data8 0x3f9d6b2725979800 // log(1/frcpa(1+7/256))= +2.87291e-002
+data8 0x3fa0c58fa19dfa80 // log(1/frcpa(1+8/256))= +3.27573e-002
+data8 0x3fa2954c78cbce00 // log(1/frcpa(1+9/256))= +3.62953e-002
+data8 0x3fa4a94d2da96c40 // log(1/frcpa(1+10/256))= +4.03542e-002
+data8 0x3fa67c94f2d4bb40 // log(1/frcpa(1+11/256))= +4.39192e-002
+data8 0x3fa85188b630f040 // log(1/frcpa(1+12/256))= +4.74971e-002
+data8 0x3faa6b8abe73af40 // log(1/frcpa(1+13/256))= +5.16017e-002
+data8 0x3fac441e06f72a80 // log(1/frcpa(1+14/256))= +5.52072e-002
+data8 0x3fae1e6713606d00 // log(1/frcpa(1+15/256))= +5.88257e-002
+data8 0x3faffa6911ab9300 // log(1/frcpa(1+16/256))= +6.24574e-002
+data8 0x3fb0ec139c5da600 // log(1/frcpa(1+17/256))= +6.61022e-002
+data8 0x3fb1dbd2643d1900 // log(1/frcpa(1+18/256))= +6.97605e-002
+data8 0x3fb2cc7284fe5f00 // log(1/frcpa(1+19/256))= +7.34321e-002
+data8 0x3fb3bdf5a7d1ee60 // log(1/frcpa(1+20/256))= +7.71173e-002
+data8 0x3fb4b05d7aa012e0 // log(1/frcpa(1+21/256))= +8.08161e-002
+data8 0x3fb580db7ceb5700 // log(1/frcpa(1+22/256))= +8.39975e-002
+data8 0x3fb674f089365a60 // log(1/frcpa(1+23/256))= +8.77219e-002
+data8 0x3fb769ef2c6b5680 // log(1/frcpa(1+24/256))= +9.14602e-002
+data8 0x3fb85fd927506a40 // log(1/frcpa(1+25/256))= +9.52125e-002
+data8 0x3fb9335e5d594980 // log(1/frcpa(1+26/256))= +9.84401e-002
+data8 0x3fba2b0220c8e5e0 // log(1/frcpa(1+27/256))= +1.02219e-001
+data8 0x3fbb0004ac1a86a0 // log(1/frcpa(1+28/256))= +1.05469e-001
+data8 0x3fbbf968769fca00 // log(1/frcpa(1+29/256))= +1.09274e-001
+data8 0x3fbccfedbfee13a0 // log(1/frcpa(1+30/256))= +1.12548e-001
+data8 0x3fbda727638446a0 // log(1/frcpa(1+31/256))= +1.15832e-001
+data8 0x3fbea3257fe10f60 // log(1/frcpa(1+32/256))= +1.19677e-001
+data8 0x3fbf7be9fedbfde0 // log(1/frcpa(1+33/256))= +1.22985e-001
+data8 0x3fc02ab352ff25f0 // log(1/frcpa(1+34/256))= +1.26303e-001
+data8 0x3fc097ce579d2040 // log(1/frcpa(1+35/256))= +1.29633e-001
+data8 0x3fc1178e8227e470 // log(1/frcpa(1+36/256))= +1.33531e-001
+data8 0x3fc185747dbecf30 // log(1/frcpa(1+37/256))= +1.36885e-001
+data8 0x3fc1f3b925f25d40 // log(1/frcpa(1+38/256))= +1.40250e-001
+data8 0x3fc2625d1e6ddf50 // log(1/frcpa(1+39/256))= +1.43627e-001
+data8 0x3fc2d1610c868130 // log(1/frcpa(1+40/256))= +1.47015e-001
+data8 0x3fc340c597411420 // log(1/frcpa(1+41/256))= +1.50414e-001
+data8 0x3fc3b08b6757f2a0 // log(1/frcpa(1+42/256))= +1.53825e-001
+data8 0x3fc40dfb08378000 // log(1/frcpa(1+43/256))= +1.56677e-001
+data8 0x3fc47e74e8ca5f70 // log(1/frcpa(1+44/256))= +1.60109e-001
+data8 0x3fc4ef51f6466de0 // log(1/frcpa(1+45/256))= +1.63553e-001
+data8 0x3fc56092e02ba510 // log(1/frcpa(1+46/256))= +1.67010e-001
+data8 0x3fc5d23857cd74d0 // log(1/frcpa(1+47/256))= +1.70478e-001
+data8 0x3fc6313a37335d70 // log(1/frcpa(1+48/256))= +1.73377e-001
+data8 0x3fc6a399dabbd380 // log(1/frcpa(1+49/256))= +1.76868e-001
+data8 0x3fc70337dd3ce410 // log(1/frcpa(1+50/256))= +1.79786e-001
+data8 0x3fc77654128f6120 // log(1/frcpa(1+51/256))= +1.83299e-001
+data8 0x3fc7e9d82a0b0220 // log(1/frcpa(1+52/256))= +1.86824e-001
+data8 0x3fc84a6b759f5120 // log(1/frcpa(1+53/256))= +1.89771e-001
+data8 0x3fc8ab47d5f5a300 // log(1/frcpa(1+54/256))= +1.92727e-001
+data8 0x3fc91fe490965810 // log(1/frcpa(1+55/256))= +1.96286e-001
+data8 0x3fc981634011aa70 // log(1/frcpa(1+56/256))= +1.99261e-001
+data8 0x3fc9f6c407089660 // log(1/frcpa(1+57/256))= +2.02843e-001
+data8 0x3fca58e729348f40 // log(1/frcpa(1+58/256))= +2.05838e-001
+data8 0x3fcabb55c31693a0 // log(1/frcpa(1+59/256))= +2.08842e-001
+data8 0x3fcb1e104919efd0 // log(1/frcpa(1+60/256))= +2.11855e-001
+data8 0x3fcb94ee93e367c0 // log(1/frcpa(1+61/256))= +2.15483e-001
+data8 0x3fcbf851c0675550 // log(1/frcpa(1+62/256))= +2.18516e-001
+data8 0x3fcc5c0254bf23a0 // log(1/frcpa(1+63/256))= +2.21558e-001
+data8 0x3fccc000c9db3c50 // log(1/frcpa(1+64/256))= +2.24609e-001
+data8 0x3fcd244d99c85670 // log(1/frcpa(1+65/256))= +2.27670e-001
+data8 0x3fcd88e93fb2f450 // log(1/frcpa(1+66/256))= +2.30741e-001
+data8 0x3fcdedd437eaef00 // log(1/frcpa(1+67/256))= +2.33820e-001
+data8 0x3fce530effe71010 // log(1/frcpa(1+68/256))= +2.36910e-001
+data8 0x3fceb89a1648b970 // log(1/frcpa(1+69/256))= +2.40009e-001
+data8 0x3fcf1e75fadf9bd0 // log(1/frcpa(1+70/256))= +2.43117e-001
+data8 0x3fcf84a32ead7c30 // log(1/frcpa(1+71/256))= +2.46235e-001
+data8 0x3fcfeb2233ea07c0 // log(1/frcpa(1+72/256))= +2.49363e-001
+data8 0x3fd028f9c7035c18 // log(1/frcpa(1+73/256))= +2.52501e-001
+data8 0x3fd05c8be0d96358 // log(1/frcpa(1+74/256))= +2.55649e-001
+data8 0x3fd085eb8f8ae790 // log(1/frcpa(1+75/256))= +2.58174e-001
+data8 0x3fd0b9c8e32d1910 // log(1/frcpa(1+76/256))= +2.61339e-001
+data8 0x3fd0edd060b78080 // log(1/frcpa(1+77/256))= +2.64515e-001
+data8 0x3fd122024cf00638 // log(1/frcpa(1+78/256))= +2.67701e-001
+data8 0x3fd14be2927aecd0 // log(1/frcpa(1+79/256))= +2.70257e-001
+data8 0x3fd180618ef18ad8 // log(1/frcpa(1+80/256))= +2.73461e-001
+data8 0x3fd1b50bbe2fc638 // log(1/frcpa(1+81/256))= +2.76675e-001
+data8 0x3fd1df4cc7cf2428 // log(1/frcpa(1+82/256))= +2.79254e-001
+data8 0x3fd214456d0eb8d0 // log(1/frcpa(1+83/256))= +2.82487e-001
+data8 0x3fd23ec5991eba48 // log(1/frcpa(1+84/256))= +2.85081e-001
+data8 0x3fd2740d9f870af8 // log(1/frcpa(1+85/256))= +2.88333e-001
+data8 0x3fd29ecdabcdfa00 // log(1/frcpa(1+86/256))= +2.90943e-001
+data8 0x3fd2d46602adcce8 // log(1/frcpa(1+87/256))= +2.94214e-001
+data8 0x3fd2ff66b04ea9d0 // log(1/frcpa(1+88/256))= +2.96838e-001
+data8 0x3fd335504b355a30 // log(1/frcpa(1+89/256))= +3.00129e-001
+data8 0x3fd360925ec44f58 // log(1/frcpa(1+90/256))= +3.02769e-001
+data8 0x3fd38bf1c3337e70 // log(1/frcpa(1+91/256))= +3.05417e-001
+data8 0x3fd3c25277333180 // log(1/frcpa(1+92/256))= +3.08735e-001
+data8 0x3fd3edf463c16838 // log(1/frcpa(1+93/256))= +3.11399e-001
+data8 0x3fd419b423d5e8c0 // log(1/frcpa(1+94/256))= +3.14069e-001
+data8 0x3fd44591e0539f48 // log(1/frcpa(1+95/256))= +3.16746e-001
+data8 0x3fd47c9175b6f0a8 // log(1/frcpa(1+96/256))= +3.20103e-001
+data8 0x3fd4a8b341552b08 // log(1/frcpa(1+97/256))= +3.22797e-001
+data8 0x3fd4d4f390890198 // log(1/frcpa(1+98/256))= +3.25498e-001
+data8 0x3fd501528da1f960 // log(1/frcpa(1+99/256))= +3.28206e-001
+data8 0x3fd52dd06347d4f0 // log(1/frcpa(1+100/256))= +3.30921e-001
+data8 0x3fd55a6d3c7b8a88 // log(1/frcpa(1+101/256))= +3.33644e-001
+data8 0x3fd5925d2b112a58 // log(1/frcpa(1+102/256))= +3.37058e-001
+data8 0x3fd5bf406b543db0 // log(1/frcpa(1+103/256))= +3.39798e-001
+data8 0x3fd5ec433d5c35a8 // log(1/frcpa(1+104/256))= +3.42545e-001
+data8 0x3fd61965cdb02c18 // log(1/frcpa(1+105/256))= +3.45300e-001
+data8 0x3fd646a84935b2a0 // log(1/frcpa(1+106/256))= +3.48063e-001
+data8 0x3fd6740add31de90 // log(1/frcpa(1+107/256))= +3.50833e-001
+data8 0x3fd6a18db74a58c0 // log(1/frcpa(1+108/256))= +3.53610e-001
+data8 0x3fd6cf31058670e8 // log(1/frcpa(1+109/256))= +3.56396e-001
+data8 0x3fd6f180e852f0b8 // log(1/frcpa(1+110/256))= +3.58490e-001
+data8 0x3fd71f5d71b894e8 // log(1/frcpa(1+111/256))= +3.61289e-001
+data8 0x3fd74d5aefd66d58 // log(1/frcpa(1+112/256))= +3.64096e-001
+data8 0x3fd77b79922bd378 // log(1/frcpa(1+113/256))= +3.66911e-001
+data8 0x3fd7a9b9889f19e0 // log(1/frcpa(1+114/256))= +3.69734e-001
+data8 0x3fd7d81b037eb6a0 // log(1/frcpa(1+115/256))= +3.72565e-001
+data8 0x3fd8069e33827230 // log(1/frcpa(1+116/256))= +3.75404e-001
+data8 0x3fd82996d3ef8bc8 // log(1/frcpa(1+117/256))= +3.77538e-001
+data8 0x3fd85855776dcbf8 // log(1/frcpa(1+118/256))= +3.80391e-001
+data8 0x3fd8873658327cc8 // log(1/frcpa(1+119/256))= +3.83253e-001
+data8 0x3fd8aa75973ab8c8 // log(1/frcpa(1+120/256))= +3.85404e-001
+data8 0x3fd8d992dc8824e0 // log(1/frcpa(1+121/256))= +3.88280e-001
+data8 0x3fd908d2ea7d9510 // log(1/frcpa(1+122/256))= +3.91164e-001
+data8 0x3fd92c59e79c0e50 // log(1/frcpa(1+123/256))= +3.93332e-001
+data8 0x3fd95bd750ee3ed0 // log(1/frcpa(1+124/256))= +3.96231e-001
+data8 0x3fd98b7811a3ee58 // log(1/frcpa(1+125/256))= +3.99138e-001
+data8 0x3fd9af47f33d4068 // log(1/frcpa(1+126/256))= +4.01323e-001
+data8 0x3fd9df270c1914a0 // log(1/frcpa(1+127/256))= +4.04245e-001
+data8 0x3fda0325ed14fda0 // log(1/frcpa(1+128/256))= +4.06442e-001
+data8 0x3fda33440224fa78 // log(1/frcpa(1+129/256))= +4.09379e-001
+data8 0x3fda57725e80c380 // log(1/frcpa(1+130/256))= +4.11587e-001
+data8 0x3fda87d0165dd198 // log(1/frcpa(1+131/256))= +4.14539e-001
+data8 0x3fdaac2e6c03f890 // log(1/frcpa(1+132/256))= +4.16759e-001
+data8 0x3fdadccc6fdf6a80 // log(1/frcpa(1+133/256))= +4.19726e-001
+data8 0x3fdb015b3eb1e790 // log(1/frcpa(1+134/256))= +4.21958e-001
+data8 0x3fdb323a3a635948 // log(1/frcpa(1+135/256))= +4.24941e-001
+data8 0x3fdb56fa04462908 // log(1/frcpa(1+136/256))= +4.27184e-001
+data8 0x3fdb881aa659bc90 // log(1/frcpa(1+137/256))= +4.30182e-001
+data8 0x3fdbad0bef3db160 // log(1/frcpa(1+138/256))= +4.32437e-001
+data8 0x3fdbd21297781c28 // log(1/frcpa(1+139/256))= +4.34697e-001
+data8 0x3fdc039236f08818 // log(1/frcpa(1+140/256))= +4.37718e-001
+data8 0x3fdc28cb1e4d32f8 // log(1/frcpa(1+141/256))= +4.39990e-001
+data8 0x3fdc4e19b84723c0 // log(1/frcpa(1+142/256))= +4.42267e-001
+data8 0x3fdc7ff9c74554c8 // log(1/frcpa(1+143/256))= +4.45311e-001
+data8 0x3fdca57b64e9db00 // log(1/frcpa(1+144/256))= +4.47600e-001
+data8 0x3fdccb130a5ceba8 // log(1/frcpa(1+145/256))= +4.49895e-001
+data8 0x3fdcf0c0d18f3268 // log(1/frcpa(1+146/256))= +4.52194e-001
+data8 0x3fdd232075b5a200 // log(1/frcpa(1+147/256))= +4.55269e-001
+data8 0x3fdd490246defa68 // log(1/frcpa(1+148/256))= +4.57581e-001
+data8 0x3fdd6efa918d25c8 // log(1/frcpa(1+149/256))= +4.59899e-001
+data8 0x3fdd9509707ae528 // log(1/frcpa(1+150/256))= +4.62221e-001
+data8 0x3fddbb2efe92c550 // log(1/frcpa(1+151/256))= +4.64550e-001
+data8 0x3fddee2f3445e4a8 // log(1/frcpa(1+152/256))= +4.67663e-001
+data8 0x3fde148a1a2726c8 // log(1/frcpa(1+153/256))= +4.70004e-001
+data8 0x3fde3afc0a49ff38 // log(1/frcpa(1+154/256))= +4.72350e-001
+data8 0x3fde6185206d5168 // log(1/frcpa(1+155/256))= +4.74702e-001
+data8 0x3fde882578823d50 // log(1/frcpa(1+156/256))= +4.77060e-001
+data8 0x3fdeaedd2eac9908 // log(1/frcpa(1+157/256))= +4.79423e-001
+data8 0x3fded5ac5f436be0 // log(1/frcpa(1+158/256))= +4.81792e-001
+data8 0x3fdefc9326d16ab8 // log(1/frcpa(1+159/256))= +4.84166e-001
+data8 0x3fdf2391a21575f8 // log(1/frcpa(1+160/256))= +4.86546e-001
+data8 0x3fdf4aa7ee031928 // log(1/frcpa(1+161/256))= +4.88932e-001
+data8 0x3fdf71d627c30bb0 // log(1/frcpa(1+162/256))= +4.91323e-001
+data8 0x3fdf991c6cb3b378 // log(1/frcpa(1+163/256))= +4.93720e-001
+data8 0x3fdfc07ada69a908 // log(1/frcpa(1+164/256))= +4.96123e-001
+data8 0x3fdfe7f18eb03d38 // log(1/frcpa(1+165/256))= +4.98532e-001
+data8 0x3fe007c053c5002c // log(1/frcpa(1+166/256))= +5.00946e-001
+data8 0x3fe01b942198a5a0 // log(1/frcpa(1+167/256))= +5.03367e-001
+data8 0x3fe02f74400c64e8 // log(1/frcpa(1+168/256))= +5.05793e-001
+data8 0x3fe04360be7603ac // log(1/frcpa(1+169/256))= +5.08225e-001
+data8 0x3fe05759ac47fe30 // log(1/frcpa(1+170/256))= +5.10663e-001
+data8 0x3fe06b5f1911cf50 // log(1/frcpa(1+171/256))= +5.13107e-001
+data8 0x3fe078bf0533c568 // log(1/frcpa(1+172/256))= +5.14740e-001
+data8 0x3fe08cd9687e7b0c // log(1/frcpa(1+173/256))= +5.17194e-001
+data8 0x3fe0a10074cf9018 // log(1/frcpa(1+174/256))= +5.19654e-001
+data8 0x3fe0b5343a234474 // log(1/frcpa(1+175/256))= +5.22120e-001
+data8 0x3fe0c974c89431cc // log(1/frcpa(1+176/256))= +5.24592e-001
+data8 0x3fe0ddc2305b9884 // log(1/frcpa(1+177/256))= +5.27070e-001
+data8 0x3fe0eb524bafc918 // log(1/frcpa(1+178/256))= +5.28726e-001
+data8 0x3fe0ffb54213a474 // log(1/frcpa(1+179/256))= +5.31214e-001
+data8 0x3fe114253da97d9c // log(1/frcpa(1+180/256))= +5.33709e-001
+data8 0x3fe128a24f1d9afc // log(1/frcpa(1+181/256))= +5.36210e-001
+data8 0x3fe1365252bf0864 // log(1/frcpa(1+182/256))= +5.37881e-001
+data8 0x3fe14ae558b4a92c // log(1/frcpa(1+183/256))= +5.40393e-001
+data8 0x3fe15f85a19c7658 // log(1/frcpa(1+184/256))= +5.42910e-001
+data8 0x3fe16d4d38c119f8 // log(1/frcpa(1+185/256))= +5.44592e-001
+data8 0x3fe18203c20dd130 // log(1/frcpa(1+186/256))= +5.47121e-001
+data8 0x3fe196c7bc4b1f38 // log(1/frcpa(1+187/256))= +5.49656e-001
+data8 0x3fe1a4a738b7a33c // log(1/frcpa(1+188/256))= +5.51349e-001
+data8 0x3fe1b981c0c9653c // log(1/frcpa(1+189/256))= +5.53895e-001
+data8 0x3fe1ce69e8bb1068 // log(1/frcpa(1+190/256))= +5.56447e-001
+data8 0x3fe1dc619de06944 // log(1/frcpa(1+191/256))= +5.58152e-001
+data8 0x3fe1f160a2ad0da0 // log(1/frcpa(1+192/256))= +5.60715e-001
+data8 0x3fe2066d7740737c // log(1/frcpa(1+193/256))= +5.63285e-001
+data8 0x3fe2147dba47a390 // log(1/frcpa(1+194/256))= +5.65001e-001
+data8 0x3fe229a1bc5ebac0 // log(1/frcpa(1+195/256))= +5.67582e-001
+data8 0x3fe237c1841a502c // log(1/frcpa(1+196/256))= +5.69306e-001
+data8 0x3fe24cfce6f80d98 // log(1/frcpa(1+197/256))= +5.71898e-001
+data8 0x3fe25b2c55cd5760 // log(1/frcpa(1+198/256))= +5.73630e-001
+data8 0x3fe2707f4d5f7c40 // log(1/frcpa(1+199/256))= +5.76233e-001
+data8 0x3fe285e0842ca380 // log(1/frcpa(1+200/256))= +5.78842e-001
+data8 0x3fe294294708b770 // log(1/frcpa(1+201/256))= +5.80586e-001
+data8 0x3fe2a9a2670aff0c // log(1/frcpa(1+202/256))= +5.83207e-001
+data8 0x3fe2b7fb2c8d1cc0 // log(1/frcpa(1+203/256))= +5.84959e-001
+data8 0x3fe2c65a6395f5f4 // log(1/frcpa(1+204/256))= +5.86713e-001
+data8 0x3fe2dbf557b0df40 // log(1/frcpa(1+205/256))= +5.89350e-001
+data8 0x3fe2ea64c3f97654 // log(1/frcpa(1+206/256))= +5.91113e-001
+data8 0x3fe3001823684d70 // log(1/frcpa(1+207/256))= +5.93762e-001
+data8 0x3fe30e97e9a8b5cc // log(1/frcpa(1+208/256))= +5.95531e-001
+data8 0x3fe32463ebdd34e8 // log(1/frcpa(1+209/256))= +5.98192e-001
+data8 0x3fe332f4314ad794 // log(1/frcpa(1+210/256))= +5.99970e-001
+data8 0x3fe348d90e7464cc // log(1/frcpa(1+211/256))= +6.02643e-001
+data8 0x3fe35779f8c43d6c // log(1/frcpa(1+212/256))= +6.04428e-001
+data8 0x3fe36621961a6a98 // log(1/frcpa(1+213/256))= +6.06217e-001
+data8 0x3fe37c299f3c3668 // log(1/frcpa(1+214/256))= +6.08907e-001
+data8 0x3fe38ae2171976e4 // log(1/frcpa(1+215/256))= +6.10704e-001
+data8 0x3fe399a157a603e4 // log(1/frcpa(1+216/256))= +6.12504e-001
+data8 0x3fe3afccfe77b9d0 // log(1/frcpa(1+217/256))= +6.15210e-001
+data8 0x3fe3be9d503533b4 // log(1/frcpa(1+218/256))= +6.17018e-001
+data8 0x3fe3cd7480b4a8a0 // log(1/frcpa(1+219/256))= +6.18830e-001
+data8 0x3fe3e3c43918f76c // log(1/frcpa(1+220/256))= +6.21554e-001
+data8 0x3fe3f2acb27ed6c4 // log(1/frcpa(1+221/256))= +6.23373e-001
+data8 0x3fe4019c2125ca90 // log(1/frcpa(1+222/256))= +6.25197e-001
+data8 0x3fe4181061389720 // log(1/frcpa(1+223/256))= +6.27937e-001
+data8 0x3fe42711518df544 // log(1/frcpa(1+224/256))= +6.29769e-001
+data8 0x3fe436194e12b6bc // log(1/frcpa(1+225/256))= +6.31604e-001
+data8 0x3fe445285d68ea68 // log(1/frcpa(1+226/256))= +6.33442e-001
+data8 0x3fe45bcc464c8938 // log(1/frcpa(1+227/256))= +6.36206e-001
+data8 0x3fe46aed21f117fc // log(1/frcpa(1+228/256))= +6.38053e-001
+data8 0x3fe47a1527e8a2d0 // log(1/frcpa(1+229/256))= +6.39903e-001
+data8 0x3fe489445efffcc8 // log(1/frcpa(1+230/256))= +6.41756e-001
+data8 0x3fe4a018bcb69834 // log(1/frcpa(1+231/256))= +6.44543e-001
+data8 0x3fe4af5a0c9d65d4 // log(1/frcpa(1+232/256))= +6.46405e-001
+data8 0x3fe4bea2a5bdbe84 // log(1/frcpa(1+233/256))= +6.48271e-001
+data8 0x3fe4cdf28f10ac44 // log(1/frcpa(1+234/256))= +6.50140e-001
+data8 0x3fe4dd49cf994058 // log(1/frcpa(1+235/256))= +6.52013e-001
+data8 0x3fe4eca86e64a680 // log(1/frcpa(1+236/256))= +6.53889e-001
+data8 0x3fe503c43cd8eb68 // log(1/frcpa(1+237/256))= +6.56710e-001
+data8 0x3fe513356667fc54 // log(1/frcpa(1+238/256))= +6.58595e-001
+data8 0x3fe522ae0738a3d4 // log(1/frcpa(1+239/256))= +6.60483e-001
+data8 0x3fe5322e26867854 // log(1/frcpa(1+240/256))= +6.62376e-001
+data8 0x3fe541b5cb979808 // log(1/frcpa(1+241/256))= +6.64271e-001
+data8 0x3fe55144fdbcbd60 // log(1/frcpa(1+242/256))= +6.66171e-001
+data8 0x3fe560dbc45153c4 // log(1/frcpa(1+243/256))= +6.68074e-001
+data8 0x3fe5707a26bb8c64 // log(1/frcpa(1+244/256))= +6.69980e-001
+data8 0x3fe587f60ed5b8fc // log(1/frcpa(1+245/256))= +6.72847e-001
+data8 0x3fe597a7977c8f30 // log(1/frcpa(1+246/256))= +6.74763e-001
+data8 0x3fe5a760d634bb88 // log(1/frcpa(1+247/256))= +6.76682e-001
+data8 0x3fe5b721d295f10c // log(1/frcpa(1+248/256))= +6.78605e-001
+data8 0x3fe5c6ea94431ef8 // log(1/frcpa(1+249/256))= +6.80532e-001
+data8 0x3fe5d6bb22ea86f4 // log(1/frcpa(1+250/256))= +6.82462e-001
+data8 0x3fe5e6938645d38c // log(1/frcpa(1+251/256))= +6.84397e-001
+data8 0x3fe5f673c61a2ed0 // log(1/frcpa(1+252/256))= +6.86335e-001
+data8 0x3fe6065bea385924 // log(1/frcpa(1+253/256))= +6.88276e-001
+data8 0x3fe6164bfa7cc068 // log(1/frcpa(1+254/256))= +6.90222e-001
+data8 0x3fe62643fecf9740 // log(1/frcpa(1+255/256))= +6.92171e-001
LOCAL_OBJECT_END(pow_Tt)
@@ -909,14 +879,14 @@ GLOBAL_LIBM_ENTRY(powf)
addl pow_AD_P = @ltoff(pow_table_P), gp
fma.s1 POW_Xp1 = f8,f1,f1 // Will be used for r1 if x<0
nop.i 999
-;;
}
+;;
// Get significand of x. Will be used to get index to fetch T, Tt.
{ .mfi
getf.sig pow_GR_sig_X = f8
frcpa.s1 POW_B, p6 = f1,f8
- nop.i 999
+ mov pow_GR_exp_half = 0xFFFE // Exponent for 0.5
}
{ .mfi
ld8 pow_AD_P = [pow_AD_P]
@@ -925,11 +895,10 @@ GLOBAL_LIBM_ENTRY(powf)
}
;;
-// p13 = TRUE ==> X is unorm
// DOUBLE 0x10033 exponent limit at which y is an integer
{ .mfi
nop.m 999
- fclass.m p13,p0 = f8, 0x0b // Test for x unorm
+ fcmp.lt.s1 p8,p9 = f8, f0 // Test for x<0
addl pow_GR_10033 = 0x10033, r0
}
{ .mfi
@@ -939,11 +908,11 @@ GLOBAL_LIBM_ENTRY(powf)
}
;;
-// p14 = TRUE ==> X is ZERO
+// p13 = TRUE ==> X is unorm
{ .mfi
+ setf.exp POW_Q0_half = pow_GR_exp_half // Form 0.5
+ fclass.m p13,p0 = f8, 0x0b // Test for x unorm
adds pow_AD_Tt = pow_Tt - pow_table_P, pow_AD_P
- fclass.m p14,p0 = f8, 0x07
- and pow_GR_exp_X = pow_GR_signexp_X, pow_GR_17ones
}
{ .mfi
adds pow_AD_Q = pow_table_Q - pow_table_P, pow_AD_P
@@ -952,14 +921,16 @@ GLOBAL_LIBM_ENTRY(powf)
}
;;
+// p14 = TRUE ==> X is ZERO
{ .mfi
- ldfe POW_P5 = [pow_AD_P], 16
- fcmp.lt.s1 p8,p9 = f8, f0 // Test for x<0
+ ldfe POW_P2 = [pow_AD_Q], 16
+ fclass.m p14,p0 = f8, 0x07
nop.i 999
}
-{ .mib
- ldfe POW_P4 = [pow_AD_Q], 16
- sub pow_GR_true_exp_X = pow_GR_exp_X, pow_GR_16ones
+// Note POW_Xm1 and POW_r1 are used interchangably
+{ .mfb
+ nop.m 999
+(p8) fnma.s1 POW_Xm1 = POW_Xp1,f1,f0
(p13) br.cond.spnt POW_X_DENORM
}
;;
@@ -968,26 +939,33 @@ GLOBAL_LIBM_ENTRY(powf)
POW_COMMON:
// p11 = TRUE ==> Y is a NAN
{ .mfi
- ldfe POW_P3 = [pow_AD_P], 16
+ and pow_GR_exp_X = pow_GR_signexp_X, pow_GR_17ones
fclass.m p11,p0 = f9, 0xc3
nop.i 999
}
{ .mfi
- ldfe POW_P2 = [pow_AD_Q], 16
- nop.f 999
+ nop.m 999
+ fms.s1 POW_r = POW_B, POW_NORM_X,f1
mov pow_GR_y_zero = 0
}
;;
-// Note POW_Xm1 and POW_r1 are used interchangably
+// Get exponent of |x|-1 to use in comparison to 2^-8
+{ .mmi
+ getf.exp pow_GR_signexp_Xm1 = POW_Xm1
+ sub pow_GR_true_exp_X = pow_GR_exp_X, pow_GR_16ones
+ extr.u pow_GR_offset = pow_GR_sig_X, 55, 8
+}
+;;
+
{ .mfi
alloc r32=ar.pfs,2,19,4,0
- fms.s1 POW_r = POW_B, POW_NORM_X,f1
- nop.i 999
+ fcvt.fx.s1 POW_int_Y = POW_NORM_Y
+ shladd pow_AD_Tt = pow_GR_offset, 3, pow_AD_Tt
}
{ .mfi
setf.sig POW_int_K = pow_GR_true_exp_X
-(p8) fnma.s1 POW_Xm1 = POW_Xp1,f1,f0
+ nop.f 999
nop.i 999
}
;;
@@ -997,7 +975,7 @@ POW_COMMON:
{ .mfi
ldfe POW_P1 = [pow_AD_P], 16
fclass.m p12,p0 = f9, 0x07
- shl pow_GR_offset = pow_GR_sig_X, 1
+ nop.i 999
}
{ .mfb
ldfe POW_P0 = [pow_AD_Q], 16
@@ -1006,19 +984,18 @@ POW_COMMON:
}
;;
-// Get exponent of |x|-1 to use in comparison to 2^-8
-{ .mfi
- getf.exp pow_GR_signexp_Xm1 = POW_Xm1
- fcvt.fx.s1 POW_int_Y = POW_NORM_Y
- shr.u pow_GR_offset = pow_GR_offset,56
+{ .mmf
+ getf.exp pow_GR_signexp_Y = POW_NORM_Y
+ ldfd POW_T = [pow_AD_Tt]
+ fma.s1 POW_rsq = POW_r, POW_r,f0
}
;;
// p11 = TRUE ==> X is a NAN
{ .mfi
ldfpd POW_log2_hi, POW_log2_lo = [pow_AD_Q], 16
- fclass.m p11,p0 = f8, 0xc3
- shladd pow_AD_Tt = pow_GR_offset, 4, pow_AD_Tt
+ fclass.m p11,p0 = POW_NORM_X, 0xc3
+ nop.i 999
}
{ .mfi
ldfe POW_inv_log2_by_128 = [pow_AD_P], 16
@@ -1028,28 +1005,33 @@ POW_COMMON:
;;
{ .mfi
- ldfpd POW_Q2, POW_Q3 = [pow_AD_P], 16
- fma.s1 POW_G = f0,f0,f0 // G=0 in case |x| near 1
+ ldfd POW_Q2 = [pow_AD_P], 16
+ fnma.s1 POW_twoV = POW_r, POW_Q0_half,f1
and pow_GR_exp_Xm1 = pow_GR_signexp_Xm1, pow_GR_17ones
}
+{ .mfi
+ nop.m 999
+ fma.s1 POW_U = POW_NORM_Y,POW_r,f0
+ nop.i 999
+}
;;
// Determine if we will use the |x| near 1 path (p6) or normal path (p7)
{ .mfi
- getf.exp pow_GR_signexp_Y = POW_NORM_Y
- nop.f 999
+ nop.m 999
+ fcvt.xf POW_K = POW_int_K
cmp.lt p6,p7 = pow_GR_exp_Xm1, pow_GR_exp_2tom8
}
{ .mfb
- ldfpd POW_T, POW_Tt = [pow_AD_Tt], 16
- fma.s1 POW_rsq = POW_r, POW_r,f0
+ nop.m 999
+ fma.s1 POW_G = f0,f0,f0 // G=0 in case |x| near 1
(p11) br.cond.spnt POW_X_NAN // Branch if x=nan and y not nan
}
;;
-// If on the x near 1 path, assign r1 to r and r1*r1 to rsq
+// If on the x near 1 path, assign r1 to r
{ .mfi
- ldfpd POW_Q0_half, POW_Q1 = [pow_AD_P], 16
+ ldfpd POW_Q1, POW_RSHF = [pow_AD_P], 16
(p6) fma.s1 POW_r = POW_r1, f1, f0
nop.i 999
}
@@ -1061,57 +1043,25 @@ POW_COMMON:
;;
{ .mfi
- ldfpd POW_Q4, POW_RSHF = [pow_AD_P], 16
-(p7) fma.s1 POW_v6 = POW_r, POW_P5, POW_P4
- nop.i 999
-}
-{ .mfi
- nop.m 999
-(p6) fma.s1 POW_v6 = POW_r1, POW_P5, POW_P4
- nop.i 999
-}
-;;
-
-{ .mfi
- nop.m 999
-(p7) fma.s1 POW_v4 = POW_P3, POW_r, POW_P2
- nop.i 999
-}
-{ .mfi
- nop.m 999
-(p6) fma.s1 POW_v4 = POW_P3, POW_r1, POW_P2
- nop.i 999
-}
-;;
-
-{ .mfi
- nop.m 999
- fcvt.xf POW_K = POW_int_K
- nop.i 999
-}
-;;
-
-{ .mfi
getf.sig pow_GR_sig_int_Y = POW_int_Y
- fnma.s1 POW_twoV = POW_NORM_Y, POW_rsq,f0
+(p6) fnma.s1 POW_twoV = POW_r1, POW_Q0_half,f1
and pow_GR_exp_Y = pow_GR_signexp_Y, pow_GR_17ones
}
{ .mfb
andcm pow_GR_sign_Y = pow_GR_signexp_Y, pow_GR_17ones
- fma.s1 POW_U = POW_NORM_Y,POW_r,f0
+(p6) fma.s1 POW_U = POW_NORM_Y,POW_r1,f0
(p12) br.cond.spnt POW_Y_0 // Branch if y=zero, x not zero or nan
}
;;
-// p11 = TRUE ==> X is NEGATIVE but not inf
{ .mfi
ldfe POW_log2_by_128_lo = [pow_AD_P], 16
- fclass.m p11,p0 = f8, 0x1a
+(p7) fma.s1 POW_Z2 = POW_twoV, POW_U, f0
nop.i 999
}
{ .mfi
ldfe POW_log2_by_128_hi = [pow_AD_Q], 16
- fma.s1 POW_v2 = POW_P1, POW_r, POW_P0
+ nop.f 999
nop.i 999
}
;;
@@ -1123,43 +1073,32 @@ POW_COMMON:
}
{ .mfi
nop.m 999
- fma.s1 POW_v3 = POW_v6, POW_rsq, POW_v4
+(p7) fma.s1 POW_G = POW_K, POW_log2_hi, POW_T
adds pow_AD_tbl1 = pow_tbl1 - pow_Tt, pow_AD_Q
}
;;
+// p11 = TRUE ==> X is NEGATIVE but not inf
{ .mfi
nop.m 999
-(p7) fma.s1 POW_delta = POW_K, POW_log2_lo, POW_Tt
+ fclass.m p11,p0 = POW_NORM_X, 0x1a
nop.i 999
}
{ .mfi
nop.m 999
-(p7) fma.s1 POW_G = POW_K, POW_log2_hi, POW_T
+(p7) fma.s1 POW_delta = POW_K, POW_log2_lo, f0
adds pow_AD_tbl2 = pow_tbl2 - pow_tbl1, pow_AD_tbl1
}
;;
{ .mfi
nop.m 999
- fms.s1 POW_e2 = POW_NORM_Y, POW_r, POW_U
+(p6) fma.s1 POW_Z = POW_twoV, POW_U, f0
nop.i 999
}
{ .mfi
nop.m 999
- fma.s1 POW_Z2 = POW_twoV, POW_Q0_half, POW_U
- nop.i 999
-}
-;;
-
-{ .mfi
- nop.m 999
- fma.s1 POW_Yrcub = POW_rsq, POW_U, f0
- nop.i 999
-}
-{ .mfi
- nop.m 999
- fma.s1 POW_p = POW_rsq, POW_v3, POW_v2
+ fma.s1 POW_v2 = POW_P1, POW_r, POW_P0
nop.i 999
}
;;
@@ -1169,7 +1108,7 @@ POW_COMMON:
// p13 = TRUE ==> X is NEGATIVE AND Y possible int
{ .mfi
nop.m 999
- fma.s1 POW_Z1 = POW_NORM_Y, POW_G, f0
+(p7) fma.s1 POW_Z = POW_NORM_Y, POW_G, POW_Z2
(p11) cmp.gt.unc p12,p13 = pow_GR_exp_Y, pow_GR_10033
}
{ .mfi
@@ -1179,35 +1118,28 @@ POW_COMMON:
}
;;
-// By adding RSHF (1.1000...*2^63) we put integer part in rightmost significand
{ .mfi
nop.m 999
- fma.s1 POW_W2 = POW_Z2, POW_inv_log2_by_128, POW_RSHF
+ fma.s1 POW_Yrcub = POW_rsq, POW_U, f0
nop.i 999
}
{ .mfi
nop.m 999
- fms.s1 POW_UmZ2 = POW_U, f1, POW_Z2
+ fma.s1 POW_p = POW_rsq, POW_P2, POW_v2
nop.i 999
}
;;
+// Test if x inf
{ .mfi
nop.m 999
- fma.s1 POW_Z3 = POW_p, POW_Yrcub, f0
+ fclass.m p15,p0 = POW_NORM_X, 0x23
nop.i 999
}
-;;
-
// By adding RSHF (1.1000...*2^63) we put integer part in rightmost significand
{ .mfi
nop.m 999
- fms.s1 POW_e1 = POW_NORM_Y, POW_G, POW_Z1
- nop.i 999
-}
-{ .mfi
- nop.m 999
- fma.s1 POW_W1 = POW_Z1, POW_inv_log2_by_128, POW_RSHF
+ fma.s1 POW_W1 = POW_Z, POW_inv_log2_by_128, POW_RSHF
nop.i 999
}
;;
@@ -1227,93 +1159,38 @@ POW_COMMON:
}
;;
-// By subtracting RSHF we get rounded integer POW_N2float
-{ .mfi
- nop.m 999
- fms.s1 POW_N2float = POW_W2, f1, POW_RSHF
- nop.i 999
-}
-{ .mfi
- nop.m 999
- fma.s1 POW_UmZ2pV = POW_twoV,POW_Q0_half,POW_UmZ2
- nop.i 999
-}
-;;
-
-{ .mfi
- nop.m 999
- fma.s1 POW_Z3sq = POW_Z3, POW_Z3, f0
- nop.i 999
-}
-{ .mfi
- nop.m 999
- fma.s1 POW_v4 = POW_Z3, POW_Q3, POW_Q2
- nop.i 999
-}
-;;
-
-// Extract rounded integer from rightmost significand of POW_W2
-// By subtracting RSHF we get rounded integer POW_N1float
-{ .mfi
- getf.sig pow_GR_int_W2 = POW_W2
- fms.s1 POW_N1float = POW_W1, f1, POW_RSHF
- nop.i 999
-}
-{ .mfi
- nop.m 999
- fma.s1 POW_v2 = POW_Z3, POW_Q1, POW_Q0_half
- nop.i 999
-}
-;;
-
-{ .mfi
- nop.m 999
- fnma.s1 POW_s2 = POW_N2float, POW_log2_by_128_hi, POW_Z2
- nop.i 999
-}
+// p11 = TRUE ==> X is +1.0
{ .mfi
nop.m 999
- fma.s1 POW_e2 = POW_e2,f1,POW_UmZ2pV
+ fcmp.eq.s1 p11,p0 = POW_NORM_X, f1
nop.i 999
}
;;
// Extract rounded integer from rightmost significand of POW_W1
-// Test if x inf
+// By subtracting RSHF we get rounded integer POW_Nfloat
{ .mfi
- getf.sig pow_GR_int_W1 = POW_W1
- fclass.m p15,p0 = POW_NORM_X, 0x23
+ getf.sig pow_GR_int_N = POW_W1
+ fms.s1 POW_Nfloat = POW_W1, f1, POW_RSHF
nop.i 999
}
{ .mfb
nop.m 999
- fnma.s1 POW_f2 = POW_N2float, POW_log2_by_128_lo, f1
+ fma.s1 POW_Z3 = POW_p, POW_Yrcub, f0
(p12) br.cond.spnt POW_X_NEG_Y_NONINT // Branch if x neg, y not integer
}
;;
-// p11 = TRUE ==> X is +1.0
+// p7 = TRUE ==> Y is +1.0
// p12 = TRUE ==> X is NEGATIVE AND Y is an odd integer
{ .mfi
getf.exp pow_GR_signexp_Y_Gpr = POW_Y_Gpr
- fcmp.eq.s1 p11,p0 = POW_NORM_X, f1
+ fcmp.eq.s1 p7,p0 = POW_NORM_Y, f1 // Test for y=1.0
(p10) tbit.nz.unc p12,p0 = pow_GR_sig_int_Y,0
}
-{ .mfi
- nop.m 999
- fma.s1 POW_v3 = POW_Z3sq, POW_Q4, POW_v4
- nop.i 999
-}
-;;
-
-{ .mfi
- nop.m 999
- fnma.s1 POW_f1 = POW_N1float, POW_log2_by_128_lo, f1
- nop.i 999
-}
{ .mfb
nop.m 999
- fnma.s1 POW_s1 = POW_N1float, POW_log2_by_128_hi, POW_Z1
+(p11) fma.s.s0 f8 = f1,f1,f0 // If x=1, result is +1
(p15) br.cond.spnt POW_X_INF
}
;;
@@ -1324,77 +1201,73 @@ POW_COMMON:
fcmp.eq.s0 p15,p0 = f8,f9
nop.i 999
}
-{ .mfi
+{ .mfb
nop.m 999
fma.s1 POW_e3 = POW_NORM_Y, POW_delta, f0
- nop.i 999
+(p11) br.ret.spnt b0 // Early exit if x=1.0, result is +1
}
;;
{ .mfi
- nop.m 999
- fcmp.eq.s1 p7,p0 = POW_NORM_Y, f1 // Test for y=1.0
+(p12) mov pow_GR_xneg_yodd = 1
+ fnma.s1 POW_f12 = POW_Nfloat, POW_log2_by_128_lo, f1
nop.i 999
}
-{ .mfi
+{ .mfb
nop.m 999
- fma.s1 POW_e12 = POW_e1,f1,POW_e2
- nop.i 999
-}
-;;
-
-{ .mfi
- add pow_GR_int_N = pow_GR_int_W1, pow_GR_int_W2
-(p11) fma.s.s0 f8 = f1,f1,f0 // If x=1, result is +1
- nop.i 999
-}
-{ .mib
-(p12) mov pow_GR_xneg_yodd = 1
- nop.i 999
-(p11) br.ret.spnt b0 // Early exit if x=1.0, result is +1
+ fnma.s1 POW_s = POW_Nfloat, POW_log2_by_128_hi, POW_Z
+(p7) br.ret.spnt b0 // Early exit if y=1.0, result is x
}
;;
-{ .mfi
+{ .mmi
and pow_GR_index1 = 0x0f, pow_GR_int_N
- fma.s1 POW_q = POW_Z3sq, POW_v3, POW_v2
- shr pow_int_GR_M = pow_GR_int_N, 7 // M = N/128
-}
-{ .mib
and pow_GR_index2 = 0x70, pow_GR_int_N
- nop.i 999
-(p7) br.ret.spnt b0 // Early exit if y=1.0, result is x
+ shr pow_int_GR_M = pow_GR_int_N, 7 // M = N/128
}
;;
{ .mfi
shladd pow_AD_T1 = pow_GR_index1, 4, pow_AD_tbl1
- fma.s1 POW_s = POW_s1, f1, POW_s2
+ fma.s1 POW_q = POW_Z3, POW_Q1, POW_Q0_half
add pow_int_GR_M = pow_GR_16ones, pow_int_GR_M
}
{ .mfi
add pow_AD_T2 = pow_AD_tbl2, pow_GR_index2
- fma.s1 POW_f12 = POW_f1, POW_f2,f0
+ fma.s1 POW_Z3sq = POW_Z3, POW_Z3, f0
nop.i 999
}
;;
-{ .mmf
+{ .mmi
ldfe POW_T1 = [pow_AD_T1]
ldfe POW_T2 = [pow_AD_T2]
- nop.f 999
+ nop.i 999
}
;;
+// f123 = f12*(e3+1) = f12*e3+f12
{ .mfi
setf.exp POW_2M = pow_int_GR_M
- fma.s1 POW_e123 = POW_e12, f1, POW_e3
- and pow_GR_exp_Y_Gpr = pow_GR_signexp_Y_Gpr, pow_GR_17ones
+ fma.s1 POW_f123 = POW_e3,POW_f12,POW_f12
+ nop.i 999
+}
+{ .mfi
+ nop.m 999
+ fma.s1 POW_ssq = POW_s, POW_s, f0
+ nop.i 999
}
;;
{ .mfi
nop.m 999
+ fma.s1 POW_v2 = POW_s, POW_Q2, POW_Q1
+ and pow_GR_exp_Y_Gpr = pow_GR_signexp_Y_Gpr, pow_GR_17ones
+}
+;;
+
+{ .mfi
+ cmp.ne p12,p13 = pow_GR_xneg_yodd, r0
fma.s1 POW_q = POW_Z3sq, POW_q, POW_Z3
sub pow_GR_true_exp_Y_Gpr = pow_GR_exp_Y_Gpr, pow_GR_16ones
}
@@ -1411,88 +1284,62 @@ POW_COMMON:
// Form signexp of constants to indicate overflow
{ .mfi
mov pow_GR_big_pos = 0x1007f
- fma.s1 POW_ssq = POW_s, POW_s, f0
+ nop.f 999
cmp.le p8,p9 = 7, pow_GR_true_exp_Y_Gpr
}
{ .mfi
mov pow_GR_big_neg = 0x3007f
- fma.s1 POW_v4 = POW_s, POW_Q3, POW_Q2
+ nop.f 999
andcm pow_GR_sign_Y_Gpr = pow_GR_signexp_Y_Gpr, pow_GR_17ones
}
;;
// Form big positive and negative constants to test for possible overflow
+// Scale both terms of the polynomial by POW_f123
{ .mfi
setf.exp POW_big_pos = pow_GR_big_pos
- fma.s1 POW_v2 = POW_s, POW_Q1, POW_Q0_half
+ fma.s1 POW_ssq = POW_ssq, POW_f123, f0
(p9) cmp.le.unc p0,p10 = 6, pow_GR_true_exp_Y_Gpr
}
{ .mfb
setf.exp POW_big_neg = pow_GR_big_neg
- fma.s1 POW_1ps = f1,f1,POW_s
+ fma.s1 POW_1ps = POW_s, POW_f123, POW_f123
(p8) br.cond.spnt POW_OVER_UNDER_X_NOT_INF
}
;;
-// f123 = f12*(e123+1) = f12*e123+f12
{ .mfi
nop.m 999
- fma.s1 POW_f123 = POW_e123,POW_f12,POW_f12
+(p12) fnma.s1 POW_T1T2 = POW_T1, POW_T2, f0
nop.i 999
}
-;;
-
{ .mfi
nop.m 999
- fma.s1 POW_T1T2 = POW_T1, POW_T2, f0
+(p13) fma.s1 POW_T1T2 = POW_T1, POW_T2, f0
nop.i 999
}
-{ .mfi
- nop.m 999
- fma.s1 POW_v3 = POW_ssq, POW_Q4, POW_v4
- cmp.ne p12,p13 = pow_GR_xneg_yodd, r0
-}
;;
{ .mfi
nop.m 999
- fma.s1 POW_2Mqp1 = POW_2M, POW_q, POW_2M
- nop.i 999
-}
-;;
-
-{ .mfi
- nop.m 999
- fma.s1 POW_v21ps = POW_ssq, POW_v2, POW_1ps
+ fma.s1 POW_v210 = POW_s, POW_v2, POW_Q0_half
nop.i 999
}
{ .mfi
nop.m 999
- fma.s1 POW_s4 = POW_ssq, POW_ssq, f0
- nop.i 999
-}
-;;
-
-{ .mfi
- nop.m 999
-(p12) fnma.s1 POW_A = POW_T1T2, POW_f123, f0
- nop.i 999
-}
-{ .mfi
- nop.m 999
-(p13) fma.s1 POW_A = POW_T1T2, POW_f123, f0
+ fma.s1 POW_2Mqp1 = POW_2M, POW_q, POW_2M
nop.i 999
}
;;
{ .mfi
nop.m 999
- fma.s1 POW_es = POW_s4, POW_v3, POW_v21ps
+ fma.s1 POW_es = POW_ssq, POW_v210, POW_1ps
nop.i 999
}
{ .mfi
nop.m 999
- fma.s1 POW_A = POW_A, POW_2Mqp1, f0
+ fma.s1 POW_A = POW_T1T2, POW_2Mqp1, f0
nop.i 999
}
;;
@@ -1623,16 +1470,25 @@ POW_POSSIBLE_UNDER:
// 0.1...11 2^-3ffe (biased, 1)
// largest dn smallest normal
+// Form small constant (2^-170) to correct underflow result near region of
+// smallest denormal in round-nearest.
+
// Put in s2 (td set, ftz set)
+.pred.rel "mutex",p12,p13
{ .mfi
- nop.m 999
+ mov pow_GR_Fpsr = ar40 // Read the fpsr--need to check rc.s0
fsetc.s2 0x7F,0x41
- nop.i 999
+ mov pow_GR_rcs0_mask = 0x0c00 // Set mask for rc.s0
+}
+{ .mfi
+(p12) mov pow_GR_tmp = 0x2ffff - 170
+ nop.f 999
+(p13) mov pow_GR_tmp = 0x0ffff - 170
}
;;
{ .mfi
- nop.m 999
+