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[PATCH] fix m32r target macros add_ssaaaa and sub_ddmmss in longlong.h


Hi, Nick

This is a longlong.h patch for a M32R target.

Please apply it.
Please commit it into 3.3-branch, 3.4-branch and mainline.

With this patch, the test result is clean.
-FAIL: gcc.c-torture/execute/arith-rand-ll.c execution, -O0
-FAIL: gcc.c-torture/execute/arith-rand-ll.c execution, -O1
-FAIL: gcc.c-torture/execute/arith-rand-ll.c execution, -O2
-FAIL: gcc.c-torture/execute/arith-rand-ll.c execution, -O3 -fomit-frame-pointer
-FAIL: gcc.c-torture/execute/arith-rand-ll.c execution, -O3 -fomit-frame-pointer -funroll-loops
-FAIL: gcc.c-torture/execute/arith-rand-ll.c execution, -O3 -fomit-frame-pointer -funroll-all-loops -finline-functions
-FAIL: gcc.c-torture/execute/arith-rand-ll.c execution, -O3 -g
-FAIL: gcc.c-torture/execute/arith-rand-ll.c execution, -Os


Regards,

Kazuhiro Inaoka

gcc/ChangeLog
2004-06-15 Kazuhiro Inaoka < inaoka dot kazuhiro at renesas dot com >
	* longlong.h: Fix macros for m32r add_ssaaaa and sub_ddmmss

Index: longlong.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/longlong.h,v
retrieving revision 1.39
diff -c -r1.39 longlong.h
*** longlong.h	21 Aug 2003 01:11:41 -0000	1.39
--- longlong.h	14 Jun 2004 10:06:54 -0000
***************
*** 376,392 ****
  #if defined (__M32R__) && W_TYPE_SIZE == 32
  #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
    /* The cmp clears the condition bit.  */ \
!   __asm__ ("cmp %0,%0\n\taddx %%5,%1\n\taddx %%3,%0"			\
  	   : "=r" ((USItype) (sh)),					\
  	     "=&r" ((USItype) (sl))					\
! 	   : "%0" ((USItype) (ah)),					\
  	     "r" ((USItype) (bh)),					\
! 	     "%1" ((USItype) (al)),					\
  	     "r" ((USItype) (bl))					\
  	   : "cbit")
  #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
    /* The cmp clears the condition bit.  */ \
!   __asm__ ("cmp %0,%0\n\tsubx %5,%1\n\tsubx %3,%0"			\
  	   : "=r" ((USItype) (sh)),					\
  	     "=&r" ((USItype) (sl))					\
  	   : "0" ((USItype) (ah)),					\
--- 376,392 ----
  #if defined (__M32R__) && W_TYPE_SIZE == 32
  #define add_ssaaaa(sh, sl, ah, al, bh, bl) \
    /* The cmp clears the condition bit.  */ \
!   __asm__ ("cmp %0,%0\n\taddx %1,%5\n\taddx %0,%3"			\
  	   : "=r" ((USItype) (sh)),					\
  	     "=&r" ((USItype) (sl))					\
! 	   : "0" ((USItype) (ah)),					\
  	     "r" ((USItype) (bh)),					\
! 	     "1" ((USItype) (al)),					\
  	     "r" ((USItype) (bl))					\
  	   : "cbit")
  #define sub_ddmmss(sh, sl, ah, al, bh, bl) \
    /* The cmp clears the condition bit.  */ \
!   __asm__ ("cmp %0,%0\n\tsubx %1,%5\n\tsubx %0,%3"			\
  	   : "=r" ((USItype) (sh)),					\
  	     "=&r" ((USItype) (sl))					\
  	   : "0" ((USItype) (ah)),					\

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