Re: [PATCH] memset.S and PowerPC

[Geoff Keating <geoffk at geoffk dot org>]

> From: Andreas Jaeger <aj@suse.de>
> Date: Tue, 18 Jun 2002 18:03:15 +0200

> "Steve Munroe" <sjmunroe@us.ibm.com> writes:
> 
> > Andreas Jaeger writes:

> >>> Do you really want a nop here?
> >
> > I am not sure but the base code is full of comments like:
> >
> > /* 40th instruction from .align */
> >
> > Which implies that the alignment of code (within the i-cache) was
> > important. While this is likely only an important issue for early (601,
> > 603, ...) PowerPC processors, I wanted to avoid messing with the implied
> > magic. This is not an important issue for the 64-bit PowerPC
> 
> In that case just add this as a comment along the nop (if that's the
> final solution)

Actually, even the nop will slightly affect the schedule.  The
code is hand-scheduled for the 601.  I think a nop will have the least
impact.  You'd want to add a comment saying why it is there.

> > implementations which I am most familiar. Perhaps Geoff remembers the
> > background on this? Does this still matter for the current inventory of
> > Linux/PowerPC systems in use today?
> >
> >>> Can you send a clean, working patch, please?
> >
> > I can, but do you want this patch or the more comprehensive solution that
> > deals with dcbz for different cache-line sizes?
> 
> Geoff or Ulrich have the final ok here.  My personal opionion would be
> the "more comprehensive" solution.  Geoff, what do you think?

If I have a choice, I'd really like the more comprehensive solution!

-- 
- Geoffrey Keating <geoffk@geoffk.org> <geoffk@redhat.com>