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GNU C Library master sources branch master updated. glibc-2.27.9000-557-gbce5911


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The branch, master has been updated
       via  bce5911b67392717b44f857a97bb348747be50e7 (commit)
      from  3a885c1f51b18852869a91cf59a1b39da1595c7a (commit)

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- Log -----------------------------------------------------------------
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=bce5911b67392717b44f857a97bb348747be50e7

commit bce5911b67392717b44f857a97bb348747be50e7
Author: Amit Pawar <Amit.Pawar@amd.com>
Date:   Fri Jul 6 09:55:36 2018 -0400

    Use AVX_Fast_Unaligned_Load from Zen onwards.
    
    From Zen onwards this will be enabled. It was disabled for the
    Excavator case and will remain disabled.
    
    Reviewd-by: Carlos O'Donell <carlos@redhat.com>

diff --git a/ChangeLog b/ChangeLog
index 5a1f291..7fe8e24 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,10 @@
+2018-07-06  Amit Pawar  <amit.pawar@amd.com>
+
+	* sysdeps/x86/cpu-features.c (get_common_indeces):
+	AVX_Fast_Unaligned_Load is enabled when AVX2 is detected.
+	* sysdeps/x86/cpu-features.c (init_cpu_features):
+	AVX_Fast_Unaligned_Load is disabled for Excavator core.
+
 2018-07-05  Florian Weimer  <fweimer@redhat.com>
 
 	* csu/Makefile (CFLAGS-static-reloc.os): Build with stack
diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
index 0fc3674..d41ebde 100644
--- a/sysdeps/x86/cpu-features.c
+++ b/sysdeps/x86/cpu-features.c
@@ -78,8 +78,15 @@ get_common_indeces (struct cpu_features *cpu_features,
 	      /* The following features depend on AVX being usable.  */
 	      /* Determine if AVX2 is usable.  */
 	      if (CPU_FEATURES_CPU_P (cpu_features, AVX2))
+	      {
 		cpu_features->feature[index_arch_AVX2_Usable]
 		  |= bit_arch_AVX2_Usable;
+
+	        /* Unaligned load with 256-bit AVX registers are faster on
+	           Intel/AMD processors with AVX2.  */
+	        cpu_features->feature[index_arch_AVX_Fast_Unaligned_Load]
+		  |= bit_arch_AVX_Fast_Unaligned_Load;
+	      }
 	      /* Determine if FMA is usable.  */
 	      if (CPU_FEATURES_CPU_P (cpu_features, FMA))
 		cpu_features->feature[index_arch_FMA_Usable]
@@ -298,11 +305,6 @@ init_cpu_features (struct cpu_features *cpu_features)
 	    }
 	}
 
-      /* Unaligned load with 256-bit AVX registers are faster on
-	 Intel processors with AVX2.  */
-      if (CPU_FEATURES_ARCH_P (cpu_features, AVX2_Usable))
-	cpu_features->feature[index_arch_AVX_Fast_Unaligned_Load]
-	  |= bit_arch_AVX_Fast_Unaligned_Load;
 
       /* Since AVX512ER is unique to Xeon Phi, set Prefer_No_VZEROUPPER
          if AVX512ER is available.  Don't use AVX512 to avoid lower CPU
@@ -351,9 +353,15 @@ init_cpu_features (struct cpu_features *cpu_features)
 #endif
 	  /* "Excavator"   */
 	  if (model >= 0x60 && model <= 0x7f)
+	  {
 	    cpu_features->feature[index_arch_Fast_Unaligned_Load]
 	      |= (bit_arch_Fast_Unaligned_Load
 		  | bit_arch_Fast_Copy_Backward);
+
+	    /* Unaligned AVX loads are slower.*/
+	    cpu_features->feature[index_arch_AVX_Fast_Unaligned_Load]
+		  &= ~bit_arch_AVX_Fast_Unaligned_Load;
+	  }
 	}
     }
   else

-----------------------------------------------------------------------

Summary of changes:
 ChangeLog                  |    7 +++++++
 sysdeps/x86/cpu-features.c |   18 +++++++++++++-----
 2 files changed, 20 insertions(+), 5 deletions(-)


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