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GNU C Library master sources branch master updated. glibc-2.27.9000-538-g0aec4c1


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http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=0aec4c1d1801e8016ebe89281d16597e0557b8be

commit 0aec4c1d1801e8016ebe89281d16597e0557b8be
Author: Siddhesh Poyarekar <siddhesh@sourceware.org>
Date:   Fri Jun 29 22:45:59 2018 +0530

    aarch64,falkor: Use vector registers for memcpy
    
    Vector registers perform better than scalar register pairs for copying
    data so prefer them instead.  This results in a time reduction of over
    50% (i.e. 2x speed improvemnet) for some smaller sizes for memcpy-walk.
    Larger sizes show improvements of around 1% to 2%.  memcpy-random shows
    a very small improvement, in the range of 1-2%.
    
    	* sysdeps/aarch64/multiarch/memcpy_falkor.S (__memcpy_falkor):
    	Use vector registers.

diff --git a/ChangeLog b/ChangeLog
index 5d450c9..3a5e52b 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,8 @@
 2018-06-29  Siddhesh Poyarekar  <siddhesh@sourceware.org>
 
+	* sysdeps/aarch64/multiarch/memcpy_falkor.S (__memcpy_falkor):
+	Use vector registers.
+
 	* sysdeps/aarch64/multiarch/memmove_falkor.S
 	(__memcpy_falkor): Use vector registers.
 
diff --git a/sysdeps/aarch64/multiarch/memcpy_falkor.S b/sysdeps/aarch64/multiarch/memcpy_falkor.S
index 2fe9937..cdc2de4 100644
--- a/sysdeps/aarch64/multiarch/memcpy_falkor.S
+++ b/sysdeps/aarch64/multiarch/memcpy_falkor.S
@@ -29,25 +29,19 @@
 #define dst	x3
 #define srcend	x4
 #define dstend	x5
-#define A_l	x6
-#define A_lw	w6
-#define A_h	x7
-#define A_hw	w7
 #define tmp1	x14
-
-#define B_l	x8
-#define B_lw	w8
-#define B_h	x9
-#define C_l	x10
-#define C_h	x11
-#define D_l	x12
-#define D_h	x13
-#define E_l	dst
-#define E_h	tmp1
-#define F_l	src
-#define F_h	count
-#define G_l	srcend
-#define G_h	x15
+#define A_x	x6
+#define B_x	x7
+#define A_w	w6
+#define B_w	w7
+
+#define A_q	q0
+#define B_q	q1
+#define C_q	q2
+#define D_q	q3
+#define E_q	q4
+#define F_q	q5
+#define G_q	q6
 
 /* Copies are split into 3 main cases:
 
@@ -67,9 +61,9 @@
    bumping up the small copies up to 32 bytes allows us to do that without
    cost and also allows us to reduce the size of the prep code before loop64.
 
-   All copies are done only via two registers r6 and r7.  This is to ensure
-   that all loads hit a single hardware prefetcher which can get correctly
-   trained to prefetch a single stream.
+   The copy loop uses only one register q0.  This is to ensure that all loads
+   hit a single hardware prefetcher which can get correctly trained to prefetch
+   a single stream.
 
    The non-temporal stores help optimize cache utilization.  */
 
@@ -80,29 +74,29 @@ ENTRY_ALIGN (__memcpy_falkor, 6)
 	add	srcend, src, count
 	add	dstend, dstin, count
 	b.ls	L(copy32)
-	ldp	A_l, A_h, [src]
+	ldr	A_q, [src]
 	cmp	count, 128
-	stp	A_l, A_h, [dstin]
+	str	A_q, [dstin]
 	b.hi	L(copy_long)
 
 	/* Medium copies: 33..128 bytes.  */
 	sub	tmp1, count, 1
-	ldp	A_l, A_h, [src, 16]
-	ldp	B_l, B_h, [srcend, -32]
-	ldp	C_l, C_h, [srcend, -16]
+	ldr	A_q, [src, 16]
+	ldr	B_q, [srcend, -32]
+	ldr	C_q, [srcend, -16]
 	tbz	tmp1, 6, 1f
-	ldp	D_l, D_h, [src, 32]
-	ldp	E_l, E_h, [src, 48]
-	stp	D_l, D_h, [dstin, 32]
-	stp	E_l, E_h, [dstin, 48]
-	ldp	F_l, F_h, [srcend, -64]
-	ldp	G_l, G_h, [srcend, -48]
-	stp	F_l, F_h, [dstend, -64]
-	stp	G_l, G_h, [dstend, -48]
+	ldr	D_q, [src, 32]
+	ldr	E_q, [src, 48]
+	str	D_q, [dstin, 32]
+	str	E_q, [dstin, 48]
+	ldr	F_q, [srcend, -64]
+	ldr	G_q, [srcend, -48]
+	str	F_q, [dstend, -64]
+	str	G_q, [dstend, -48]
 1:
-	stp	A_l, A_h, [dstin, 16]
-	stp	B_l, B_h, [dstend, -32]
-	stp	C_l, C_h, [dstend, -16]
+	str	A_q, [dstin, 16]
+	str	B_q, [dstend, -32]
+	str	C_q, [dstend, -16]
 	ret
 
 	.p2align 4
@@ -111,44 +105,44 @@ L(copy32):
 	/* 16-32 */
 	cmp	count, 16
 	b.lo	1f
-	ldp	A_l, A_h, [src]
-	ldp	B_l, B_h, [srcend, -16]
-	stp	A_l, A_h, [dstin]
-	stp	B_l, B_h, [dstend, -16]
+	ldr	A_q, [src]
+	ldr	B_q, [srcend, -16]
+	str	A_q, [dstin]
+	str	B_q, [dstend, -16]
 	ret
 	.p2align 4
 1:
 	/* 8-15 */
 	tbz	count, 3, 1f
-	ldr	A_l, [src]
-	ldr	B_l, [srcend, -8]
-	str	A_l, [dstin]
-	str	B_l, [dstend, -8]
+	ldr	A_x, [src]
+	ldr	B_x, [srcend, -8]
+	str	A_x, [dstin]
+	str	B_x, [dstend, -8]
 	ret
 	.p2align 4
 1:
 	/* 4-7 */
 	tbz	count, 2, 1f
-	ldr	A_lw, [src]
-	ldr	B_lw, [srcend, -4]
-	str	A_lw, [dstin]
-	str	B_lw, [dstend, -4]
+	ldr	A_w, [src]
+	ldr	B_w, [srcend, -4]
+	str	A_w, [dstin]
+	str	B_w, [dstend, -4]
 	ret
 	.p2align 4
 1:
 	/* 2-3 */
 	tbz	count, 1, 1f
-	ldrh	A_lw, [src]
-	ldrh	B_lw, [srcend, -2]
-	strh	A_lw, [dstin]
-	strh	B_lw, [dstend, -2]
+	ldrh	A_w, [src]
+	ldrh	B_w, [srcend, -2]
+	strh	A_w, [dstin]
+	strh	B_w, [dstend, -2]
 	ret
 	.p2align 4
 1:
 	/* 0-1 */
 	tbz	count, 0, 1f
-	ldrb	A_lw, [src]
-	strb	A_lw, [dstin]
+	ldrb	A_w, [src]
+	strb	A_w, [dstin]
 1:
 	ret
 
@@ -167,30 +161,29 @@ L(copy_long):
 	add	count, count, tmp1
 
 L(loop64):
-	ldp	A_l, A_h, [src, 16]!
-	stnp	A_l, A_h, [dst, 16]
-	ldp	A_l, A_h, [src, 16]!
+	ldr	A_q, [src, 16]!
+	str	A_q, [dst, 16]
+	ldr	A_q, [src, 16]!
 	subs	count, count, 64
-	stnp	A_l, A_h, [dst, 32]
-	ldp	A_l, A_h, [src, 16]!
-	stnp	A_l, A_h, [dst, 48]
-	ldp	A_l, A_h, [src, 16]!
-	stnp	A_l, A_h, [dst, 64]
-	add	dst, dst, 64
+	str	A_q, [dst, 32]
+	ldr	A_q, [src, 16]!
+	str	A_q, [dst, 48]
+	ldr	A_q, [src, 16]!
+	str	A_q, [dst, 64]!
 	b.hi	L(loop64)
 
 	/* Write the last full set of 64 bytes.  The remainder is at most 64
 	   bytes, so it is safe to always copy 64 bytes from the end even if
 	   there is just 1 byte left.  */
 L(last64):
-	ldp	A_l, A_h, [srcend, -64]
-	stnp	A_l, A_h, [dstend, -64]
-	ldp	B_l, B_h, [srcend, -48]
-	stnp	B_l, B_h, [dstend, -48]
-	ldp	C_l, C_h, [srcend, -32]
-	stnp	C_l, C_h, [dstend, -32]
-	ldp	D_l, D_h, [srcend, -16]
-	stnp	D_l, D_h, [dstend, -16]
+	ldr	E_q, [srcend, -64]
+	str	E_q, [dstend, -64]
+	ldr	D_q, [srcend, -48]
+	str	D_q, [dstend, -48]
+	ldr	C_q, [srcend, -32]
+	str	C_q, [dstend, -32]
+	ldr	B_q, [srcend, -16]
+	str	B_q, [dstend, -16]
 	ret
 
 END (__memcpy_falkor)

http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=ce76a5cb8d3658cc4fc935cf774e8bb5836796dc

commit ce76a5cb8d3658cc4fc935cf774e8bb5836796dc
Author: Siddhesh Poyarekar <siddhesh@sourceware.org>
Date:   Fri Jun 29 22:45:07 2018 +0530

    aarch64,falkor: Use vector registers for memmove
    
    Vector registers perform much better for moves compared to pairs of
    registers on falkor, so use them instead.  This results in a time
    reduction of up to 50% (i.e. 2x improvement) for a lot of the smaller
    sizes, i.e. up to 1K in memmove-walk.  Improvements for larger sizes are
    smaller, at about 1%-2%.
    
    	* sysdeps/aarch64/multiarch/memmove_falkor.S
    	(__memcpy_falkor): Use vector registers.

diff --git a/ChangeLog b/ChangeLog
index 0c79b86..5d450c9 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,8 @@
+2018-06-29  Siddhesh Poyarekar  <siddhesh@sourceware.org>
+
+	* sysdeps/aarch64/multiarch/memmove_falkor.S
+	(__memcpy_falkor): Use vector registers.
+
 2018-06-29  Martin Sebor  <msebor@redhat.com>
 
 	* manual/stdio.texi (Customizing Printf): Mention interaction
diff --git a/sysdeps/aarch64/multiarch/memmove_falkor.S b/sysdeps/aarch64/multiarch/memmove_falkor.S
index c0d9560..5163f68 100644
--- a/sysdeps/aarch64/multiarch/memmove_falkor.S
+++ b/sysdeps/aarch64/multiarch/memmove_falkor.S
@@ -23,44 +23,36 @@
 #define dstin	x0
 #define src	x1
 #define count	x2
-#define dstlen	x3
 #define dst	x3
 #define srcend	x4
 #define dstend	x5
-#define A_l	x6
-#define A_lw	w6
-#define A_h	x7
-#define A_hw	w7
-#define B_l	x8
-#define B_lw	w8
-#define B_h	x9
-#define C_l	x10
-#define C_h	x11
-#define D_l	x12
-#define D_h	x13
-#define E_l	src
-#define E_h	count
-#define F_l	srcend
-#define F_h	dst
+#define A_x	x6
+#define B_x	x7
+#define A_w	w6
+#define B_w	w7
 #define tmp1	x14
 
-/* Alias with A_l and A_h to train the prefetcher.  */
-#define Q_l	x22
-#define Q_h	x23
+#define Q_q	q6
+#define A_q	q22
+#define B_q	q18
+#define C_q	q19
+#define D_q	q20
+#define E_q	q21
+#define F_q	q17
+#define G_q	q23
 
 /* RATIONALE:
 
-   The copy has 4 distinct parts:
-   * Small copies of 16 bytes and under
-   * Medium sized copies of 17-96 bytes
-   * Large copies where the source address is higher than the destination
+   The move has 4 distinct parts:
+   * Small moves of 16 bytes and under
+   * Medium sized moves of 17-96 bytes
+   * Large moves where the source address is higher than the destination
      (forward copies)
-   * Large copies where the destination address is higher than the source
+   * Large moves where the destination address is higher than the source
      (copy backward, or move).
 
-   We use only two registerpairs x6,x7 and x22,x23 for the copies and copy 32
-   bytes at a time to correctly train the hardware prefetcher for better
-   throughput.  */
+   We use only two registers q6 and q22 for the moves and move 32 bytes at a
+   time to correctly train the hardware prefetcher for better throughput.  */
 ENTRY_ALIGN (__memmove_falkor, 6)
 
 	sub	tmp1, dstin, src
@@ -77,17 +69,17 @@ ENTRY_ALIGN (__memmove_falkor, 6)
 
 	/* Medium copies: 17..96 bytes.  */
 	sub	tmp1, count, 1
-	ldp	A_l, A_h, [src]
+	ldr	A_q, [src]
 	tbnz	tmp1, 6, L(copy96)
-	ldp	D_l, D_h, [srcend, -16]
+	ldr	D_q, [srcend, -16]
 	tbz	tmp1, 5, 1f
-	ldp	B_l, B_h, [src, 16]
-	ldp	C_l, C_h, [srcend, -32]
-	stp	B_l, B_h, [dstin, 16]
-	stp	C_l, C_h, [dstend, -32]
+	ldr	B_q, [src, 16]
+	ldr	C_q, [srcend, -32]
+	str	B_q, [dstin, 16]
+	str	C_q, [dstend, -32]
 1:
-	stp	A_l, A_h, [dstin]
-	stp	D_l, D_h, [dstend, -16]
+	str	A_q, [dstin]
+	str	D_q, [dstend, -16]
 	ret
 
 	.p2align 4
@@ -95,52 +87,52 @@ ENTRY_ALIGN (__memmove_falkor, 6)
 L(copy16):
 	cmp	count, 8
 	b.lo	1f
-	ldr	A_l, [src]
-	ldr	A_h, [srcend, -8]
-	str	A_l, [dstin]
-	str	A_h, [dstend, -8]
+	ldr	A_x, [src]
+	ldr	B_x, [srcend, -8]
+	str	A_x, [dstin]
+	str	B_x, [dstend, -8]
 	ret
 	.p2align 4
 1:
 	/* 4-7 */
 	tbz	count, 2, 1f
-	ldr	A_lw, [src]
-	ldr	A_hw, [srcend, -4]
-	str	A_lw, [dstin]
-	str	A_hw, [dstend, -4]
+	ldr	A_w, [src]
+	ldr	B_w, [srcend, -4]
+	str	A_w, [dstin]
+	str	B_w, [dstend, -4]
 	ret
 	.p2align 4
 1:
 	/* 2-3 */
 	tbz	count, 1, 1f
-	ldrh	A_lw, [src]
-	ldrh	A_hw, [srcend, -2]
-	strh	A_lw, [dstin]
-	strh	A_hw, [dstend, -2]
+	ldrh	A_w, [src]
+	ldrh	B_w, [srcend, -2]
+	strh	A_w, [dstin]
+	strh	B_w, [dstend, -2]
 	ret
 	.p2align 4
 1:
 	/* 0-1 */
 	tbz	count, 0, 1f
-	ldrb	A_lw, [src]
-	strb	A_lw, [dstin]
+	ldrb	A_w, [src]
+	strb	A_w, [dstin]
 1:	ret
 
 	.p2align 4
 	/* Copy 64..96 bytes.  Copy 64 bytes from the start and
 	   32 bytes from the end.  */
 L(copy96):
-	ldp	B_l, B_h, [src, 16]
-	ldp	C_l, C_h, [src, 32]
-	ldp	D_l, D_h, [src, 48]
-	ldp	E_l, E_h, [srcend, -32]
-	ldp	F_l, F_h, [srcend, -16]
-	stp	A_l, A_h, [dstin]
-	stp	B_l, B_h, [dstin, 16]
-	stp	C_l, C_h, [dstin, 32]
-	stp	D_l, D_h, [dstin, 48]
-	stp	E_l, E_h, [dstend, -32]
-	stp	F_l, F_h, [dstend, -16]
+	ldr	B_q, [src, 16]
+	ldr	C_q, [src, 32]
+	ldr	D_q, [src, 48]
+	ldr	E_q, [srcend, -32]
+	ldr	F_q, [srcend, -16]
+	str	A_q, [dstin]
+	str	B_q, [dstin, 16]
+	str	C_q, [dstin, 32]
+	str	D_q, [dstin, 48]
+	str	E_q, [dstend, -32]
+	str	F_q, [dstend, -16]
 	ret
 
 	/* Align SRC to 16 byte alignment so that we don't cross cache line
@@ -150,92 +142,83 @@ L(copy96):
 
 	.p2align 4
 L(copy_long):
-	mov	B_l, Q_l
-	mov	B_h, Q_h
-	ldp	A_l, A_h, [src]
+	ldr	A_q, [src]
 	and	tmp1, src, 15
 	bic	src, src, 15
 	sub	dst, dstin, tmp1
 	add	count, count, tmp1	/* Count is now 16 too large.  */
-	ldp	Q_l, Q_h, [src, 16]!
-	stp	A_l, A_h, [dstin]
-	ldp	A_l, A_h, [src, 16]!
+	ldr	Q_q, [src, 16]!
+	str	A_q, [dstin]
+	ldr	A_q, [src, 16]!
 	subs	count, count, 32 + 64 + 16	/* Test and readjust count.  */
 	b.ls	L(last64)
 
 L(loop64):
 	subs	count, count, 32
-	stp	Q_l, Q_h, [dst, 16]
-	ldp	Q_l, Q_h, [src, 16]!
-	stp	A_l, A_h, [dst, 32]!
-	ldp	A_l, A_h, [src, 16]!
+	str	Q_q, [dst, 16]
+	ldr	Q_q, [src, 16]!
+	str	A_q, [dst, 32]!
+	ldr	A_q, [src, 16]!
 	b.hi	L(loop64)
 
 	/* Write the last full set of 64 bytes.  The remainder is at most 64
 	   bytes and at least 33 bytes, so it is safe to always copy 64 bytes
 	   from the end.  */
 L(last64):
-	ldp	C_l, C_h, [srcend, -64]
-	stp	Q_l, Q_h, [dst, 16]
-	mov	Q_l, B_l
-	mov	Q_h, B_h
-	ldp	B_l, B_h, [srcend, -48]
-	stp	A_l, A_h, [dst, 32]
-	ldp	A_l, A_h, [srcend, -32]
-	ldp	D_l, D_h, [srcend, -16]
-	stp	C_l, C_h, [dstend, -64]
-	stp	B_l, B_h, [dstend, -48]
-	stp	A_l, A_h, [dstend, -32]
-	stp	D_l, D_h, [dstend, -16]
+	ldr	C_q, [srcend, -64]
+	str	Q_q, [dst, 16]
+	ldr	B_q, [srcend, -48]
+	str	A_q, [dst, 32]
+	ldr	A_q, [srcend, -32]
+	ldr	D_q, [srcend, -16]
+	str	C_q, [dstend, -64]
+	str	B_q, [dstend, -48]
+	str	A_q, [dstend, -32]
+	str	D_q, [dstend, -16]
 	ret
 
 	.p2align 4
 L(move_long):
 	cbz	tmp1, 3f
 
-	mov	B_l, Q_l
-	mov	B_h, Q_h
-
 	/* Align SRCEND to 16 byte alignment so that we don't cross cache line
 	   boundaries on both loads and stores.  There are at least 96 bytes
 	   to copy, so copy 16 bytes unaligned and then align.  The loop
 	   copies 32 bytes per iteration and prefetches one iteration ahead.  */
 
-	ldp	A_l, A_h, [srcend, -16]
+	ldr	A_q, [srcend, -16]
 	and	tmp1, srcend, 15
 	sub	srcend, srcend, tmp1
-	ldp	Q_l, Q_h, [srcend, -16]!
-	stp	A_l, A_h, [dstend, -16]
+	ldr	Q_q, [srcend, -16]!
+	str	A_q, [dstend, -16]
 	sub	count, count, tmp1
-	ldp	A_l, A_h, [srcend, -16]!
+	ldr	A_q, [srcend, -16]!
 	sub	dstend, dstend, tmp1
 	subs	count, count, 32 + 64
 	b.ls	2f
 
 1:
 	subs	count, count, 32
-	stp	Q_l, Q_h, [dstend, -16]
-	ldp	Q_l, Q_h, [srcend, -16]!
-	stp	A_l, A_h, [dstend, -32]!
-	ldp	A_l, A_h, [srcend, -16]!
+	str	Q_q, [dstend, -16]
+	ldr	Q_q, [srcend, -16]!
+	str	A_q, [dstend, -32]!
+	ldr	A_q, [srcend, -16]!
 	b.hi	1b
 
 	/* Write the last full set of 64 bytes.  The remainder is at most 64
 	   bytes and at least 33 bytes, so it is safe to always copy 64 bytes
 	   from the start.  */
 2:
-	ldp	C_l, C_h, [src, 48]
-	stp	Q_l, Q_h, [dstend, -16]
-	mov	Q_l, B_l
-	mov	Q_h, B_h
-	ldp	B_l, B_h, [src, 32]
-	stp	A_l, A_h, [dstend, -32]
-	ldp	A_l, A_h, [src, 16]
-	ldp	D_l, D_h, [src]
-	stp	C_l, C_h, [dstin, 48]
-	stp	B_l, B_h, [dstin, 32]
-	stp	A_l, A_h, [dstin, 16]
-	stp	D_l, D_h, [dstin]
+	ldr	C_q, [src, 48]
+	str	Q_q, [dstend, -16]
+	ldr	B_q, [src, 32]
+	str	A_q, [dstend, -32]
+	ldr	A_q, [src, 16]
+	ldr	D_q, [src]
+	str	C_q, [dstin, 48]
+	str	B_q, [dstin, 32]
+	str	A_q, [dstin, 16]
+	str	D_q, [dstin]
 3:	ret
 
 END (__memmove_falkor)

-----------------------------------------------------------------------

Summary of changes:
 ChangeLog                                  |    8 +
 sysdeps/aarch64/multiarch/memcpy_falkor.S  |  137 ++++++++++----------
 sysdeps/aarch64/multiarch/memmove_falkor.S |  193 +++++++++++++---------------
 3 files changed, 161 insertions(+), 177 deletions(-)


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