This is the mail archive of the
glibc-cvs@sourceware.org
mailing list for the glibc project.
GNU C Library master sources branch azanella/ifunc-c-sparc-m7 created. glibc-2.26.9000-878-g82cf829
- From: azanella at sourceware dot org
- To: glibc-cvs at sourceware dot org
- Date: 29 Nov 2017 12:31:08 -0000
- Subject: GNU C Library master sources branch azanella/ifunc-c-sparc-m7 created. glibc-2.26.9000-878-g82cf829
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "GNU C Library master sources".
The branch, azanella/ifunc-c-sparc-m7 has been created
at 82cf829f3a92dec263c326921e3a6c2896d48b06 (commit)
- Log -----------------------------------------------------------------
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=82cf829f3a92dec263c326921e3a6c2896d48b06
commit 82cf829f3a92dec263c326921e3a6c2896d48b06
Author: Jose E. Marchesi <jose.marchesi@oracle.com>
Date: Fri Oct 20 20:29:06 2017 -0200
sparc: M7 optimized memset/bzero
Tested in sparcv9-*-* and sparc64-*-* targets in both multi and
non-multi arch configurations.
Support added to identify Sparc M7/T7/S7/M8/T8 processor capability.
Usual "make check" correctness tests run with no regressions.
Performance tests run on Sparc S7 using new code and old niagara4 code.
Optimizations for memset also apply to bzero as they share code.
For memset/bzero, performance comparison with niagara4 code:
For memset nonzero data,
256-1023 bytes - 60-90% gain (in cache); 5% gain (out of cache)
1K+ bytes - 80-260% gain (in cache); 40-80% gain (out of cache)
For memset zero data (and bzero),
256-1023 bytes - 80-120% gain (in cache), 0% gain (out of cache)
1024+ bytes - 2-4x gain (in cache), 10-35% gain (out of cache)
Jose E. Marchesi <jose.marchesi@oracle.com>
Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
(sysdeps_routines): Add memset-niagara7.
* sysdeps/sparc/sparc64/multiarch/Makefile (sysdes_rotuines):
Likewise.
* sysdeps/sparc/sparc32/sparcv9/multiarch/memset-niagara7.S: New
file.
* sysdeps/sparc/sparc64/multiarch/memset-niagara7.S: Likewise.
* sysdeps/sparc/sparc64/multiarch/ifunc-impl-list.c
(__libc_ifunc_impl_list): Add __bzero_niagara7 and __memset_niagara7.
* sysdeps/sparc/sparc64/multiarch/ifunc-memset.h (IFUNC_SELECTOR):
Add niagara7 option.
diff --git a/ChangeLog b/ChangeLog
index d922a3f..5314eb9 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -2,6 +2,18 @@
Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
+ (sysdeps_routines): Add memset-niagara7.
+ * sysdeps/sparc/sparc64/multiarch/Makefile (sysdes_rotuines):
+ Likewise.
+ * sysdeps/sparc/sparc32/sparcv9/multiarch/memset-niagara7.S: New
+ file.
+ * sysdeps/sparc/sparc64/multiarch/memset-niagara7.S: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/ifunc-impl-list.c
+ (__libc_ifunc_impl_list): Add __bzero_niagara7 and __memset_niagara7.
+ * sysdeps/sparc/sparc64/multiarch/ifunc-memset.h (IFUNC_SELECTOR):
+ Add niagara7 option.
+
+ * sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
(sysdeps_routines): Add memcpy-memmove-niagara7 and memmove-ultra1.
* sysdeps/sparc/sparc64/multiarch/Makefile (sysdeps_routines):
Likewise.
diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile b/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
index 869f063..a6d08f3 100644
--- a/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
+++ b/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
@@ -10,5 +10,5 @@ ifeq ($(subdir),string)
sysdep_routines += memcpy-ultra3 memcpy-niagara1 memcpy-niagara2 \
memset-niagara1 memcpy-niagara4 memset-niagara4 \
memcpy-ultra1 memset-ultra1 memcpy-memmove-niagara7 \
- memmove-ultra1
+ memmove-ultra1 memset-niagara7
endif
diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/memset-niagara7.S b/sysdeps/sparc/sparc32/sparcv9/multiarch/memset-niagara7.S
new file mode 100644
index 0000000..de91aa4
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/multiarch/memset-niagara7.S
@@ -0,0 +1,2 @@
+#define XCC icc
+#include <sparc64/multiarch/memset-niagara7.S>
diff --git a/sysdeps/sparc/sparc64/multiarch/Makefile b/sysdeps/sparc/sparc64/multiarch/Makefile
index 69292ca..eaf758e 100644
--- a/sysdeps/sparc/sparc64/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/multiarch/Makefile
@@ -10,7 +10,7 @@ ifeq ($(subdir),string)
sysdep_routines += memcpy-ultra3 memcpy-niagara1 memcpy-niagara2 \
memset-niagara1 memcpy-niagara4 memset-niagara4 \
memcpy-ultra1 memset-ultra1 memcpy-memmove-niagara7 \
- memmove-ultra1
+ memmove-ultra1 memset-niagara7
endif
ifeq ($(subdir),stdlib)
diff --git a/sysdeps/sparc/sparc64/multiarch/ifunc-impl-list.c b/sysdeps/sparc/sparc64/multiarch/ifunc-impl-list.c
index a803392..cce78f0 100644
--- a/sysdeps/sparc/sparc64/multiarch/ifunc-impl-list.c
+++ b/sysdeps/sparc/sparc64/multiarch/ifunc-impl-list.c
@@ -62,6 +62,8 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
IFUNC_IMPL_ADD (array, i, mempcpy, 1, __mempcpy_ultra1));
IFUNC_IMPL (i, name, bzero,
+ IFUNC_IMPL_ADD (array, i, bzero, hwcap & HWCAP_SPARC_ADP,
+ __bzero_niagara7)
IFUNC_IMPL_ADD (array, i, bzero, hwcap & HWCAP_SPARC_CRYPTO,
__bzero_niagara4)
IFUNC_IMPL_ADD (array, i, bzero, hwcap & HWCAP_SPARC_BLKINIT,
@@ -69,6 +71,8 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
IFUNC_IMPL_ADD (array, i, bzero, 1, __bzero_ultra1));
IFUNC_IMPL (i, name, memset,
+ IFUNC_IMPL_ADD (array, i, memset, hwcap & HWCAP_SPARC_ADP,
+ __memset_niagara7)
IFUNC_IMPL_ADD (array, i, memset, hwcap & HWCAP_SPARC_CRYPTO,
__memset_niagara4)
IFUNC_IMPL_ADD (array, i, memset, hwcap & HWCAP_SPARC_BLKINIT,
diff --git a/sysdeps/sparc/sparc64/multiarch/ifunc-memset.h b/sysdeps/sparc/sparc64/multiarch/ifunc-memset.h
index f3b9293..bc273d6 100644
--- a/sysdeps/sparc/sparc64/multiarch/ifunc-memset.h
+++ b/sysdeps/sparc/sparc64/multiarch/ifunc-memset.h
@@ -19,6 +19,7 @@
#include <ifunc-init.h>
+extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara7) attribute_hidden;
extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara4) attribute_hidden;
extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara1) attribute_hidden;
extern __typeof (REDIRECT_NAME) OPTIMIZE (ultra1) attribute_hidden;
@@ -26,6 +27,8 @@ extern __typeof (REDIRECT_NAME) OPTIMIZE (ultra1) attribute_hidden;
static inline void *
IFUNC_SELECTOR (int hwcap)
{
+ if (hwcap & HWCAP_SPARC_ADP)
+ return OPTIMIZE (niagara7);
if (hwcap & HWCAP_SPARC_CRYPTO)
return OPTIMIZE (niagara4);
if (hwcap & HWCAP_SPARC_BLKINIT)
diff --git a/sysdeps/sparc/sparc64/multiarch/memset-niagara7.S b/sysdeps/sparc/sparc64/multiarch/memset-niagara7.S
new file mode 100644
index 0000000..bfe107e
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/memset-niagara7.S
@@ -0,0 +1,334 @@
+/* Set a block of memory to some byte value. For SUN4V M7.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <sysdep.h>
+
+#ifndef XCC
+# define XCC xcc
+#endif
+ .register %g2, #scratch
+ .register %g3, #scratch
+
+/* The algorithm is as follows :
+ *
+ * For small 7 or fewer bytes stores, bytes will be stored.
+ *
+ * For less than 32 bytes stores, align the address on 4 byte boundary.
+ * Then store as many 4-byte chunks, followed by trailing bytes.
+ *
+ * For sizes greater than 32 bytes, align the address on 8 byte boundary.
+ * if (count >= 64) {
+ * store 8-bytes chunks to align the address on 64 byte boundary
+ * if (value to be set is zero && count >= MIN_ZERO) {
+ * Using BIS stores, set the first long word of each
+ * 64-byte cache line to zero which will also clear the
+ * other seven long words of the cache line.
+ * }
+ * else if (count >= MIN_LOOP) {
+ * Using BIS stores, set the first long word of each of
+ * ST_CHUNK cache lines (64 bytes each) before the main
+ * loop is entered.
+ * In the main loop, continue pre-setting the first long
+ * word of each cache line ST_CHUNK lines in advance while
+ * setting the other seven long words (56 bytes) of each
+ * cache line until fewer than ST_CHUNK*64 bytes remain.
+ * Then set the remaining seven long words of each cache
+ * line that has already had its first long word set.
+ * }
+ * store remaining data in 64-byte chunks until less than
+ * 64 bytes remain.
+ * }
+ * Store as many 8-byte chunks, followed by trailing bytes.
+ *
+ *
+ * BIS = Block Init Store
+ * Doing the advance store of the first element of the cache line
+ * initiates the displacement of a cache line while only using a single
+ * instruction in the pipeline. That avoids various pipeline delays,
+ * such as filling the miss buffer. The performance effect is
+ * similar to prefetching for normal stores.
+ * The special case for zero fills runs faster and uses fewer instruction
+ * cycles than the normal memset loop.
+ *
+ * We only use BIS for memset of greater than MIN_LOOP bytes because a sequence
+ * BIS stores must be followed by a membar #StoreStore. The benefit of
+ * the BIS store must be balanced against the cost of the membar operation.
+ */
+
+/*
+ * ASI_STBI_P marks the cache line as "least recently used"
+ * which means if many threads are active, it has a high chance
+ * of being pushed out of the cache between the first initializing
+ * store and the final stores.
+ * Thus, we use ASI_STBIMRU_P which marks the cache line as
+ * "most recently used" for all but the last store to the cache line.
+ */
+
+#define ASI_BLK_INIT_QUAD_LDD_P 0xe2
+#define ASI_ST_BLK_INIT_MRU_P 0xf2
+
+#define ASI_STBI_P ASI_BLK_INIT_QUAD_LDD_P
+#define ASI_STBIMRU_P ASI_ST_BLK_INIT_MRU_P
+
+#define ST_CHUNK 24 /* multiple of 4 due to loop unrolling */
+#define MIN_LOOP (ST_CHUNK)*64
+#define MIN_ZERO 256
+
+#define EX_ST(x) x
+#define EX_RETVAL(x) x
+#define STORE_ASI(src,addr) stxa src, [addr] ASI_STBIMRU_P
+#define STORE_INIT(src,addr) stxa src, [addr] ASI_STBI_P
+
+#if IS_IN (libc)
+
+ .text
+ .align 32
+
+ENTRY(__bzero_niagara7)
+ /* bzero (dst, size) */
+ mov %o1, %o2
+ mov 0, %o1
+ /* fall through into memset code */
+END(__bzero_niagara7)
+
+ENTRY(__memset_niagara7)
+ /* memset (src, c, size) */
+ mov %o0, %o5 /* copy sp1 before using it */
+ cmp %o2, 7 /* if small counts, just write bytes */
+ bleu,pn %XCC, .Lwrchar
+ and %o1, 0xff, %o1 /* o1 is (char)c */
+
+ sll %o1, 8, %o3
+ or %o1, %o3, %o1 /* now o1 has 2 bytes of c */
+ sll %o1, 16, %o3
+ cmp %o2, 32
+ blu,pn %XCC, .Lwdalign
+ or %o1, %o3, %o1 /* now o1 has 4 bytes of c */
+
+ sllx %o1, 32, %o3
+ or %o1, %o3, %o1 /* now o1 has 8 bytes of c */
+
+.Ldbalign:
+ andcc %o5, 7, %o3 /* is sp1 aligned on a 8 byte bound? */
+ bz,pt %XCC, .Lblkalign /* already long word aligned */
+ sub %o3, 8, %o3 /* -(bytes till long word aligned) */
+
+ add %o2, %o3, %o2 /* update o2 with new count */
+ /* Set -(%o3) bytes till sp1 long word aligned */
+1: stb %o1, [%o5] /* there is at least 1 byte to set */
+ inccc %o3 /* byte clearing loop */
+ bl,pt %XCC, 1b
+ inc %o5
+
+ /* Now sp1 is long word aligned (sp1 is found in %o5) */
+.Lblkalign:
+ cmp %o2, 64 /* check if there are 64 bytes to set */
+ blu,pn %XCC, .Lwrshort
+ mov %o2, %o3
+
+ andcc %o5, 63, %o3 /* is sp1 block aligned? */
+ bz,pt %XCC, .Lblkwr /* now block aligned */
+ sub %o3, 64, %o3 /* o3 is -(bytes till block aligned) */
+ add %o2, %o3, %o2 /* o2 is the remainder */
+
+ /* Store -(%o3) bytes till dst is block (64 byte) aligned. */
+ /* Use long word stores. */
+ /* Recall that dst is already long word aligned */
+1:
+ addcc %o3, 8, %o3
+ stx %o1, [%o5]
+ bl,pt %XCC, 1b
+ add %o5, 8, %o5
+
+ /* Now sp1 is block aligned */
+.Lblkwr:
+ andn %o2, 63, %o4 /* calculate size of blocks in bytes */
+ brz,pn %o1, .Lwrzero /* special case if c == 0 */
+ and %o2, 63, %o3 /* %o3 = bytes left after blk stores */
+
+ cmp %o4, MIN_LOOP /* check for enough bytes to set */
+ blu,pn %XCC, .Lshort_set /* to justify cost of membar */
+ nop /* must be > pre-cleared lines */
+
+ /* initial cache-clearing stores */
+ /* get store pipeline moving */
+
+/* Primary memset loop for large memsets */
+.Lwr_loop:
+ mov ST_CHUNK, %g1
+.Lwr_loop_start:
+ subcc %g1, 4, %g1
+ EX_ST(STORE_ASI(%o1,%o5))
+ add %o5, 64, %o5
+ EX_ST(STORE_ASI(%o1,%o5))
+ add %o5, 64, %o5
+ EX_ST(STORE_ASI(%o1,%o5))
+ add %o5, 64, %o5
+ EX_ST(STORE_ASI(%o1,%o5))
+ bgu %XCC, .Lwr_loop_start
+ add %o5, 64, %o5
+
+ sub %o5, ST_CHUNK*64, %o5 /* reset %o5 */
+ mov ST_CHUNK, %g1
+ sub %o5, 8, %o5 /* adjust %o5 for ASI store */
+
+.Lwr_loop_rest:
+ stx %o1,[%o5+8+8]
+ sub %o4, 64, %o4
+ stx %o1,[%o5+16+8]
+ subcc %g1, 1, %g1
+ stx %o1,[%o5+24+8]
+ stx %o1,[%o5+32+8]
+ stx %o1,[%o5+40+8]
+ add %o5, 64, %o5
+ stx %o1,[%o5-8]
+ bgu %XCC, .Lwr_loop_rest
+ EX_ST(STORE_INIT(%o1,%o5))
+
+ add %o5, 8, %o5 /* restore %o5 offset */
+
+ /* If more than ST_CHUNK*64 bytes remain to set, continue */
+ /* setting the first long word of each cache line in advance */
+ /* to keep the store pipeline moving. */
+
+ cmp %o4, ST_CHUNK*64
+ bge,pt %XCC, .Lwr_loop_start
+ mov ST_CHUNK, %g1
+
+ brz,a,pn %o4, .Lasi_done
+ nop
+
+ sub %o5, 8, %o5 /* adjust %o5 for ASI store */
+.Lwr_loop_small:
+ add %o5, 8, %o5 /* adjust %o5 for ASI store */
+ EX_ST(STORE_ASI(%o1,%o5))
+ stx %o1,[%o5+8]
+ stx %o1,[%o5+16]
+ stx %o1,[%o5+24]
+ stx %o1,[%o5+32]
+ subcc %o4, 64, %o4
+ stx %o1,[%o5+40]
+ add %o5, 56, %o5
+ stx %o1,[%o5-8]
+ bgu,pt %XCC, .Lwr_loop_small
+ EX_ST(STORE_INIT(%o1,%o5))
+
+ ba .Lasi_done
+ add %o5, 8, %o5 /* restore %o5 offset */
+
+/* Special case loop for zero fill memsets */
+/* For each 64 byte cache line, single STBI to first element */
+/* clears line */
+.Lwrzero:
+ cmp %o4, MIN_ZERO /* check if enough bytes to set */
+ /* to pay %asi + membar cost */
+ blu %XCC, .Lshort_set
+ nop
+ sub %o4, 256, %o4
+
+.Lwrzero_loop:
+ mov 64, %g3
+ EX_ST(STORE_INIT(%o1,%o5))
+ subcc %o4, 256, %o4
+ EX_ST(STORE_INIT(%o1,%o5+%g3))
+ add %o5, 256, %o5
+ sub %g3, 192, %g3
+ EX_ST(STORE_INIT(%o1,%o5+%g3))
+ add %g3, 64, %g3
+ bge,pt %XCC, .Lwrzero_loop
+ EX_ST(STORE_INIT(%o1,%o5+%g3))
+ add %o4, 256, %o4
+
+ brz,pn %o4, .Lbsi_done
+ nop
+.Lwrzero_small:
+ EX_ST(STORE_INIT(%o1,%o5))
+ subcc %o4, 64, %o4
+ bgu,pt %XCC, .Lwrzero_small
+ add %o5, 64, %o5
+
+.Lasi_done:
+.Lbsi_done:
+ membar #StoreStore /* required by use of BSI */
+
+.Lshort_set:
+ cmp %o4, 64 /* check if 64 bytes to set */
+ blu %XCC, 5f
+ nop
+4: /* set final blocks of 64 bytes */
+ stx %o1, [%o5]
+ stx %o1, [%o5+8]
+ stx %o1, [%o5+16]
+ stx %o1, [%o5+24]
+ subcc %o4, 64, %o4
+ stx %o1, [%o5+32]
+ stx %o1, [%o5+40]
+ add %o5, 64, %o5
+ stx %o1, [%o5-16]
+ bgu,pt %XCC, 4b
+ stx %o1, [%o5-8]
+
+5:
+ /* Set the remaining long words */
+.Lwrshort:
+ subcc %o3, 8, %o3 /* Can we store any long words? */
+ blu,pn %XCC, .Lwrchars
+ and %o2, 7, %o2 /* calc bytes left after long words */
+6:
+ subcc %o3, 8, %o3
+ stx %o1, [%o5] /* store the long words */
+ bgeu,pt %XCC, 6b
+ add %o5, 8, %o5
+
+.Lwrchars: /* check for extra chars */
+ brnz %o2, .Lwrfin
+ nop
+ retl
+ nop
+
+.Lwdalign:
+ andcc %o5, 3, %o3 /* is sp1 aligned on a word boundary */
+ bz,pn %XCC, .Lwrword
+ andn %o2, 3, %o3 /* create word sized count in %o3 */
+
+ dec %o2 /* decrement count */
+ stb %o1, [%o5] /* clear a byte */
+ b .Lwdalign
+ inc %o5 /* next byte */
+
+.Lwrword:
+ subcc %o3, 4, %o3
+ st %o1, [%o5] /* 4-byte writing loop */
+ bnz,pt %XCC, .Lwrword
+ add %o5, 4, %o5
+ and %o2, 3, %o2 /* leftover count, if any */
+
+.Lwrchar:
+ /* Set the remaining bytes, if any */
+ brz %o2, .Lexit
+ nop
+.Lwrfin:
+ deccc %o2
+ stb %o1, [%o5]
+ bgu,pt %XCC, .Lwrfin
+ inc %o5
+.Lexit:
+ retl /* %o0 was preserved */
+ nop
+END(__memset_niagara7)
+#endif
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=2e9c1b668bbe1cc99d545dff6ff0d0c5e5139c68
commit 2e9c1b668bbe1cc99d545dff6ff0d0c5e5139c68
Author: Jose E. Marchesi <jose.marchesi@oracle.com>
Date: Fri Oct 20 20:21:56 2017 -0200
sparc: M7 optimized memcpy/mempcpy/memmove
Tested in sparcv9-*-* and sparc64-*-* targets in both multi and
non-multi arch configurations.
Support added to identify Sparc M7/T7/S7/M8/T8 processor capability.
Usual "make check" correctness tests run with no regressions.
Performance tests run on Sparc S7 using new code and old niagara4 code.
Optimizations for memcpy also apply to mempcpy and memmove
where they share code. Optimizations for memset also apply
to bzero as they share code.
For memcpy/mempcpy/memmove, performance comparison with niagara4 code:
Long word aligned data
0-127 bytes - minimal changes
128-1023 bytes - 7-30% gain
1024+ bytes - 1-7% gain (in cache); 30-100% gain (out of cache)
Word aligned data
0-127 bytes - 50%+ gain
128-1023 bytes - 10-200% gain
1024+ bytes - 0-15% gain (in cache); 5-50% gain (out of cache)
Unaligned data
0-127 bytes - 0-70%+ gain
128-447 bytes - 40-80%+ gain
448-511 bytes - 1-3% loss
512-4096 bytes - 2-3% gain (in cache); 0-20% gain (out of cache)
4096+ bytes - ± 3% (in cache); 20-50% gain (out of cache)
Jose E. Marchesi <jose.marchesi@oracle.com>
Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
(sysdeps_routines): Add memcpy-memmove-niagara7 and memmove-ultra1.
* sysdeps/sparc/sparc64/multiarch/Makefile (sysdeps_routines):
Likewise.
* sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-memmove-niagara7.S:
New file.
* sysdeps/sparc/sparc32/sparcv9/multiarch/memmove-ultra1.S: Likewise.
* sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-memmove.c: Likewise.
* sysdeps/sparc/sparc64/multiarch/ifunc-impl-list.c
(__libc_ifunc_impl_list): Add __memcpy_niagara7, __mempcpy_niagara7,
and __memmove_niagara7.
* sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h (IFUNC_SELECTOR):
Add niagara7 option.
* sysdeps/sparc/sparc64/multiarch/memmove.c: New file.
* sysdeps/sparc/sparc64/multiarch/ifunc-memmove.h: Likewise.
* sysdeps/sparc/sparc64/multiarch/memcpy-memmove-niagara7.S: Likewise.
* sysdeps/sparc/sparc64/multiarch/memmove-ultra1.S: Likewise.
* sysdeps/sparc/sparc64/multiarch/rtld-memmove.c: Likewise.
diff --git a/ChangeLog b/ChangeLog
index 281a013..d922a3f 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,4 +1,26 @@
2017-10-29 Jose E. Marchesi <jose.marchesi@oracle.com>
+ Adhemerval Zanella <adhemerval.zanella@linaro.org>
+
+ * sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
+ (sysdeps_routines): Add memcpy-memmove-niagara7 and memmove-ultra1.
+ * sysdeps/sparc/sparc64/multiarch/Makefile (sysdeps_routines):
+ Likewise.
+ * sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-memmove-niagara7.S:
+ New file.
+ * sysdeps/sparc/sparc32/sparcv9/multiarch/memmove-ultra1.S: Likewise.
+ * sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-memmove.c: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/ifunc-impl-list.c
+ (__libc_ifunc_impl_list): Add __memcpy_niagara7, __mempcpy_niagara7,
+ and __memmove_niagara7.
+ * sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h (IFUNC_SELECTOR):
+ Add niagara7 option.
+ * sysdeps/sparc/sparc64/multiarch/ifunc-memmove.c: New file.
+ * sysdeps/sparc/sparc64/multiarch/ifunc-memmove.h: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/memcpy-memmove-niagara7.S: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/memmove-ultra1.S: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/rtld-memmove.c: Likewise.
+
+2017-10-29 Jose E. Marchesi <jose.marchesi@oracle.com>
* sysdeps/sparc/sparc32/sparcv9/memmove.S: New file.
* sysdeps/sparc/sparc32/sparcv9/rtld-memmove.c: Likewise.
diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile b/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
index e12636b..869f063 100644
--- a/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
+++ b/sysdeps/sparc/sparc32/sparcv9/multiarch/Makefile
@@ -9,5 +9,6 @@ endif
ifeq ($(subdir),string)
sysdep_routines += memcpy-ultra3 memcpy-niagara1 memcpy-niagara2 \
memset-niagara1 memcpy-niagara4 memset-niagara4 \
- memcpy-ultra1 memset-ultra1
+ memcpy-ultra1 memset-ultra1 memcpy-memmove-niagara7 \
+ memmove-ultra1
endif
diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-memmove-niagara7.S b/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-memmove-niagara7.S
new file mode 100644
index 0000000..16da150
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/multiarch/memcpy-memmove-niagara7.S
@@ -0,0 +1,2 @@
+#define XCC icc
+#include <sparc64/multiarch/memcpy-memmove-niagara7.S>
diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/memmove-ultra1.S b/sysdeps/sparc/sparc32/sparcv9/multiarch/memmove-ultra1.S
new file mode 100644
index 0000000..35ba76b
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/multiarch/memmove-ultra1.S
@@ -0,0 +1,4 @@
+#undef libc_hidden_builtin_def
+#define libc_hidden_builtin_def(name)
+#define memmove __memmove_ultra1
+#include <sysdeps/sparc/sparc32/sparcv9/memmove.S>
diff --git a/sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-memmove.c b/sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-memmove.c
new file mode 100644
index 0000000..2c88061
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/multiarch/rtld-memmove.c
@@ -0,0 +1 @@
+#include <sparc64/multiarch/rtld-memmove.c>
diff --git a/sysdeps/sparc/sparc64/multiarch/Makefile b/sysdeps/sparc/sparc64/multiarch/Makefile
index ba8ede1..69292ca 100644
--- a/sysdeps/sparc/sparc64/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/multiarch/Makefile
@@ -9,7 +9,8 @@ endif
ifeq ($(subdir),string)
sysdep_routines += memcpy-ultra3 memcpy-niagara1 memcpy-niagara2 \
memset-niagara1 memcpy-niagara4 memset-niagara4 \
- memcpy-ultra1 memset-ultra1
+ memcpy-ultra1 memset-ultra1 memcpy-memmove-niagara7 \
+ memmove-ultra1
endif
ifeq ($(subdir),stdlib)
diff --git a/sysdeps/sparc/sparc64/multiarch/ifunc-impl-list.c b/sysdeps/sparc/sparc64/multiarch/ifunc-impl-list.c
index a97bc45..a803392 100644
--- a/sysdeps/sparc/sparc64/multiarch/ifunc-impl-list.c
+++ b/sysdeps/sparc/sparc64/multiarch/ifunc-impl-list.c
@@ -36,6 +36,8 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
hwcap = GLRO(dl_hwcap);
IFUNC_IMPL (i, name, memcpy,
+ IFUNC_IMPL_ADD (array, i, memcpy, hwcap & HWCAP_SPARC_ADP,
+ __memcpy_niagara7)
IFUNC_IMPL_ADD (array, i, memcpy, hwcap & HWCAP_SPARC_CRYPTO,
__memcpy_niagara4)
IFUNC_IMPL_ADD (array, i, memcpy, hwcap & HWCAP_SPARC_N2,
@@ -47,6 +49,8 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
IFUNC_IMPL_ADD (array, i, memcpy, 1, __memcpy_ultra1));
IFUNC_IMPL (i, name, mempcpy,
+ IFUNC_IMPL_ADD (array, i, mempcpy, hwcap & HWCAP_SPARC_ADP,
+ __mempcpy_niagara7)
IFUNC_IMPL_ADD (array, i, mempcpy, hwcap & HWCAP_SPARC_CRYPTO,
__mempcpy_niagara4)
IFUNC_IMPL_ADD (array, i, mempcpy, hwcap & HWCAP_SPARC_N2,
@@ -71,5 +75,10 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
__memset_niagara1)
IFUNC_IMPL_ADD (array, i, memset, 1, __memset_ultra1));
+ IFUNC_IMPL (i, name, memmove,
+ IFUNC_IMPL_ADD (array, i, memmove, hwcap & HWCAP_SPARC_ADP,
+ __memmove_niagara7)
+ IFUNC_IMPL_ADD (array, i, memmove, 1, __memmove_ultra1));
+
return i;
}
diff --git a/sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h b/sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h
index 46f3795..dbdad2d 100644
--- a/sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h
+++ b/sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h
@@ -19,6 +19,7 @@
#include <ifunc-init.h>
+extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara7) attribute_hidden;
extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara4) attribute_hidden;
extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara2) attribute_hidden;
extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara1) attribute_hidden;
@@ -28,6 +29,8 @@ extern __typeof (REDIRECT_NAME) OPTIMIZE (ultra1) attribute_hidden;
static inline void *
IFUNC_SELECTOR (int hwcap)
{
+ if (hwcap & HWCAP_SPARC_ADP)
+ return OPTIMIZE (niagara7);
if (hwcap & HWCAP_SPARC_CRYPTO)
return OPTIMIZE (niagara4);
if (hwcap & HWCAP_SPARC_N2)
diff --git a/sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h b/sysdeps/sparc/sparc64/multiarch/ifunc-memmove.h
similarity index 63%
copy from sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h
copy to sysdeps/sparc/sparc64/multiarch/ifunc-memmove.h
index 46f3795..35ca614 100644
--- a/sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h
+++ b/sysdeps/sparc/sparc64/multiarch/ifunc-memmove.h
@@ -1,4 +1,4 @@
-/* Common definition for memcpy and mempcpy implementation.
+/* Common definition for memmove implementation.
All versions must be listed in ifunc-impl-list.c.
Copyright (C) 2017 Free Software Foundation, Inc.
This file is part of the GNU C Library.
@@ -19,22 +19,13 @@
#include <ifunc-init.h>
-extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara4) attribute_hidden;
-extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara2) attribute_hidden;
-extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara1) attribute_hidden;
-extern __typeof (REDIRECT_NAME) OPTIMIZE (ultra3) attribute_hidden;
+extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara7) attribute_hidden;
extern __typeof (REDIRECT_NAME) OPTIMIZE (ultra1) attribute_hidden;
static inline void *
IFUNC_SELECTOR (int hwcap)
{
- if (hwcap & HWCAP_SPARC_CRYPTO)
- return OPTIMIZE (niagara4);
- if (hwcap & HWCAP_SPARC_N2)
- return OPTIMIZE (niagara2);
- if (hwcap & HWCAP_SPARC_BLKINIT)
- return OPTIMIZE (niagara1);
- if (hwcap & HWCAP_SPARC_ULTRA3)
- return OPTIMIZE (ultra3);
+ if (hwcap & HWCAP_SPARC_ADP)
+ return OPTIMIZE (niagara7);
return OPTIMIZE (ultra1);
}
diff --git a/sysdeps/sparc/sparc64/multiarch/memcpy-memmove-niagara7.S b/sysdeps/sparc/sparc64/multiarch/memcpy-memmove-niagara7.S
new file mode 100644
index 0000000..8c31e93
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/memcpy-memmove-niagara7.S
@@ -0,0 +1,980 @@
+/* Copy SIZE bytes from SRC to DEST. For SUN4V M7.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <sysdep.h>
+
+#ifndef XCC
+# define XCC xcc
+#endif
+ .register %g2,#scratch
+ .register %g3,#scratch
+ .register %g6,#scratch
+
+#define FPRS_FEF 0x04
+
+/*
+ * ASI_STBI_P marks the cache line as "least recently used"
+ * which means if many threads are active, it has a high chance
+ * of being pushed out of the cache between the first initializing
+ * store and the final stores.
+ * Thus, in this algorithm we use ASI_STBIMRU_P which marks the
+ * cache line as "most recently used" for all but the last cache
+ * line.
+ */
+
+#define ASI_BLK_INIT_QUAD_LDD_P 0xe2
+#define ASI_ST_BLK_INIT_MRU_P 0xf2
+
+#define ASI_STBI_P ASI_BLK_INIT_QUAD_LDD_P
+#define ASI_STBIMRU_P ASI_ST_BLK_INIT_MRU_P
+
+#define BLOCK_SIZE 64 /* L2 data cache line size */
+#define SHORTCOPY 3
+#define SHORTCHECK 14
+#define SHORT_LONG 64 /* max copy for short longword-aligned case */
+ /* must be at least 64 */
+#define SMALL_MAX 255 /* max small copy for word/long aligned */
+#define SMALL_UMAX 128 /* max small copy for unaligned case */
+#define MED_WMAX 1023 /* max copy for medium word-aligned case */
+#define MED_MAX 511 /* max copy for medium longword-aligned case */
+#define ST_CHUNK 20 /* ST_CHUNK - block of values for BIS Store */
+/* on T4, prefetch 20 is a strong read prefetch to L1 and L2 data cache
+ * prefetch 20 can cause inst pipeline to delay if data is in memory
+ * prefetch 21 is a strong read prefetch to L2 data cache, not L1 data cache */
+#define ALIGN_PRE 20 /* distance for aligned prefetch loop */
+
+#define EX_ST(x) x
+#define EX_RETVAL(x) x
+#define STORE_ASI(src,addr) stxa src, [addr] ASI_STBIMRU_P
+#define STORE_INIT(src,addr) stxa src, [addr] ASI_STBI_P
+
+#if IS_IN (libc)
+
+ .text
+
+ENTRY(__memmove_niagara7)
+ /* %o0=dst, %o1=src, %o2=len */
+ cmp %o1, %o0 /* if from address is >= to use forward copy */
+ bgeu,pn %XCC, .Lforcpy /* else use backward if ... */
+ sub %o0, %o1, %o4 /* get difference of two addresses */
+ cmp %o2, %o4 /* compare size and difference of addresses */
+ bleu,pn %XCC, .Lforcpy /* if size is bigger, do overlapped copy */
+ add %o1, %o2, %o5 /* get to end of source space */
+
+/* an overlapped copy that must be done "backwards" */
+.Lchksize:
+ cmp %o2, 8 /* less than 8 byte do byte copy */
+ blu,pn %XCC, 2f /* else continue */
+
+/* Now size is bigger than 8 */
+.Ldbalign:
+ add %o0, %o2, %g1 /* get to end of dest space */
+ andcc %g1, 7, %o3 /* %o3 has cnt til dst 8 byte align */
+ bz,a,pn %XCC, .Ldbbck /* skip if dst is 8 byte aligned */
+ andn %o2, 7, %o3 /* force %o3 cnt to multiple of 8 */
+ sub %o2, %o3, %o2 /* update o2 with new count */
+
+1: dec %o5 /* decrement source */
+ ldub [%o5], %g1 /* load one byte */
+ deccc %o3 /* decrement count */
+ bgu,pt %XCC, 1b /* if not done keep copying */
+ stb %g1, [%o5+%o4] /* store one byte into dest */
+ andncc %o2, 7, %o3 /* force %o3 cnt to multiple of 8 */
+ bz,pn %XCC, 2f /* if size < 8, move to byte copy */
+
+/* Now Destination is 8 byte aligned */
+.Ldbbck:
+ andcc %o5, 7, %o0 /* %o0 has src offset */
+ bz,a,pn %XCC, .Ldbcopybc /* if src is aligned do fast memmove */
+ sub %o2, %o3, %o2 /* Residue bytes in %o2 */
+
+.Lcpy_dbwdbc: /* alignment of src is needed */
+ sub %o2, 8, %o2 /* set size one loop ahead */
+ sll %o0, 3, %g1 /* %g1 is left shift */
+ mov 64, %g5 /* init %g5 to be 64 */
+ sub %g5, %g1, %g5 /* %g5 rightshift = (64 - leftshift) */
+ sub %o5, %o0, %o5 /* align the src at 8 bytes. */
+ add %o4, %o0, %o4 /* increase diff between src & dst */
+ ldx [%o5], %o1 /* load first 8 bytes */
+ srlx %o1, %g5, %o1
+1: sub %o5, 8, %o5 /* subtract 8 from src */
+ ldx [%o5], %o0 /* load 8 byte */
+ sllx %o0, %g1, %o3 /* shift loaded val left to tmp reg */
+ or %o1, %o3, %o3 /* align data */
+ stx %o3, [%o5+%o4] /* store 8 byte */
+ subcc %o2, 8, %o2 /* subtract 8 byte from size */
+ bg,pt %XCC, 1b /* if size > 0 continue */
+ srlx %o0, %g5, %o1 /* move extra byte for the next use */
+
+ srl %g1, 3, %o0 /* restore %o0 value for alignment */
+ add %o5, %o0, %o5 /* restore src alignment */
+ sub %o4, %o0, %o4 /* restore diff between src & dest */
+
+ ba 2f /* branch to the trailing byte copy */
+ add %o2, 8, %o2 /* restore size value */
+
+.Ldbcopybc: /* alignment of src is not needed */
+1: sub %o5, 8, %o5 /* subtract from src */
+ ldx [%o5], %g1 /* load 8 bytes */
+ subcc %o3, 8, %o3 /* subtract from size */
+ bgu,pt %XCC, 1b /* if size is bigger 0 continue */
+ stx %g1, [%o5+%o4] /* store 8 bytes to destination */
+
+ ba 2f
+ nop
+
+.Lbcbyte:
+1: ldub [%o5], %g1 /* load one byte */
+ stb %g1, [%o5+%o4] /* store one byte */
+2: deccc %o2 /* decrement size */
+ bgeu,a,pt %XCC, 1b /* if size is >= 0 continue */
+ dec %o5 /* decrement from address */
+
+.Lexitbc: /* exit from backward copy */
+ retl
+ add %o5, %o4, %o0 /* restore dest addr */
+
+
+/* Check to see if memmove is large aligned copy
+ * If so, use special version of copy that avoids
+ * use of block store init. */
+.Lforcpy:
+ cmp %o2, SMALL_MAX /* check for not small case */
+ blt,pn %XCC, .Lmv_short /* merge with memcpy */
+ mov %o0, %g1 /* save %o0 */
+ neg %o0, %o5
+ andcc %o5, 7, %o5 /* bytes till DST 8 byte aligned */
+ brz,pt %o5, .Lmv_dst_aligned_on_8
+
+/* %o5 has the bytes to be written in partial store. */
+ sub %o2, %o5, %o2
+ sub %o1, %o0, %o1 /* %o1 gets the difference */
+7: /* dst aligning loop */
+ ldub [%o1+%o0], %o4 /* load one byte */
+ subcc %o5, 1, %o5
+ stb %o4, [%o0]
+ bgu,pt %XCC, 7b
+ add %o0, 1, %o0 /* advance dst */
+ add %o1, %o0, %o1 /* restore %o1 */
+.Lmv_dst_aligned_on_8:
+ andcc %o1, 7, %o5
+ brnz,pn %o5, .Lsrc_dst_unaligned_on_8
+ prefetch [%o1 + (1 * BLOCK_SIZE)], 20
+
+.Lmv_src_dst_aligned_on_8:
+/* check if we are copying MED_MAX or more bytes */
+ cmp %o2, MED_MAX /* limit to store buffer size */
+ bleu,pt %XCC, .Lmedlong
+ prefetch [%o1 + (2 * BLOCK_SIZE)], 20
+
+/* The mv_align loop below mimics the memcpy code for large aligned copies,
+ * but does not use the ASI_STBI_P (block initializing store) performance
+ * optimization. This is used when memcpy is incorrectly invoked with
+ * overlapping buffers. */
+
+.Lmv_large_align8_copy: /* Src and dst share 8 byte align */
+ /* align dst to 64 byte boundary */
+ andcc %o0, 0x3f, %o3 /* check for dst 64 byte aligned */
+ brz,pn %o3, .Lmv_aligned_on_64
+ sub %o3, 64, %o3 /* %o3 has negative bytes to move */
+ add %o2, %o3, %o2 /* adjust remaining count */
+.Lmv_align_to_64:
+ ldx [%o1], %o4
+ add %o1, 8, %o1 /* increment src ptr */
+ addcc %o3, 8, %o3
+ stx %o4, [%o0]
+ brnz,pt %o3, .Lmv_align_to_64
+ add %o0, 8, %o0 /* increment dst ptr */
+
+.Lmv_aligned_on_64:
+ andn %o2, 0x3f, %o5 /* %o5 is multiple of block size */
+ and %o2, 0x3f, %o2 /* residue bytes in %o2 */
+.Lmv_align_loop:
+ ldx [%o1],%o4
+ stx %o4,[%o0]
+ prefetch [%o0 + (10 * BLOCK_SIZE)], 22
+ prefetch [%o1 + (10 * BLOCK_SIZE)], 21
+ subcc %o5, 64, %o5
+ ldx [%o1+8],%o4
+ stx %o4,[%o0+8]
+ ldx [%o1+16],%o4
+ stx %o4,[%o0+16]
+ ldx [%o1+24],%o4
+ stx %o4,[%o0+24]
+ ldx [%o1+32],%o4
+ stx %o4,[%o0+32]
+ ldx [%o1+40],%o4
+ stx %o4,[%o0+40]
+ ldx [%o1+48],%o4
+ add %o1, 64, %o1
+ stx %o4,[%o0+48]
+ add %o0, 64, %o0
+ ldx [%o1-8],%o4
+ bgt,pt %XCC, .Lmv_align_loop
+ stx %o4,[%o0-8]
+
+ ba .Lmedlong
+ nop
+END(__memmove_niagara7)
+
+ENTRY(__mempcpy_niagara7)
+ /* %o0=dst, %o1=src, %o2=len */
+ ba,pt %icc, 101f
+ add %o0, %o2, %g1 /* save dst + len */
+END(__mempcpy_niagara7)
+
+ .align 32
+ENTRY(__memcpy_niagara7)
+100: /* %o0=dst, %o1=src, %o2=len */
+ mov %o0, %g1 /* save %o0 */
+101:
+#ifndef __arch64__
+ srl %o2, 0, %o2
+#endif
+ cmp %o2, SMALL_MAX /* check for not small case */
+ bgeu,pn %XCC, .Lmedium /* go to larger cases */
+.Lmv_short:
+ cmp %o2, SHORTCOPY /* check for really short case */
+ ble,pn %XCC, .Lsmallfin
+ or %o0, %o1, %o4 /* prepare alignment check */
+ andcc %o4, 0x3, %o5 /* test for word alignment */
+ bnz,pn %XCC, .Lsmallunalign /* branch to non-word aligned case */
+ nop
+ subcc %o2, 7, %o2 /* adjust count */
+ ble,pn %XCC, .Lsmallwordx
+ andcc %o4, 0x7, %o5 /* test for long alignment */
+/* 8 or more bytes, src and dest start on word boundary
+ * %o4 contains or %o0, %o1 */
+.Lsmalllong:
+ bnz,pn %XCC, .Lsmallwords /* branch to word aligned case */
+ cmp %o2, SHORT_LONG-7
+ bge,a %XCC, .Lmedl64 /* if we branch */
+ sub %o2,56,%o2 /* adjust %o2 to -63 off count */
+
+/* slightly unroll the small_long_loop to improve very short copies */
+ cmp %o2, 32-7
+ blt,a,pn %XCC, .Lsmall_long_l
+ sub %o1, %o0, %o1 /* %o1 gets the difference */
+
+ ldx [%o1], %o5
+ ldx [%o1+8], %o4
+ ldx [%o1+16], %o3
+
+ subcc %o2, 24, %o2
+ sub %o1, %o0, %o1 /* %o1 gets the difference */
+
+ stx %o5, [%o0] /* write word */
+ stx %o4, [%o0+8] /* write word */
+ stx %o3, [%o0+16] /* write word */
+
+ add %o0, 24, %o0
+
+/* end loop unroll */
+
+.Lsmall_long_l:
+ ldx [%o1+%o0], %o3
+ subcc %o2, 8, %o2
+ add %o0, 8, %o0
+ bgu,pn %XCC, .Lsmall_long_l /* loop until done */
+ stx %o3, [%o0-8] /* write word */
+ addcc %o2, 7, %o2 /* restore %o2 to correct count */
+ bnz,pn %XCC, .Lsmall_long_x /* check for completion */
+ add %o1, %o0, %o1 /* restore %o1 */
+ retl
+ mov EX_RETVAL(%g1), %o0 /* restore %o0 */
+.Lsmall_long_x:
+ cmp %o2, 4 /* check for 4 or more bytes left */
+ blt,pn %XCC, .Lsmallleft3 /* if not, go to finish up */
+ nop
+ lduw [%o1], %o3
+ add %o1, 4, %o1
+ subcc %o2, 4, %o2
+ stw %o3, [%o0]
+ bnz,pn %XCC, .Lsmallleft3
+ add %o0, 4, %o0
+ retl
+ mov EX_RETVAL(%g1), %o0 /* restore %o0 */
+
+ .align 32
+/* src and dest start on word boundary; 7 or fewer bytes */
+.Lsmallwordx:
+ lduw [%o1], %o3 /* read word */
+ addcc %o2, 3, %o2 /* restore count */
+ bz,pt %XCC, .Lsmallexit
+ stw %o3, [%o0] /* write word */
+ deccc %o2 /* reduce count for cc test */
+ ldub [%o1+4], %o3 /* load one byte */
+ bz,pt %XCC, .Lsmallexit
+ stb %o3, [%o0+4] /* store one byte */
+ ldub [%o1+5], %o3 /* load second byte */
+ deccc %o2
+ bz,pt %XCC, .Lsmallexit
+ stb %o3, [%o0+5] /* store second byte */
+ ldub [%o1+6], %o3 /* load third byte */
+ stb %o3, [%o0+6] /* store third byte */
+.Lsmallexit:
+ retl
+ mov EX_RETVAL(%g1), %o0 /* restore %o0 */
+
+ .align 32
+.Lsmallunalign:
+ cmp %o2, SHORTCHECK
+ ble,pn %XCC, .Lsmallrest
+ cmp %o2, SMALL_UMAX
+ bge,pt %XCC, .Lmedium_join
+ andcc %o1, 0x3, %o5 /* is src word aligned */
+ bz,pn %XCC, .Laldst
+ cmp %o5, 2 /* is src half-word aligned */
+ be,pt %XCC, .Ls2algn
+ cmp %o5, 3 /* src is byte aligned */
+.Ls1algn:
+ ldub [%o1], %o3 /* move 1 or 3 bytes to align it */
+ inc 1, %o1
+ stb %o3, [%o0] /* move a byte to align src */
+ inc 1, %o0
+ bne,pt %XCC, .Ls2algn
+ dec %o2
+ b .Lald /* now go align dest */
+ andcc %o0, 0x3, %o5
+
+.Ls2algn:
+ lduh [%o1], %o3 /* know src is 2 byte aligned */
+ inc 2, %o1
+ srl %o3, 8, %o4
+ stb %o4, [%o0] /* have to do bytes, */
+ stb %o3, [%o0 + 1] /* do not know dst alignment */
+ inc 2, %o0
+ dec 2, %o2
+
+.Laldst:
+ andcc %o0, 0x3, %o5 /* align the destination address */
+.Lald:
+ bz,pn %XCC, .Lw4cp
+ cmp %o5, 2
+ be,pn %XCC, .Lw2cp
+ cmp %o5, 3
+.Lw3cp: lduw [%o1], %o4
+ inc 4, %o1
+ srl %o4, 24, %o5
+ stb %o5, [%o0]
+ bne,pt %XCC, .Lw1cp
+ inc %o0
+ dec 1, %o2
+ andn %o2, 3, %o3 /* %o3 is aligned word count */
+ dec 4, %o3 /* avoid reading beyond tail of src */
+ sub %o1, %o0, %o1 /* %o1 gets the difference */
+
+1: sll %o4, 8, %g5 /* save residual bytes */
+ lduw [%o1+%o0], %o4
+ deccc 4, %o3
+ srl %o4, 24, %o5 /* merge with residual */
+ or %o5, %g5, %g5
+ st %g5, [%o0]
+ bnz,pt %XCC, 1b
+ inc 4, %o0
+ sub %o1, 3, %o1 /* used one byte of last word read */
+ and %o2, 3, %o2
+ b 7f
+ inc 4, %o2
+
+.Lw1cp: srl %o4, 8, %o5
+ sth %o5, [%o0]
+ inc 2, %o0
+ dec 3, %o2
+ andn %o2, 3, %o3 /* %o3 is aligned word count */
+ dec 4, %o3 /* avoid reading beyond tail of src */
+ sub %o1, %o0, %o1 /* %o1 gets the difference */
+
+2: sll %o4, 24, %g5 /* save residual bytes */
+ lduw [%o1+%o0], %o4
+ deccc 4, %o3
+ srl %o4, 8, %o5 /* merge with residual */
+ or %o5, %g5, %g5
+ st %g5, [%o0]
+ bnz,pt %XCC, 2b
+ inc 4, %o0
+ sub %o1, 1, %o1 /* used 3 bytes of last word read */
+ and %o2, 3, %o2
+ b 7f
+ inc 4, %o2
+
+.Lw2cp: lduw [%o1], %o4
+ inc 4, %o1
+ srl %o4, 16, %o5
+ sth %o5, [%o0]
+ inc 2, %o0
+ dec 2, %o2
+ andn %o2, 3, %o3 /* %o3 is aligned word count */
+ dec 4, %o3 /* avoid reading beyond tail of src */
+ sub %o1, %o0, %o1 /* %o1 gets the difference */
+
+3: sll %o4, 16, %g5 /* save residual bytes */
+ lduw [%o1+%o0], %o4
+ deccc 4, %o3
+ srl %o4, 16, %o5 /* merge with residual */
+ or %o5, %g5, %g5
+ st %g5, [%o0]
+ bnz,pt %XCC, 3b
+ inc 4, %o0
+ sub %o1, 2, %o1 /* used two bytes of last word read */
+ and %o2, 3, %o2
+ b 7f
+ inc 4, %o2
+
+.Lw4cp: andn %o2, 3, %o3 /* %o3 is aligned word count */
+ sub %o1, %o0, %o1 /* %o1 gets the difference */
+
+1: lduw [%o1+%o0], %o4 /* read from address */
+ deccc 4, %o3 /* decrement count */
+ st %o4, [%o0] /* write at destination address */
+ bgu,pt %XCC, 1b
+ inc 4, %o0 /* increment to address */
+ and %o2, 3, %o2 /* number of leftover bytes, if any */
+
+ /* simple finish up byte copy, works with any alignment */
+7:
+ add %o1, %o0, %o1 /* restore %o1 */
+.Lsmallrest:
+ tst %o2
+ bz,pt %XCC, .Lsmallx
+ cmp %o2, 4
+ blt,pn %XCC, .Lsmallleft3
+ nop
+ sub %o2, 3, %o2
+.Lsmallnotalign4:
+ ldub [%o1], %o3 /* read byte */
+ subcc %o2, 4, %o2 /* reduce count by 4 */
+ stb %o3, [%o0] /* write byte */
+ ldub [%o1+1], %o3 /* repeat for total of 4 bytes */
+ add %o1, 4, %o1 /* advance SRC by 4 */
+ stb %o3, [%o0+1]
+ ldub [%o1-2], %o3
+ add %o0, 4, %o0 /* advance DST by 4 */
+ stb %o3, [%o0-2]
+ ldub [%o1-1], %o3
+ bgu,pt %XCC, .Lsmallnotalign4 /* loop til 3 or fewer bytes remain */
+ stb %o3, [%o0-1]
+ addcc %o2, 3, %o2 /* restore count */
+ bz,pt %XCC, .Lsmallx
+.Lsmallleft3: /* 1, 2, or 3 bytes remain */
+ subcc %o2, 1, %o2
+ ldub [%o1], %o3 /* load one byte */
+ bz,pt %XCC, .Lsmallx
+ stb %o3, [%o0] /* store one byte */
+ ldub [%o1+1], %o3 /* load second byte */
+ subcc %o2, 1, %o2
+ bz,pt %XCC, .Lsmallx
+ stb %o3, [%o0+1] /* store second byte */
+ ldub [%o1+2], %o3 /* load third byte */
+ stb %o3, [%o0+2] /* store third byte */
+.Lsmallx:
+ retl
+ mov EX_RETVAL(%g1), %o0 /* restore %o0 */
+
+.Lsmallfin:
+ tst %o2
+ bnz,pn %XCC, .Lsmallleft3
+ nop
+ retl
+ mov EX_RETVAL(%g1), %o0 /* restore %o0 */
+
+ .align 16
+.Lsmallwords:
+ lduw [%o1], %o3 /* read word */
+ subcc %o2, 8, %o2 /* update count */
+ stw %o3, [%o0] /* write word */
+ add %o1, 8, %o1 /* update SRC */
+ lduw [%o1-4], %o3 /* read word */
+ add %o0, 8, %o0 /* update DST */
+ bgu,pt %XCC, .Lsmallwords /* loop until done */
+ stw %o3, [%o0-4] /* write word */
+ addcc %o2, 7, %o2 /* restore count */
+ bz,pt %XCC, .Lsmallexit /* check for completion */
+ cmp %o2, 4 /* check for 4 or more bytes left */
+ blt,pt %XCC, .Lsmallleft3 /* if not, go to finish up */
+ nop
+ lduw [%o1], %o3
+ add %o1, 4, %o1
+ subcc %o2, 4, %o2
+ add %o0, 4, %o0
+ bnz,pn %XCC, .Lsmallleft3
+ stw %o3, [%o0-4]
+ retl
+ mov EX_RETVAL(%g1), %o0 /* restore %o0 */
+
+ .align 16
+.Lmedium:
+.Lmedium_join:
+ neg %o0, %o5
+ andcc %o5, 7, %o5 /* bytes till DST 8 byte aligned */
+ brz,pt %o5, .Ldst_aligned_on_8
+
+ /* %o5 has the bytes to be written in partial store. */
+ sub %o2, %o5, %o2
+ sub %o1, %o0, %o1 /* %o1 gets the difference */
+7: /* dst aligning loop */
+ ldub [%o1+%o0], %o4 /* load one byte */
+ subcc %o5, 1, %o5
+ stb %o4, [%o0]
+ bgu,pt %XCC, 7b
+ add %o0, 1, %o0 /* advance dst */
+ add %o1, %o0, %o1 /* restore %o1 */
+.Ldst_aligned_on_8:
+ andcc %o1, 7, %o5
+ brnz,pt %o5, .Lsrc_dst_unaligned_on_8
+ nop
+
+.Lsrc_dst_aligned_on_8:
+ /* check if we are copying MED_MAX or more bytes */
+ cmp %o2, MED_MAX /* limit to store buffer size */
+ bgu,pn %XCC, .Llarge_align8_copy
+ nop
+/*
+ * Special case for handling when src and dest are both long word aligned
+ * and total data to move is less than MED_MAX bytes
+ */
+.Lmedlong:
+ subcc %o2, 63, %o2 /* adjust length to allow cc test */
+ ble,pn %XCC, .Lmedl63 /* skip big loop if < 64 bytes */
+ nop
+.Lmedl64:
+ ldx [%o1], %o4 /* load */
+ subcc %o2, 64, %o2 /* decrement length count */
+ stx %o4, [%o0] /* and store */
+ ldx [%o1+8], %o3 /* a block of 64 bytes */
+ stx %o3, [%o0+8]
+ ldx [%o1+16], %o4
+ stx %o4, [%o0+16]
+ ldx [%o1+24], %o3
+ stx %o3, [%o0+24]
+ ldx [%o1+32], %o4 /* load */
+ stx %o4, [%o0+32] /* and store */
+ ldx [%o1+40], %o3 /* a block of 64 bytes */
+ add %o1, 64, %o1 /* increase src ptr by 64 */
+ stx %o3, [%o0+40]
+ ldx [%o1-16], %o4
+ add %o0, 64, %o0 /* increase dst ptr by 64 */
+ stx %o4, [%o0-16]
+ ldx [%o1-8], %o3
+ bgu,pt %XCC, .Lmedl64 /* repeat if at least 64 bytes left */
+ stx %o3, [%o0-8]
+.Lmedl63:
+ addcc %o2, 32, %o2 /* adjust remaining count */
+ ble,pt %XCC, .Lmedl31 /* to skip if 31 or fewer bytes left */
+ nop
+ ldx [%o1], %o4 /* load */
+ sub %o2, 32, %o2 /* decrement length count */
+ stx %o4, [%o0] /* and store */
+ ldx [%o1+8], %o3 /* a block of 32 bytes */
+ add %o1, 32, %o1 /* increase src ptr by 32 */
+ stx %o3, [%o0+8]
+ ldx [%o1-16], %o4
+ add %o0, 32, %o0 /* increase dst ptr by 32 */
+ stx %o4, [%o0-16]
+ ldx [%o1-8], %o3
+ stx %o3, [%o0-8]
+.Lmedl31:
+ addcc %o2, 16, %o2 /* adjust remaining count */
+ ble,pt %XCC, .Lmedl15 /* skip if 15 or fewer bytes left */
+ nop
+ ldx [%o1], %o4 /* load and store 16 bytes */
+ add %o1, 16, %o1 /* increase src ptr by 16 */
+ stx %o4, [%o0]
+ sub %o2, 16, %o2 /* decrease count by 16 */
+ ldx [%o1-8], %o3
+ add %o0, 16, %o0 /* increase dst ptr by 16 */
+ stx %o3, [%o0-8]
+.Lmedl15:
+ addcc %o2, 15, %o2 /* restore count */
+ bz,pt %XCC, .Lsmallexit /* exit if finished */
+ cmp %o2, 8
+ blt,pt %XCC, .Lmedw7 /* skip if 7 or fewer bytes left */
+ tst %o2
+ ldx [%o1], %o4 /* load 8 bytes */
+ add %o1, 8, %o1 /* increase src ptr by 8 */
+ add %o0, 8, %o0 /* increase dst ptr by 8 */
+ subcc %o2, 8, %o2 /* decrease count by 8 */
+ bnz,pn %XCC, .Lmedw7
+ stx %o4, [%o0-8] /* and store 8 bytes */
+ retl
+ mov EX_RETVAL(%g1), %o0 /* restore %o0 */
+
+ .align 16
+.Lsrc_dst_unaligned_on_8:
+ /* DST is 8-byte aligned, src is not */
+ andcc %o1, 0x3, %o5 /* test word alignment */
+ bnz,pt %XCC, .Lunalignsetup /* branch if not word aligned */
+ nop
+
+/*
+ * Handle all cases where src and dest are aligned on word
+ * boundaries. Use unrolled loops for better performance.
+ * This option wins over standard large data move when
+ * source and destination is in cache for medium
+ * to short data moves.
+ */
+ cmp %o2, MED_WMAX /* limit to store buffer size */
+ bge,pt %XCC, .Lunalignrejoin /* otherwise rejoin main loop */
+ nop
+
+ subcc %o2, 31, %o2 /* adjust length to allow cc test */
+ /* for end of loop */
+ ble,pt %XCC, .Lmedw31 /* skip big loop if less than 16 */
+.Lmedw32:
+ ld [%o1], %o4 /* move a block of 32 bytes */
+ sllx %o4, 32, %o5
+ ld [%o1+4], %o4
+ or %o4, %o5, %o5
+ stx %o5, [%o0]
+ subcc %o2, 32, %o2 /* decrement length count */
+ ld [%o1+8], %o4
+ sllx %o4, 32, %o5
+ ld [%o1+12], %o4
+ or %o4, %o5, %o5
+ stx %o5, [%o0+8]
+ add %o1, 32, %o1 /* increase src ptr by 32 */
+ ld [%o1-16], %o4
+ sllx %o4, 32, %o5
+ ld [%o1-12], %o4
+ or %o4, %o5, %o5
+ stx %o5, [%o0+16]
+ add %o0, 32, %o0 /* increase dst ptr by 32 */
+ ld [%o1-8], %o4
+ sllx %o4, 32, %o5
+ ld [%o1-4], %o4
+ or %o4, %o5, %o5
+ bgu,pt %XCC, .Lmedw32 /* repeat if at least 32 bytes left */
+ stx %o5, [%o0-8]
+.Lmedw31:
+ addcc %o2, 31, %o2 /* restore count */
+ bz,pt %XCC, .Lsmallexit /* exit if finished */
+ cmp %o2, 16
+ blt,pt %XCC, .Lmedw15
+ nop
+ ld [%o1], %o4 /* move a block of 16 bytes */
+ sllx %o4, 32, %o5
+ subcc %o2, 16, %o2 /* decrement length count */
+ ld [%o1+4], %o4
+ or %o4, %o5, %o5
+ stx %o5, [%o0]
+ add %o1, 16, %o1 /* increase src ptr by 16 */
+ ld [%o1-8], %o4
+ add %o0, 16, %o0 /* increase dst ptr by 16 */
+ sllx %o4, 32, %o5
+ ld [%o1-4], %o4
+ or %o4, %o5, %o5
+ stx %o5, [%o0-8]
+.Lmedw15:
+ bz,pt %XCC, .Lsmallexit /* exit if finished */
+ cmp %o2, 8
+ blt,pn %XCC, .Lmedw7 /* skip if 7 or fewer bytes left */
+ tst %o2
+ ld [%o1], %o4 /* load 4 bytes */
+ subcc %o2, 8, %o2 /* decrease count by 8 */
+ stw %o4, [%o0] /* and store 4 bytes */
+ add %o1, 8, %o1 /* increase src ptr by 8 */
+ ld [%o1-4], %o3 /* load 4 bytes */
+ add %o0, 8, %o0 /* increase dst ptr by 8 */
+ stw %o3, [%o0-4] /* and store 4 bytes */
+ bz,pt %XCC, .Lsmallexit /* exit if finished */
+.Lmedw7: /* count is ge 1, less than 8 */
+ cmp %o2, 4 /* check for 4 bytes left */
+ blt,pn %XCC, .Lsmallleft3 /* skip if 3 or fewer bytes left */
+ nop
+ ld [%o1], %o4 /* load 4 bytes */
+ add %o1, 4, %o1 /* increase src ptr by 4 */
+ add %o0, 4, %o0 /* increase dst ptr by 4 */
+ subcc %o2, 4, %o2 /* decrease count by 4 */
+ bnz,pt %XCC, .Lsmallleft3
+ stw %o4, [%o0-4] /* and store 4 bytes */
+ retl
+ mov EX_RETVAL(%g1), %o0 /* restore %o0 */
+
+ .align 16
+.Llarge_align8_copy: /* Src and dst 8 byte aligned */
+ /* align dst to 64 byte boundary */
+ andcc %o0, 0x3f, %o3 /* check for dst 64 byte aligned */
+ brz,pn %o3, .Laligned_to_64
+ andcc %o0, 8, %o3 /* odd long words to move? */
+ brz,pt %o3, .Laligned_to_16
+ nop
+ ldx [%o1], %o4
+ sub %o2, 8, %o2
+ add %o1, 8, %o1 /* increment src ptr */
+ add %o0, 8, %o0 /* increment dst ptr */
+ stx %o4, [%o0-8]
+.Laligned_to_16:
+ andcc %o0, 16, %o3 /* pair of long words to move? */
+ brz,pt %o3, .Laligned_to_32
+ nop
+ ldx [%o1], %o4
+ sub %o2, 16, %o2
+ stx %o4, [%o0]
+ add %o1, 16, %o1 /* increment src ptr */
+ ldx [%o1-8], %o4
+ add %o0, 16, %o0 /* increment dst ptr */
+ stx %o4, [%o0-8]
+.Laligned_to_32:
+ andcc %o0, 32, %o3 /* four long words to move? */
+ brz,pt %o3, .Laligned_to_64
+ nop
+ ldx [%o1], %o4
+ sub %o2, 32, %o2
+ stx %o4, [%o0]
+ ldx [%o1+8], %o4
+ stx %o4, [%o0+8]
+ ldx [%o1+16], %o4
+ stx %o4, [%o0+16]
+ add %o1, 32, %o1 /* increment src ptr */
+ ldx [%o1-8], %o4
+ add %o0, 32, %o0 /* increment dst ptr */
+ stx %o4, [%o0-8]
+.Laligned_to_64:
+/* Following test is included to avoid issues where existing executables
+ * incorrectly call memcpy with overlapping src and dest instead of memmove
+ *
+ * if ( (src ge dst) and (dst+len > src)) go to overlap case
+ * if ( (src lt dst) and (src+len > dst)) go to overlap case
+ */
+ cmp %o1,%o0
+ bge,pt %XCC, 1f
+ nop
+/* src+len > dst? */
+ add %o1, %o2, %o4
+ cmp %o4, %o0
+ bgt,pt %XCC, .Lmv_aligned_on_64
+ nop
+ ba 2f
+ nop
+1:
+/* dst+len > src? */
+ add %o0, %o2, %o4
+ cmp %o4, %o1
+ bgt,pt %XCC, .Lmv_aligned_on_64
+ nop
+2:
+/* handle non-overlapped copies
+ *
+ * Using block init store (BIS) instructions to avoid fetching cache
+ * lines from memory. Use ST_CHUNK stores to first element of each cache
+ * line (similar to prefetching) to avoid overfilling STQ or miss buffers.
+ * Gives existing cache lines time to be moved out of L1/L2/L3 cache.
+ */
+ andn %o2, 0x3f, %o5 /* %o5 is multiple of block size */
+ and %o2, 0x3f, %o2 /* residue bytes in %o2 */
+
+/* We use ASI_STBIMRU_P for the first store to each cache line
+ * followed by ASI_STBI_P (mark as LRU) for the last store. That
+ * mixed approach reduces the chances the cache line is removed
+ * before we finish setting it, while minimizing the effects on
+ * other cached values during a large memcpy
+ *
+ * Intermediate stores can be normal since first BIS activates the
+ * cache line in the L2 cache.
+ *
+ * ST_CHUNK batches up initial BIS operations for several cache lines
+ * to allow multiple requests to not be blocked by overflowing the
+ * the store miss buffer. Then the matching stores for all those
+ * BIS operations are executed.
+ */
+
+.Lalign_loop:
+ cmp %o5, ST_CHUNK*64
+ blu,pt %XCC, .Lalign_short
+ mov ST_CHUNK, %o3
+ sllx %o3, 6, %g5 /* ST_CHUNK*64 */
+
+.Lalign_loop_start:
+ prefetch [%o1 + (ALIGN_PRE * BLOCK_SIZE)], 21
+ subcc %o3, 2, %o3
+ ldx [%o1], %o4
+ add %o1, 128, %o1
+ EX_ST(STORE_ASI(%o4, %o0))
+ add %o0, 64, %o0
+ ldx [%o1-64], %o4
+ EX_ST(STORE_ASI(%o4, %o0))
+ add %o0, 64, %o0
+ bgu,pt %XCC, .Lalign_loop_start
+ prefetch [%o1 + ((ALIGN_PRE-1) * BLOCK_SIZE)], 21
+
+ mov ST_CHUNK, %o3
+ sub %o1, %g5, %o1 /* reset %o1 */
+ sub %o0, %g5, %o0 /* reset %o0 */
+
+ sub %o0, 8, %o0 /* adjust %o0 for ASI alignment */
+.Lalign_loop_rest:
+ ldx [%o1+8],%o4
+ add %o0, 64, %o0
+ stx %o4, [%o0-48]
+ subcc %o3, 1, %o3
+ ldx [%o1+16],%o4
+ stx %o4, [%o0-40]
+ sub %o5, 64, %o5
+ ldx [%o1+24],%o4
+ stx %o4, [%o0-32]
+ ldx [%o1+32],%o4
+ stx %o4, [%o0-24]
+ ldx [%o1+40],%o4
+ stx %o4, [%o0-16]
+ ldx [%o1+48],%o4
+ stx %o4, [%o0-8]
+ add %o1, 64, %o1
+ ldx [%o1-8],%o4
+ bgu,pt %XCC, .Lalign_loop_rest
+ EX_ST(STORE_INIT(%o4,%o0)) /* mark cache line as LRU */
+
+ mov ST_CHUNK, %o3
+ cmp %o5, ST_CHUNK*64
+ bgu,pt %XCC, .Lalign_loop_start
+ add %o0, 8, %o0 /* restore %o0 from ASI alignment */
+
+ cmp %o5, 0
+ beq,pt %XCC, .Lalign_done
+
+/* no prefetches needed in these loops
+ * since we are within ALIGN_PRE of the end */
+.Lalign_short:
+ srl %o5, 6, %o3
+.Lalign_loop_short:
+ subcc %o3, 1, %o3
+ ldx [%o1], %o4
+ add %o1, 64, %o1
+ EX_ST(STORE_ASI(%o4, %o0))
+ bgu,pt %XCC, .Lalign_loop_short
+ add %o0, 64, %o0
+
+ sub %o1, %o5, %o1 /* reset %o1 */
+ sub %o0, %o5, %o0 /* reset %o0 */
+
+ sub %o0, 8, %o0 /* adjust %o0 for ASI alignment */
+.Lalign_short_rest:
+ ldx [%o1+8],%o4
+ add %o0, 64, %o0
+ stx %o4, [%o0-48]
+ ldx [%o1+16],%o4
+ subcc %o5, 64, %o5
+ stx %o4, [%o0-40]
+ ldx [%o1+24],%o4
+ stx %o4, [%o0-32]
+ ldx [%o1+32],%o4
+ stx %o4, [%o0-24]
+ ldx [%o1+40],%o4
+ stx %o4, [%o0-16]
+ ldx [%o1+48],%o4
+ stx %o4, [%o0-8]
+ add %o1, 64, %o1
+ ldx [%o1-8],%o4
+ bgu,pt %XCC, .Lalign_short_rest
+ EX_ST(STORE_INIT(%o4,%o0)) /* mark cache line as LRU */
+
+ add %o0, 8, %o0 /* restore %o0 from ASI alignment */
+
+.Lalign_done:
+ cmp %o2, 0
+ membar #StoreStore
+ bne,pt %XCC, .Lmedl63
+ subcc %o2, 63, %o2 /* adjust length to allow cc test */
+ retl
+ mov EX_RETVAL(%g1), %o0 /* restore %o0 */
+
+ .align 16
+ /* Dst is on 8 byte boundary; src is not; remaining cnt > SMALL_MAX */
+ /* Since block load/store and BIS are not in use for unaligned data,
+ * no need to align dst on 64 byte cache line boundary */
+.Lunalignsetup:
+.Lunalignrejoin:
+ rd %fprs, %g5 /* check for unused fp */
+ /* if fprs.fef == 0, set it.
+ * Setting it when already set costs more than checking */
+ andcc %g5, FPRS_FEF, %g5 /* test FEF, fprs.du = fprs.dl = 0 */
+ bz,a %XCC, 1f
+ wr %g0, FPRS_FEF, %fprs /* fprs.fef = 1 */
+1:
+ andn %o2, 0x3f, %o5 /* %o5 is multiple of block size */
+ and %o2, 0x3f, %o2 /* residue bytes in %o2 */
+ cmp %o2, 8 /* Insure we do not load beyond */
+ bgt,pt %XCC, .Lunalign_adjust /* end of source buffer */
+ andn %o1, 0x7, %o4 /* %o4 has 8 byte aligned src addr */
+ add %o2, 64, %o2 /* adjust to leave loop */
+ sub %o5, 64, %o5 /* early if necessary */
+.Lunalign_adjust:
+ alignaddr %o1, %g0, %g0 /* generate %gsr */
+ add %o1, %o5, %o1 /* advance %o1 to after blocks */
+ ldd [%o4], %f0
+.Lunalign_loop:
+ prefetch [%o0 + (9 * BLOCK_SIZE)], 20
+ ldd [%o4+8], %f2
+ faligndata %f0, %f2, %f16
+ ldd [%o4+16], %f4
+ subcc %o5, BLOCK_SIZE, %o5
+ std %f16, [%o0]
+ faligndata %f2, %f4, %f18
+ ldd [%o4+24], %f6
+ std %f18, [%o0+8]
+ faligndata %f4, %f6, %f20
+ ldd [%o4+32], %f8
+ std %f20, [%o0+16]
+ faligndata %f6, %f8, %f22
+ ldd [%o4+40], %f10
+ std %f22, [%o0+24]
+ faligndata %f8, %f10, %f24
+ ldd [%o4+48], %f12
+ std %f24, [%o0+32]
+ faligndata %f10, %f12, %f26
+ ldd [%o4+56], %f14
+ add %o4, BLOCK_SIZE, %o4
+ std %f26, [%o0+40]
+ faligndata %f12, %f14, %f28
+ ldd [%o4], %f0
+ std %f28, [%o0+48]
+ faligndata %f14, %f0, %f30
+ std %f30, [%o0+56]
+ add %o0, BLOCK_SIZE, %o0
+ bgu,pt %XCC, .Lunalign_loop
+ prefetch [%o4 + (11 * BLOCK_SIZE)], 20
+
+ /* Handle trailing bytes, 64 to 127
+ * Dest long word aligned, Src not long word aligned */
+ cmp %o2, 15
+ bleu,pt %XCC, .Lunalign_short
+
+ andn %o2, 0x7, %o5 /* %o5 is multiple of 8 */
+ and %o2, 0x7, %o2 /* residue bytes in %o2 */
+ add %o2, 8, %o2
+ sub %o5, 8, %o5 /* do not load past end of src */
+ andn %o1, 0x7, %o4 /* %o4 has 8 byte aligned src addr */
+ add %o1, %o5, %o1 /* move %o1 to after multiple of 8 */
+ ldd [%o4], %f0 /* fetch partial word */
+.Lunalign_by8:
+ ldd [%o4+8], %f2
+ add %o4, 8, %o4
+ faligndata %f0, %f2, %f16
+ subcc %o5, 8, %o5
+ std %f16, [%o0]
+ fsrc2 %f2, %f0
+ bgu,pt %XCC, .Lunalign_by8
+ add %o0, 8, %o0
+
+.Lunalign_short: /* restore fprs state */
+ brnz,pt %g5, .Lsmallrest
+ nop
+ ba .Lsmallrest
+ wr %g5, %g0, %fprs
+END(__memcpy_niagara7)
+
+#endif
diff --git a/sysdeps/sparc/sparc64/multiarch/memmove-ultra1.S b/sysdeps/sparc/sparc64/multiarch/memmove-ultra1.S
new file mode 100644
index 0000000..2ed85d9
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/memmove-ultra1.S
@@ -0,0 +1,4 @@
+#define memmove __memmove_ultra1
+#undef libc_hidden_builtin_def
+#define libc_hidden_builtin_def(name)
+#include <sysdeps/sparc/sparc64/memmove.S>
diff --git a/sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h b/sysdeps/sparc/sparc64/multiarch/memmove.c
similarity index 52%
copy from sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h
copy to sysdeps/sparc/sparc64/multiarch/memmove.c
index 46f3795..7e2f1d4 100644
--- a/sysdeps/sparc/sparc64/multiarch/ifunc-memcpy.h
+++ b/sysdeps/sparc/sparc64/multiarch/memmove.c
@@ -1,4 +1,4 @@
-/* Common definition for memcpy and mempcpy implementation.
+/* Multiple versions of memmove.
All versions must be listed in ifunc-impl-list.c.
Copyright (C) 2017 Free Software Foundation, Inc.
This file is part of the GNU C Library.
@@ -17,24 +17,17 @@
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
-#include <ifunc-init.h>
-
-extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara4) attribute_hidden;
-extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara2) attribute_hidden;
-extern __typeof (REDIRECT_NAME) OPTIMIZE (niagara1) attribute_hidden;
-extern __typeof (REDIRECT_NAME) OPTIMIZE (ultra3) attribute_hidden;
-extern __typeof (REDIRECT_NAME) OPTIMIZE (ultra1) attribute_hidden;
-
-static inline void *
-IFUNC_SELECTOR (int hwcap)
-{
- if (hwcap & HWCAP_SPARC_CRYPTO)
- return OPTIMIZE (niagara4);
- if (hwcap & HWCAP_SPARC_N2)
- return OPTIMIZE (niagara2);
- if (hwcap & HWCAP_SPARC_BLKINIT)
- return OPTIMIZE (niagara1);
- if (hwcap & HWCAP_SPARC_ULTRA3)
- return OPTIMIZE (ultra3);
- return OPTIMIZE (ultra1);
-}
+#if IS_IN (libc)
+# define memmove __redirect_memmove
+# include <string.h>
+# undef memmove
+
+# include <sparc-ifunc.h>
+
+# define SYMBOL_NAME memmove
+# include "ifunc-memmove.h"
+
+sparc_libc_ifunc_redirected (__redirect_memmove, memmove, IFUNC_SELECTOR);
+
+sparc_ifunc_redirected_hidden_def (__redirect_memmove, memmove)
+#endif
diff --git a/sysdeps/sparc/sparc64/multiarch/rtld-memmove.c b/sysdeps/sparc/sparc64/multiarch/rtld-memmove.c
new file mode 100644
index 0000000..e6d9a5c
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/rtld-memmove.c
@@ -0,0 +1 @@
+#include <sysdeps/sparc/sparc64/rtld-memmove.c>
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=e40b857825cef29b9f488f938fbcbfc87c235c3c
commit e40b857825cef29b9f488f938fbcbfc87c235c3c
Author: Jose E. Marchesi <jose.marchesi@oracle.com>
Date: Fri Oct 20 19:28:21 2017 -0200
sparc: assembly version of memmove for ultra1+
Tested in sparcv9-*-* and sparc64-*-* targets in both non-multi-arch and
multi-arch configurations.
* sysdeps/sparc/sparc32/sparcv9/memmove.S: New file.
* sysdeps/sparc/sparc32/sparcv9/rtld-memmove.c: Likewise.
* sysdeps/sparc/sparc64/memmove.S: Likewise.
* sysdeps/sparc/sparc64/rtld-memmove.c: Likewise.
diff --git a/ChangeLog b/ChangeLog
index ed6d1b0..281a013 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,10 @@
2017-10-29 Jose E. Marchesi <jose.marchesi@oracle.com>
+ * sysdeps/sparc/sparc32/sparcv9/memmove.S: New file.
+ * sysdeps/sparc/sparc32/sparcv9/rtld-memmove.c: Likewise.
+ * sysdeps/sparc/sparc64/memmove.S: Likewise.
+ * sysdeps/sparc/sparc64/rtld-memmove.c: Likewise.
+
* sysdeps/sparc/bits/hwcap.h (HWCAP_SPARC_ADP): Defined.
* sysdeps/sparc/dl-procinfo.c: Added "adp" to the
_dl_sparc_cap_flags array.
diff --git a/sysdeps/sparc/sparc32/sparcv9/memmove.S b/sysdeps/sparc/sparc32/sparcv9/memmove.S
new file mode 100644
index 0000000..39adeb2
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/memmove.S
@@ -0,0 +1,2 @@
+#define XCC icc
+#include <sparc64/memmove.S>
diff --git a/sysdeps/sparc/sparc32/sparcv9/rtld-memmove.c b/sysdeps/sparc/sparc32/sparcv9/rtld-memmove.c
new file mode 100644
index 0000000..a2fe190
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/rtld-memmove.c
@@ -0,0 +1 @@
+#include <sparc64/rtld-memmove.c>
diff --git a/sysdeps/sparc/sparc64/memmove.S b/sysdeps/sparc/sparc64/memmove.S
new file mode 100644
index 0000000..eb71ef3
--- /dev/null
+++ b/sysdeps/sparc/sparc64/memmove.S
@@ -0,0 +1,186 @@
+/* Copy memory to memory until the specified number of bytes
+ has been copied. Overlap is handled correctly.
+ For SPARC V9.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <sysdep.h>
+
+#ifndef XCC
+# define XCC xcc
+ .register %g2, #scratch
+#endif
+
+ENTRY(memmove)
+ mov %o0, %g2 /* Save pointer to destination */
+ cmp %o1, %o0 /* if from address is >= to use forward copy */
+ bgeu,a %XCC, 2f /* else use backward if ... */
+ cmp %o2, 17 /* delay slot, for small counts copy bytes */
+
+ sub %o0, %o1, %o4 /* get difference of two addresses */
+ cmp %o2, %o4 /* compare size and difference of addresses */
+ bgu %XCC, .Lovbc /* if size is bigger, have to do overlapped copy */
+ cmp %o2, 17 /* delay slot, for small counts copy bytes */
+/*
+ * normal, copy forwards
+ */
+2: ble %XCC, .Ldbytecp
+ andcc %o1, 3, %o5 /* is src word aligned */
+ bz,pn %icc, .Laldst
+ cmp %o5, 2 /* is src half-word aligned */
+ be,pn %icc, .Ls2alg
+ cmp %o5, 3 /* src is byte aligned */
+ ldub [%o1], %o3 /* move 1 or 3 bytes to align it */
+ inc 1, %o1
+ stb %o3, [%o0] /* move a byte to align src */
+ inc 1, %o0
+ bne,pn %icc, .Ls2alg
+ dec %o2
+ b .Lald /* now go align dest */
+ andcc %o0, 3, %o5
+
+.Ls2alg:
+ lduh [%o1], %o3 /* know src is 2 byte aligned */
+ inc 2, %o1
+ srl %o3, 8, %o4
+ stb %o4, [%o0] /* have to do bytes, */
+ stb %o3, [%o0 + 1] /* don't know dst alingment */
+ inc 2, %o0
+ dec 2, %o2
+
+.Laldst:
+ andcc %o0, 3, %o5 /* align the destination address */
+.Lald: bz,pn %icc, .Lw4cp
+ cmp %o5, 2
+ bz,pn %icc, .Lw2cp
+ cmp %o5, 3
+.Lw3cp:
+ lduw [%o1], %o4
+ inc 4, %o1
+ srl %o4, 24, %o5
+ stb %o5, [%o0]
+ bne,pt %icc, .Lw1cp
+ inc %o0
+ dec 1, %o2
+ andn %o2, 3, %o3 /* i3 is aligned word count */
+ dec 4, %o3 /* avoid reading beyond tail of src */
+ sub %o1, %o0, %o1 /* i1 gets the difference */
+
+1: sll %o4, 8, %g1 /* save residual bytes */
+ lduw [%o1+%o0], %o4
+ deccc 4, %o3
+ srl %o4, 24, %o5 /* merge with residual */
+ or %o5, %g1, %g1
+ st %g1, [%o0]
+ bnz,pt %XCC, 1b
+ inc 4, %o0
+ sub %o1, 3, %o1 /* used one byte of last word read */
+ and %o2, 3, %o2
+ b 7f
+ inc 4, %o2
+
+.Lw1cp:
+ srl %o4, 8, %o5
+ sth %o5, [%o0]
+ inc 2, %o0
+ dec 3, %o2
+ andn %o2, 3, %o3
+ dec 4, %o3 /* avoid reading beyond tail of src */
+ sub %o1, %o0, %o1 /* i1 gets the difference */
+
+2: sll %o4, 24, %g1 /* save residual bytes */
+ lduw [%o1+%o0], %o4
+ deccc 4, %o3
+ srl %o4, 8, %o5 /* merge with residual */
+ or %o5, %g1, %g1
+ st %g1, [%o0]
+ bnz,pt %XCC, 2b
+ inc 4, %o0
+ sub %o1, 1, %o1 /* used three bytes of last word read */
+ and %o2, 3, %o2
+ b 7f
+ inc 4, %o2
+
+.Lw2cp:
+ lduw [%o1], %o4
+ inc 4, %o1
+ srl %o4, 16, %o5
+ sth %o5, [%o0]
+ inc 2, %o0
+ dec 2, %o2
+ andn %o2, 3, %o3 /* i3 is aligned word count */
+ dec 4, %o3 /* avoid reading beyond tail of src */
+ sub %o1, %o0, %o1 /* i1 gets the difference */
+
+3: sll %o4, 16, %g1 /* save residual bytes */
+ lduw [%o1+%o0], %o4
+ deccc 4, %o3
+ srl %o4, 16, %o5 /* merge with residual */
+ or %o5, %g1, %g1
+ st %g1, [%o0]
+ bnz,pt %XCC, 3b
+ inc 4, %o0
+ sub %o1, 2, %o1 /* used two bytes of last word read */
+ and %o2, 3, %o2
+ b 7f
+ inc 4, %o2
+
+.Lw4cp:
+ andn %o2, 3, %o3 /* i3 is aligned word count */
+ sub %o1, %o0, %o1 /* i1 gets the difference */
+
+1: lduw [%o1+%o0], %o4 /* read from address */
+ deccc 4, %o3 /* decrement count */
+ st %o4, [%o0] /* write at destination address */
+ bg,pt %XCC, 1b
+ inc 4, %o0 /* increment to address */
+ b 7f
+ and %o2, 3, %o2 /* number of leftover bytes, if any */
+
+/*
+ * differenced byte copy, works with any alignment
+ */
+.Ldbytecp:
+ b 7f
+ sub %o1, %o0, %o1 /* i1 gets the difference */
+
+4: stb %o4, [%o0] /* write to address */
+ inc %o0 /* inc to address */
+7: deccc %o2 /* decrement count */
+ bge,a %XCC, 4b /* loop till done */
+ ldub [%o1+%o0], %o4 /* read from address */
+ retl
+ mov %g2, %o0 /* return pointer to destination */
+
+/*
+ * an overlapped copy that must be done "backwards"
+ */
+.Lovbc:
+ add %o1, %o2, %o1 /* get to end of source space */
+ add %o0, %o2, %o0 /* get to end of destination space */
+ sub %o1, %o0, %o1 /* i1 gets the difference */
+
+5: dec %o0 /* decrement to address */
+ ldub [%o1+%o0], %o3 /* read a byte */
+ deccc %o2 /* decrement count */
+ bg,pt %XCC, 5b /* loop until done */
+ stb %o3, [%o0] /* write byte */
+ retl
+ mov %g2, %o0 /* return pointer to destination */
+END(memmove)
+
+libc_hidden_builtin_def (memmove)
diff --git a/sysdeps/sparc/sparc64/rtld-memmove.c b/sysdeps/sparc/sparc64/rtld-memmove.c
new file mode 100644
index 0000000..1e73c6b
--- /dev/null
+++ b/sysdeps/sparc/sparc64/rtld-memmove.c
@@ -0,0 +1,2 @@
+#include <string/wordcopy.c>
+#include <string/memmove.c>
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=603e036cf83034b7164306c2e0ec4a3979cc33a3
commit 603e036cf83034b7164306c2e0ec4a3979cc33a3
Author: Jose E. Marchesi <jose.marchesi@oracle.com>
Date: Fri Oct 20 19:08:33 2017 -0200
sparc: support the ADP hw capability.
This patch adds support for the ADP (also known as adi) hardware
capability, as reported by the kernel sparc port when running on M7
machines.
Tested in both sparcv9-*-* and sparc64-*-* targets.
* sysdeps/sparc/bits/hwcap.h (HWCAP_SPARC_ADP): Defined.
* sysdeps/sparc/dl-procinfo.c: Added "adp" to the
_dl_sparc_cap_flags array.
* sysdeps/sparc/dl-procinfo.h (_DL_HWCAP_COUNT): Increment.
diff --git a/ChangeLog b/ChangeLog
index 0a4dd58..ed6d1b0 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,10 @@
+2017-10-29 Jose E. Marchesi <jose.marchesi@oracle.com>
+
+ * sysdeps/sparc/bits/hwcap.h (HWCAP_SPARC_ADP): Defined.
+ * sysdeps/sparc/dl-procinfo.c: Added "adp" to the
+ _dl_sparc_cap_flags array.
+ * sysdeps/sparc/dl-procinfo.h (_DL_HWCAP_COUNT): Increment.
+
2017-11-29 Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/unix/sysv/linux/x86_64/x32/getcpu.c: Remove file.
diff --git a/sysdeps/sparc/bits/hwcap.h b/sysdeps/sparc/bits/hwcap.h
index e090723..a9b05a8 100644
--- a/sysdeps/sparc/bits/hwcap.h
+++ b/sysdeps/sparc/bits/hwcap.h
@@ -48,3 +48,4 @@
#define HWCAP_SPARC_PAUSE 0x01000000
#define HWCAP_SPARC_CBCOND 0x02000000
#define HWCAP_SPARC_CRYPTO 0x04000000
+#define HWCAP_SPARC_ADP 0x08000000
diff --git a/sysdeps/sparc/dl-procinfo.c b/sysdeps/sparc/dl-procinfo.c
index 653bdfb..3db59dc 100644
--- a/sysdeps/sparc/dl-procinfo.c
+++ b/sysdeps/sparc/dl-procinfo.c
@@ -46,13 +46,13 @@
#if !defined PROCINFO_DECL && defined SHARED
._dl_sparc_cap_flags
#else
-PROCINFO_CLASS const char _dl_sparc_cap_flags[27][11]
+PROCINFO_CLASS const char _dl_sparc_cap_flags[28][11]
#endif
#ifndef PROCINFO_DECL
= { "flush", "stbar", "swap", "muldiv", "v9", "ultra3", "v9v", "v9v2",
"mul32", "div32", "fsmuld", "v8plus", "popc", "vis", "vis2",
"ASIBlkInit", "fmaf", "vis3", "hpc", "random", "trans", "fjfmau",
- "ima", "cspare", "pause", "cbcond", "crypto" }
+ "ima", "cspare", "pause", "cbcond", "crypto", "adp" }
#endif
#if !defined SHARED || defined PROCINFO_DECL
;
diff --git a/sysdeps/sparc/dl-procinfo.h b/sysdeps/sparc/dl-procinfo.h
index 456dde6..19bab8c 100644
--- a/sysdeps/sparc/dl-procinfo.h
+++ b/sysdeps/sparc/dl-procinfo.h
@@ -23,7 +23,7 @@
#include <ldsodefs.h>
#include <sysdep.h>
-#define _DL_HWCAP_COUNT 27
+#define _DL_HWCAP_COUNT 28
static inline int
__attribute__ ((unused))
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=cd2e163f4966b8493affe63ca5b8003d0b4cb564
commit cd2e163f4966b8493affe63ca5b8003d0b4cb564
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Sat Oct 14 07:55:54 2017 -0300
x32: Remove unused getcpu implementation
Checked on x86_64-linux-gnu-x32.
* sysdeps/unix/sysv/linux/x86_64/x32/getcpu.c: Remove file.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index f7f4c8b..0a4dd58 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,7 @@
2017-11-29 Adhemerval Zanella <adhemerval.zanella@linaro.org>
+ * sysdeps/unix/sysv/linux/x86_64/x32/getcpu.c: Remove file.
+
* sysdeps/sparc/sparc-ifunc.h (SPARC_ASM_IFUNC_DFLT,
SPARC_ASM_IFUNC1, SPARC_ASM_IFUNC2, SET, SPARC_ASM_VIS2_IFUNC,
SPARC_ASM_VIS3_IFUNC, SPARC_ASM_VIS3_VIS2_IFUNC): Remove macros.
diff --git a/sysdeps/unix/sysv/linux/x86_64/x32/getcpu.c b/sysdeps/unix/sysv/linux/x86_64/x32/getcpu.c
deleted file mode 100644
index cd26d2e..0000000
--- a/sysdeps/unix/sysv/linux/x86_64/x32/getcpu.c
+++ /dev/null
@@ -1,32 +0,0 @@
-/* Copyright (C) 2012-2017 Free Software Foundation, Inc.
- This file is part of the GNU C Library.
-
- The GNU C Library is free software; you can redistribute it and/or
- modify it under the terms of the GNU Lesser General Public
- License as published by the Free Software Foundation; either
- version 2.1 of the License, or (at your option) any later version.
-
- The GNU C Library is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- Lesser General Public License for more details.
-
- You should have received a copy of the GNU Lesser General Public
- License along with the GNU C Library; if not, see
- <http://www.gnu.org/licenses/>. */
-
-#ifdef SHARED
-# include <dl-vdso.h>
-
-void *getcpu_ifunc (void) __asm__ ("__getcpu");
-
-void *
-inhibit_stack_protector
-getcpu_ifunc (void)
-{
- PREPARE_VERSION (linux26, "LINUX_2.6", 61765110);
-
- return _dl_vdso_vsym ("__vdso_getcpu", &linux26);
-}
-__asm (".type __getcpu, %gnu_indirect_function");
-#endif
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=cdaea3bd782d9038c8b4753a800459de9f4b5f9a
commit cdaea3bd782d9038c8b4753a800459de9f4b5f9a
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 13:47:36 2017 -0300
sparc: Remove ununsed ifunc assembly macros
* sysdeps/sparc/sparc-ifunc.h (SPARC_ASM_IFUNC_DFLT,
SPARC_ASM_IFUNC1, SPARC_ASM_IFUNC2, SET, SPARC_ASM_VIS2_IFUNC,
SPARC_ASM_VIS3_IFUNC, SPARC_ASM_VIS3_VIS2_IFUNC): Remove macros.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index fef4682..f7f4c8b 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,9 @@
2017-11-29 Adhemerval Zanella <adhemerval.zanella@linaro.org>
+ * sysdeps/sparc/sparc-ifunc.h (SPARC_ASM_IFUNC_DFLT,
+ SPARC_ASM_IFUNC1, SPARC_ASM_IFUNC2, SET, SPARC_ASM_VIS2_IFUNC,
+ SPARC_ASM_VIS3_IFUNC, SPARC_ASM_VIS3_VIS2_IFUNC): Remove macros.
+
* sysdeps/sparc/sparc64/cpu_relax.c: New file.
* sysdeps/sparc/sparc32/sparcv9/cpu_relax.c: Likewise.
* sysdeps/sparc/sparc64/cpu_relax.S: Remove file.
diff --git a/sysdeps/sparc/sparc-ifunc.h b/sysdeps/sparc/sparc-ifunc.h
index 4a68cf1..0760768 100644
--- a/sysdeps/sparc/sparc-ifunc.h
+++ b/sysdeps/sparc/sparc-ifunc.h
@@ -17,157 +17,25 @@
#include <sysdep.h>
-#ifdef __ASSEMBLER__
+#define INIT_ARCH()
-# ifdef SHARED
+#define sparc_libc_ifunc(name, expr) sparc_libm_ifunc (name, expr)
-# define SPARC_ASM_IFUNC_DFLT(name, dflt) \
-ENTRY (__##name) \
- .type __##name, @gnu_indirect_function; \
- SETUP_PIC_REG_LEAF(o3, o5); \
- sethi %gdop_hix22(dflt), %o1; \
- xor %o1, %gdop_lox10(dflt), %o1; \
- add %o3, %o1, %o1; \
- retl; \
- mov %o1, %o0; \
-END (__##name)
-
-# define SPARC_ASM_IFUNC1(name, m1, f1, dflt) \
-ENTRY (__##name) \
- .type __##name, @gnu_indirect_function; \
- SETUP_PIC_REG_LEAF(o3, o5); \
- set m1, %o1; \
- andcc %o0, %o1, %g0; \
- be 9f; \
- nop; \
- sethi %gdop_hix22(f1), %o1; \
- xor %o1, %gdop_lox10(f1), %o1; \
- ba 10f; \
- nop; \
-9: sethi %gdop_hix22(dflt), %o1; \
- xor %o1, %gdop_lox10(dflt), %o1; \
-10: add %o3, %o1, %o1; \
- retl; \
- mov %o1, %o0; \
-END (__##name)
-
-# define SPARC_ASM_IFUNC2(name, m1, f1, m2, f2, dflt) \
-ENTRY (__##name) \
- .type __##name, @gnu_indirect_function; \
- SETUP_PIC_REG_LEAF(o3, o5); \
- set m1, %o1; \
- andcc %o0, %o1, %g0; \
- be 8f; \
- nop; \
- sethi %gdop_hix22(f1), %o1; \
- xor %o1, %gdop_lox10(f1), %o1; \
- ba 10f; \
- nop; \
-8: set m2, %o1; \
- andcc %o0, %o1, %g0; \
- be 9f; \
- nop; \
- sethi %gdop_hix22(f2), %o1; \
- xor %o1, %gdop_lox10(f2), %o1; \
- ba 10f; \
- nop; \
-9: sethi %gdop_hix22(dflt), %o1; \
- xor %o1, %gdop_lox10(dflt), %o1; \
-10: add %o3, %o1, %o1; \
- retl; \
- mov %o1, %o0; \
-END (__##name)
-
-# else /* SHARED */
-
-# ifdef __arch64__
-# define SET(SYM, TMP, REG) setx SYM, TMP, REG
-# else
-# define SET(SYM, TMP, REG) set SYM, REG
-# endif
-
-# define SPARC_ASM_IFUNC_DFLT(name, dflt) \
-ENTRY (__##name) \
- .type __##name, @gnu_indirect_function; \
- SET(dflt, %g1, %o1); \
- retl; \
- mov %o1, %o0; \
-END (__##name)
-
-# define SPARC_ASM_IFUNC1(name, m1, f1, dflt) \
-ENTRY (__##name) \
- .type __##name, @gnu_indirect_function; \
- set m1, %o1; \
- andcc %o0, %o1, %g0; \
- be 9f; \
- nop; \
- SET(f1, %g1, %o1); \
- ba 10f; \
- nop; \
-9: SET(dflt, %g1, %o1); \
-10: retl; \
- mov %o1, %o0; \
-END (__##name)
-
-# define SPARC_ASM_IFUNC2(name, m1, f1, m2, f2, dflt) \
-ENTRY (__##name) \
- .type __##name, @gnu_indirect_function; \
- set m1, %o1; \
- andcc %o0, %o1, %g0; \
- be 8f; \
- nop; \
- SET(f1, %g1, %o1); \
- ba 10f; \
- nop; \
-8: set m2, %o1; \
- andcc %o0, %o1, %g0; \
- be 9f; \
- nop; \
- SET(f2, %g1, %o1); \
- ba 10f; \
- nop; \
-9: SET(dflt, %g1, %o1); \
-10: retl; \
- mov %o1, %o0; \
-END (__##name)
-
-# endif /* SHARED */
-
-#define SPARC_ASM_VIS2_IFUNC(name) \
- SPARC_ASM_IFUNC1(name, HWCAP_SPARC_VIS2, \
- __##name##_vis2, __##name##_generic)
-
-#define SPARC_ASM_VIS3_IFUNC(name) \
- SPARC_ASM_IFUNC1(name, HWCAP_SPARC_VIS3, \
- __##name##_vis3, __##name##_generic)
-
-#define SPARC_ASM_VIS3_VIS2_IFUNC(name) \
- SPARC_ASM_IFUNC2(name, HWCAP_SPARC_VIS3, \
- __##name##_vis3, \
- HWCAP_SPARC_VIS2, \
- __##name##_vis2, __##name##_generic)
-
-#else /* __ASSEMBLER__ */
-# define INIT_ARCH()
-
-# define sparc_libc_ifunc_redirected(redirected_name, name, expr) \
+#define sparc_libc_ifunc_redirected(redirected_name, name, expr) \
__ifunc (redirected_name, name, expr(hwcap), int hwcap, INIT_ARCH)
-# define sparc_libm_ifunc(name, expr) \
+#define sparc_libm_ifunc(name, expr) \
__ifunc (name, name, expr, int hwcap, libm_ifunc_init)
-# define sparc_libc_ifunc(name, expr) sparc_libm_ifunc (name, expr)
-
-# define sparc_libm_ifunc_redirected(redirected_name, name, expr) \
+#define sparc_libm_ifunc_redirected(redirected_name, name, expr) \
__ifunc (redirected_name, name, expr, int hwcap, libm_ifunc_init)
/* It essentially does libc_hidden_builtin_def (name) and redirect
the internal redirected symbol to ifunc implementation. */
-# if defined SHARED
-# define sparc_ifunc_redirected_hidden_def(redirect_name, name) \
+#if defined SHARED
+# define sparc_ifunc_redirected_hidden_def(redirect_name, name) \
__hidden_ver1 (name, __GI_##name, redirect_name) \
__attribute__ ((visibility ("hidden")));
-# else
-# define sparc_ifunc_redirected_hidden_def(redirect_name, name)
-# endif
-#endif /* __ASSEMBLER__ */
+#else
+# define sparc_ifunc_redirected_hidden_def(redirect_name, name)
+#endif
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=997f7bd2995a42f94b840ac746293b5f1fdc0b0a
commit 997f7bd2995a42f94b840ac746293b5f1fdc0b0a
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Sat Oct 14 09:47:08 2017 -0300
sparc: refactor cpu_relax to C
* sysdeps/sparc/sparc64/cpu_relax.c: New file.
* sysdeps/sparc/sparc32/sparcv9/cpu_relax.c: Likewise.
* sysdeps/sparc/sparc64/cpu_relax.S: Remove file.
* sysdeps/sparc/sparc32/sparcv9/cpu_relax.S: Likewise.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index 48d1e75..fef4682 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,10 @@
2017-11-29 Adhemerval Zanella <adhemerval.zanella@linaro.org>
+ * sysdeps/sparc/sparc64/cpu_relax.c: New file.
+ * sysdeps/sparc/sparc32/sparcv9/cpu_relax.c: Likewise.
+ * sysdeps/sparc/sparc64/cpu_relax.S: Remove file.
+ * sysdeps/sparc/sparc32/sparcv9/cpu_relax.S: Likewise.
+
* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
(libm-sysdep_routines): Add s_nearbyintf-generic and
s_nearbyint-generic.
diff --git a/sysdeps/sparc/sparc32/sparcv9/cpu_relax.S b/sysdeps/sparc/sparc32/sparcv9/cpu_relax.S
deleted file mode 100644
index 41a5e72..0000000
--- a/sysdeps/sparc/sparc32/sparcv9/cpu_relax.S
+++ /dev/null
@@ -1 +0,0 @@
-#include <sysdeps/sparc/sparc64/cpu_relax.S>
diff --git a/sysdeps/sparc/sparc32/sparcv9/cpu_relax.c b/sysdeps/sparc/sparc32/sparcv9/cpu_relax.c
new file mode 100644
index 0000000..1670cf6
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/cpu_relax.c
@@ -0,0 +1 @@
+#include <sysdeps/sparc/sparc64/cpu_relax.c>
diff --git a/sysdeps/sparc/sparc64/cpu_relax.S b/sysdeps/sparc/sparc64/cpu_relax.S
deleted file mode 100644
index 5271164..0000000
--- a/sysdeps/sparc/sparc64/cpu_relax.S
+++ /dev/null
@@ -1,67 +0,0 @@
-/* CPU strand yielding for busy loops.
- Copyright (C) 2012-2017 Free Software Foundation, Inc.
- Contributed by David S. Miller (davem@davemloft.net)
- This file is part of the GNU C Library.
-
- The GNU C Library is free software; you can redistribute it and/or
- modify it under the terms of the GNU Lesser General Public
- License as published by the Free Software Foundation; either
- version 2.1 of the License, or (at your option) any later version.
-
- The GNU C Library is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- Lesser General Public License for more details.
-
- You should have received a copy of the GNU Lesser General Public
- License along with the GNU C Library; if not, see
- <http://www.gnu.org/licenses/>. */
-
-#include <sysdep.h>
-
- .text
-__cpu_relax_generic:
- rd %ccr, %g0
- rd %ccr, %g0
- rd %ccr, %g0
- retl
- nop
- .size __cpu_relax_generic,.-__cpu_relax_generic
-
-__cpu_relax_pause:
- wr %g0, 128, %asr27
- retl
- nop
- .size __cpu_relax_pause,.-__cpu_relax_pause
-
-ENTRY(__cpu_relax)
- .type __cpu_relax, @gnu_indirect_function
-# ifdef SHARED
- SETUP_PIC_REG_LEAF(o3, o5)
-# endif
- set HWCAP_SPARC_PAUSE, %o1
- andcc %o0, %o1, %g0
- be 1f
- nop
-# ifdef SHARED
- sethi %gdop_hix22(__cpu_relax_pause), %o1
- xor %o1, %gdop_lox10(__cpu_relax_pause), %o1
-# else
- set __cpu_relax_pause, %o1
-# endif
- ba 10f
- nop
-1:
-# ifdef SHARED
- sethi %gdop_hix22(__cpu_relax_generic), %o1
- xor %o1, %gdop_lox10(__cpu_relax_generic), %o1
-# else
- set __cpu_relax_generic, %o1
-# endif
-10:
-# ifdef SHARED
- add %o3, %o1, %o1
-# endif
- retl
- mov %o1, %o0
-END(__cpu_relax)
diff --git a/sysdeps/sparc/sparc64/cpu_relax.c b/sysdeps/sparc/sparc64/cpu_relax.c
new file mode 100644
index 0000000..388e76c
--- /dev/null
+++ b/sysdeps/sparc/sparc64/cpu_relax.c
@@ -0,0 +1,38 @@
+/* CPU strand yielding for busy loops. Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <sparc-ifunc.h>
+
+static void
+__cpu_relax_generic (void)
+{
+ asm volatile ("rd %ccr, %g0;"
+ "rd %ccr, %g0;"
+ "rd %ccr, %g0");
+}
+
+static void
+__cpu_relax_pause (void)
+{
+ asm volatile ("wr %g0, 128, %asr27;");
+}
+
+sparc_libc_ifunc (__cpu_relax,
+ hwcap & HWCAP_SPARC_PAUSE
+ ? __cpu_relax_pause
+ : __cpu_relax_generic)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=47397d78ece2355ec803a864e17e04926ce67422
commit 47397d78ece2355ec803a864e17e04926ce67422
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 16:11:33 2017 -0300
sparc: refactor sparc32 nearbyint{f} selector to C
This patch refactors the sparc32 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
s_nearbyint{f}-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
(libm-sysdep_routines): Add s_nearbyintf-generic and
s_nearbyint-generic.
* sysdeps/sparc/sparcv9/fpu/multiarch/s_nearbyint-generic.S: New
file.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_nearbyint.c: Likewise.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-generic.S:
Likewise.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.c: Likewise.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_nearbyint.S: Remove file.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.S: Likewise.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index 5700aba..48d1e75 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,6 +1,18 @@
2017-11-29 Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
+ (libm-sysdep_routines): Add s_nearbyintf-generic and
+ s_nearbyint-generic.
+ * sysdeps/sparc/sparcv9/fpu/multiarch/s_nearbyint-generic.S: New
+ file.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_nearbyint.c: Likewise.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-generic.S:
+ Likewise.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.c: Likewise.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_nearbyint.S: Remove file.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.S: Likewise.
+
+ * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
(libm-sysdep_routines): Add s_rintf-generic and s_rint-generic.
* sysdeps/sparc/sparcv9/fpu/multiarch/s_rint-generic.S: New
file.
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
index 459c0e5..1a26ee1 100644
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
@@ -11,9 +11,9 @@ libm-sysdep_routines += s_fabs-vis3 s_fabsf-vis3 s_fabs-generic \
s_fabsf-generic s_llrintf-vis3 s_llrint-vis3 \
s_llrintf-generic s_llrint-generic \
s_rintf-vis3 s_rint-vis3 s_rintf-generic \
- s_rint-generic \
- s_fmaf-vis3 s_fma-vis3 s_fma-generic s_fmaf-generic \
- s_nearbyint-vis3 s_nearbyintf-vis3 \
+ s_rint-generic s_fmaf-vis3 s_fma-vis3 s_fma-generic \
+ s_fmaf-generic s_nearbyint-vis3 s_nearbyintf-vis3 \
+ s_nearbyint-generic s_nearbyintf-generic \
s_fdimf-vis3 s_fdim-vis3 s_fdim-generic \
s_fdimf-generic \
$(sysdep_calls:s_%=m_%)
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-generic.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-generic.S
new file mode 100644
index 0000000..fd4112e
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-generic.S
@@ -0,0 +1,9 @@
+#include <math_ldbl_opt.h>
+
+#define __nearbyint __nearbyint_generic
+#undef weak_alias
+#define weak_alias(a, b)
+#undef compat_symbol
+#define compat_symbol(a, b, c, d)
+
+#include <sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyint.S>
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.S
deleted file mode 100644
index 47da9ea..0000000
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.S
+++ /dev/null
@@ -1,19 +0,0 @@
-#include <sparc-ifunc.h>
-#include <math_ldbl_opt.h>
-
-SPARC_ASM_VIS3_IFUNC(nearbyint)
-
-weak_alias (__nearbyint, nearbyint)
-
-#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_1)
-compat_symbol (libm, __nearbyint, nearbyintl, GLIBC_2_1)
-#endif
-
-# undef weak_alias
-# define weak_alias(a, b)
-# undef compat_symbol
-# define compat_symbol(a, b, c, d)
-
-#define __nearbyint __nearbyint_generic
-
-#include "../s_nearbyint.S"
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.c
new file mode 100644
index 0000000..5a2b6e4
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint.c
@@ -0,0 +1,35 @@
+/* nearbyint ifunc resolver, Linux/sparc32 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#define __nearbyint __redirect_nearbyint
+#include <math.h>
+#undef __nearbyint
+#include <math_ldbl_opt.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (__redirect_nearbyint) __nearbyint_vis3 attribute_hidden;
+extern __typeof (__redirect_nearbyint) __nearbyint_generic attribute_hidden;
+
+sparc_libm_ifunc_redirected (__redirect_nearbyint, __nearbyint,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __nearbyint_vis3
+ : __nearbyint_generic);
+weak_alias (__nearbyint, nearbyint)
+#if LONG_DOUBLE_COMPAT (libm, GLIBC_2_1)
+compat_symbol (libm, __nearbyint, nearbyintl, GLIBC_2_1);
+#endif
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-generic.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-generic.S
new file mode 100644
index 0000000..8f9088e
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-generic.S
@@ -0,0 +1,4 @@
+#define __nearbyintf __nearbyintf_generic
+#undef weak_alias
+#define weak_alias(a, b)
+#include <sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyintf.S>
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.S
deleted file mode 100644
index 95100c1..0000000
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.S
+++ /dev/null
@@ -1,12 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(nearbyintf)
-
-weak_alias (__nearbyintf, nearbyintf)
-
-# undef weak_alias
-# define weak_alias(a, b)
-
-#define __nearbyintf __nearbyintf_generic
-
-#include "../s_nearbyintf.S"
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.c
new file mode 100644
index 0000000..a513fa7
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf.c
@@ -0,0 +1,29 @@
+/* nearbyintf ifunc resolver, Linux/sparc32 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <math.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (nearbyintf) __nearbyintf_vis3 attribute_hidden;
+extern __typeof (nearbyintf) __nearbyintf_generic attribute_hidden;
+
+sparc_libm_ifunc (__nearbyintf,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __nearbyintf_vis3
+ : __nearbyintf_generic);
+weak_alias (__nearbyintf, nearbyintf)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=060463d9bcf11031878a5ff1747151c0cbb707d6
commit 060463d9bcf11031878a5ff1747151c0cbb707d6
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 16:05:24 2017 -0300
sparc: refactor sparc32 rint{f} selector to C
This patch refactors the sparc32 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
s_rint{f}-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
(libm-sysdep_routines): Add s_rintf-generic and s_rint-generic.
* sysdeps/sparc/sparcv9/fpu/multiarch/s_rint-generic.S: New
file.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_rint.c: Likewise.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_rintf-generic.S:
Likewise.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_rintf.c: Likewise.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_rint.S: Remove file.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_rintf.S: Likewise.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index efb93d8..5700aba 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,6 +1,17 @@
2017-11-29 Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
+ (libm-sysdep_routines): Add s_rintf-generic and s_rint-generic.
+ * sysdeps/sparc/sparcv9/fpu/multiarch/s_rint-generic.S: New
+ file.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_rint.c: Likewise.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_rintf-generic.S:
+ Likewise.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_rintf.c: Likewise.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_rint.S: Remove file.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_rintf.S: Likewise.
+
+ * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
(libm-sysdep_routines): Add s_llrintf-generic and s_llrint-generic.
* sysdeps/sparc/sparcv9/fpu/multiarch/s_llrint-generic.S: New
file.
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
index 5b6e2a6..459c0e5 100644
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
@@ -10,7 +10,8 @@ sysdep_routines += $(sysdep_calls)
libm-sysdep_routines += s_fabs-vis3 s_fabsf-vis3 s_fabs-generic \
s_fabsf-generic s_llrintf-vis3 s_llrint-vis3 \
s_llrintf-generic s_llrint-generic \
- s_rintf-vis3 s_rint-vis3 \
+ s_rintf-vis3 s_rint-vis3 s_rintf-generic \
+ s_rint-generic \
s_fmaf-vis3 s_fma-vis3 s_fma-generic s_fmaf-generic \
s_nearbyint-vis3 s_nearbyintf-vis3 \
s_fdimf-vis3 s_fdim-vis3 s_fdim-generic \
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint-generic.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint-generic.S
new file mode 100644
index 0000000..9709b1e
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint-generic.S
@@ -0,0 +1,8 @@
+#include <math_ldbl_opt.h>
+
+#define __rint __rint_generic
+#undef weak_alias
+#define weak_alias(a, b)
+#undef compat_symbol
+#define compat_symbol(a, b, c, d)
+#include <sysdeps/sparc/sparc32/sparcv9/fpu/s_rint.S>
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint.S
deleted file mode 100644
index de893fa..0000000
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint.S
+++ /dev/null
@@ -1,19 +0,0 @@
-#include <sparc-ifunc.h>
-#include <math_ldbl_opt.h>
-
-SPARC_ASM_VIS3_IFUNC(rint)
-
-weak_alias (__rint, rint)
-
-#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_0)
-compat_symbol (libm, __rint, rintl, GLIBC_2_0)
-#endif
-
-# undef weak_alias
-# define weak_alias(a, b)
-# undef compat_symbol
-# define compat_symbol(a, b, c, d)
-
-#define __rint __rint_generic
-
-#include "../s_rint.S"
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint.c
new file mode 100644
index 0000000..b6714e6
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rint.c
@@ -0,0 +1,35 @@
+/* rint ifunc resolver, Linux/sparc32 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#define __rint __redirect_rint
+#include <math.h>
+#undef __rint
+#include <math_ldbl_opt.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (__redirect_rint) __rint_vis3 attribute_hidden;
+extern __typeof (__redirect_rint) __rint_generic attribute_hidden;
+
+sparc_libm_ifunc_redirected (__redirect_rint, __rint,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __rint_vis3
+ : __rint_generic);
+weak_alias (__rint, rint)
+#if LONG_DOUBLE_COMPAT (libm, GLIBC_2_0)
+compat_symbol (libm, __rint, rintl, GLIBC_2_0);
+#endif
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf-generic.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf-generic.S
new file mode 100644
index 0000000..185ba6b
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf-generic.S
@@ -0,0 +1,4 @@
+#define __rintf __rintf_generic
+#undef weak_alias
+#define weak_alias(a, b)
+#include <sysdeps/sparc/sparc32/sparcv9/fpu/s_rintf.S>
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf.S
deleted file mode 100644
index 38fd936..0000000
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf.S
+++ /dev/null
@@ -1,12 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(rintf)
-
-weak_alias (__rintf, rintf)
-
-# undef weak_alias
-# define weak_alias(a, b)
-
-#define __rintf __rintf_generic
-
-#include "../s_rintf.S"
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf.c
new file mode 100644
index 0000000..bfe35d5
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_rintf.c
@@ -0,0 +1,29 @@
+/* rintf ifunc resolver, Linux/sparc32 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <math.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (rintf) __rintf_vis3 attribute_hidden;
+extern __typeof (rintf) __rintf_generic attribute_hidden;
+
+sparc_libm_ifunc (__rintf,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __rintf_vis3
+ : __rintf_generic);
+weak_alias (__rintf, rintf)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=349813a5e84595b40b9e54f562b6333c47dc2159
commit 349813a5e84595b40b9e54f562b6333c47dc2159
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 16:00:36 2017 -0300
sparc: refactor sparc32 llrint{f} selector to C
This patch refactors the sparc32 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
s_llrint{f}-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
(libm-sysdep_routines): Add s_llrintf-generic and s_llrint-generic.
* sysdeps/sparc/sparcv9/fpu/multiarch/s_llrint-generic.S: New
file.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_llrint.c: Likewise.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_llrintf-generic.S:
Likewise.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_llrintf.c: Likewise.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_llrint.S: Remove file.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_llrintf.S: Likewise.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index 2064e87..efb93d8 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,6 +1,17 @@
2017-11-29 Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
+ (libm-sysdep_routines): Add s_llrintf-generic and s_llrint-generic.
+ * sysdeps/sparc/sparcv9/fpu/multiarch/s_llrint-generic.S: New
+ file.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_llrint.c: Likewise.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_llrintf-generic.S:
+ Likewise.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_llrintf.c: Likewise.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_llrint.S: Remove file.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_llrintf.S: Likewise.
+
+ * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
(libm-sysdep_routines): Add s_fabsf-generic and s_fabs-generic.
* sysdeps/sparc/sparcv9/fpu/multiarch/s_fabs-generic.S: New
file.
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
index bd8e341..5b6e2a6 100644
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
@@ -9,6 +9,7 @@ sysdep_calls := s_copysignf-vis3 s_copysign-vis3 s_copysignf-generic \
sysdep_routines += $(sysdep_calls)
libm-sysdep_routines += s_fabs-vis3 s_fabsf-vis3 s_fabs-generic \
s_fabsf-generic s_llrintf-vis3 s_llrint-vis3 \
+ s_llrintf-generic s_llrint-generic \
s_rintf-vis3 s_rint-vis3 \
s_fmaf-vis3 s_fma-vis3 s_fma-generic s_fmaf-generic \
s_nearbyint-vis3 s_nearbyintf-vis3 \
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint-generic.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint-generic.S
new file mode 100644
index 0000000..ceb5d14
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint-generic.S
@@ -0,0 +1,8 @@
+#include <math_ldbl_opt.h>
+
+#define __llrint __llrint_generic
+#undef weak_alias
+#define weak_alias(a, b)
+#undef compat_symbol
+#define compat_symbol(a, b, c, d)
+#include <sysdeps/sparc/sparc32/sparcv9/fpu/s_llrint.S>
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint.S
deleted file mode 100644
index fd23041..0000000
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint.S
+++ /dev/null
@@ -1,24 +0,0 @@
-#include <sparc-ifunc.h>
-#include <math_ldbl_opt.h>
-
-SPARC_ASM_VIS3_IFUNC(llrint)
-
-weak_alias (__llrint, llrint)
-
-strong_alias (__llrint, __lllrint)
-weak_alias (__lllrint, lllrint)
-
-#if LONG_DOUBLE_COMPAT(libm, GLIBC_2_1)
-compat_symbol (libm, __llrint, llrintl, GLIBC_2_1)
-#endif
-
-# undef weak_alias
-# define weak_alias(a, b)
-# undef strong_alias
-# define strong_alias(a, b)
-# undef compat_symbol
-# define compat_symbol(a, b, c, d)
-
-#define __llrint __llrint_generic
-
-#include "../s_llrint.S"
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint.c
new file mode 100644
index 0000000..b10cad4
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrint.c
@@ -0,0 +1,36 @@
+/* llrint ifunc resolver, Linux/sparc32 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#define __llrint __redirect_llrint
+#include <math.h>
+#undef __llrint
+#include <math_ldbl_opt.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (__redirect_llrint) __llrint_vis3 attribute_hidden;
+extern __typeof (__redirect_llrint) __llrint_generic attribute_hidden;
+
+sparc_libm_ifunc_redirected (__redirect_llrint, __llrint,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __llrint_vis3
+ : __llrint_generic);
+weak_alias (__llrint, llrint)
+
+#if LONG_DOUBLE_COMPAT (libm, GLIBC_2_1)
+compat_symbol (libm, __llrint, llrintl, GLIBC_2_1);
+#endif
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf-generic.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf-generic.S
new file mode 100644
index 0000000..83c462c
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf-generic.S
@@ -0,0 +1,4 @@
+#define __llrintf __llrintf_generic
+#undef weak_alias
+#define weak_alias(a, b)
+#include <sysdeps/sparc/sparc32/sparcv9/fpu/s_llrintf.S>
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf.S
deleted file mode 100644
index 8af5244..0000000
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf.S
+++ /dev/null
@@ -1,17 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(llrintf)
-
-weak_alias (__llrintf, llrintf)
-
-strong_alias (__llrintf, __lllrintf)
-weak_alias (__lllrintf, lllrintf)
-
-# undef weak_alias
-# define weak_alias(a, b)
-# undef strong_alias
-# define strong_alias(a, b)
-
-#define __llrintf __llrintf_generic
-
-#include "../s_llrintf.S"
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf.c
new file mode 100644
index 0000000..0594a16
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_llrintf.c
@@ -0,0 +1,29 @@
+/* llrintf ifunc resolver, Linux/sparc32 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <math.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (llrintf) __llrintf_vis3 attribute_hidden;
+extern __typeof (llrintf) __llrintf_generic attribute_hidden;
+
+sparc_libm_ifunc (__llrintf,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __llrintf_vis3
+ : __llrintf_generic);
+weak_alias (__llrintf, llrintf)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=52ad6e69d40738afefb7b71ee8f7524b07e152a6
commit 52ad6e69d40738afefb7b71ee8f7524b07e152a6
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 15:49:25 2017 -0300
sparc: refactor sparc32 fabs{f} selector to C
This patch refactors the sparc32 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
s_fabs{f}-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
(libm-sysdep_routines): Add s_fabsf-generic and s_fabs-generic.
* sysdeps/sparc/sparcv9/fpu/multiarch/s_fabs-generic.S: New
file.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_fabs.c: Likewise.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_fabsf-generic.S:
Likewise.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_fabsf.c: Likewise.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_fabs.S: Remove file.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_fabsf.S: Likewise.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index 346cc4c..2064e87 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,6 +1,17 @@
2017-11-29 Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
+ (libm-sysdep_routines): Add s_fabsf-generic and s_fabs-generic.
+ * sysdeps/sparc/sparcv9/fpu/multiarch/s_fabs-generic.S: New
+ file.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_fabs.c: Likewise.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_fabsf-generic.S:
+ Likewise.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_fabsf.c: Likewise.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_fabs.S: Remove file.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_fabsf.S: Likewise.
+
+ * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
(sysdep_calls): New rule.
(sysdep_routines): Use sysdep_calls as base.
(libm-sysdep_routines): Add generic rule for symbols shared with
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
index b8d1126..bd8e341 100644
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
@@ -7,7 +7,8 @@ sysdep_calls := s_copysignf-vis3 s_copysign-vis3 s_copysignf-generic \
s_copysign-generic
sysdep_routines += $(sysdep_calls)
-libm-sysdep_routines += s_fabs-vis3 s_fabsf-vis3 s_llrintf-vis3 s_llrint-vis3 \
+libm-sysdep_routines += s_fabs-vis3 s_fabsf-vis3 s_fabs-generic \
+ s_fabsf-generic s_llrintf-vis3 s_llrint-vis3 \
s_rintf-vis3 s_rint-vis3 \
s_fmaf-vis3 s_fma-vis3 s_fma-generic s_fmaf-generic \
s_nearbyint-vis3 s_nearbyintf-vis3 \
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs-generic.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs-generic.S
new file mode 100644
index 0000000..ddfdf4b
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs-generic.S
@@ -0,0 +1,8 @@
+#include <math_ldbl_opt.h>
+
+#define __fabs __fabs_generic
+#undef weak_alias
+#define weak_alias(a, b)
+#undef compat_symbol
+#define compat_symbol(a, b, c, d)
+#include <sysdeps/sparc/sparc32/fpu/s_fabs.S>
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs.S
deleted file mode 100644
index 72cc08f..0000000
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs.S
+++ /dev/null
@@ -1,18 +0,0 @@
-#include <sparc-ifunc.h>
-#include <math_ldbl_opt.h>
-
-SPARC_ASM_VIS3_IFUNC(fabs)
-
-weak_alias (__fabs, fabs)
-#if LONG_DOUBLE_COMPAT (libm, GLIBC_2_0)
-compat_symbol (libm, __fabs, fabsl, GLIBC_2_0);
-#endif
-
-# undef weak_alias
-# define weak_alias(a, b)
-# undef compat_symbol
-# define compat_symbol(a, b, c, d)
-
-#define __fabs __fabs_generic
-
-#include "../s_fabs.S"
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs.c
new file mode 100644
index 0000000..58b0192
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabs.c
@@ -0,0 +1,35 @@
+/* fabs ifunc resolver, Linux/sparc32 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#define __fabs __redirect_fabs
+#include <math.h>
+#undef __fabs
+#include <math_ldbl_opt.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (__redirect_fabs) __fabs_vis3 attribute_hidden;
+extern __typeof (__redirect_fabs) __fabs_generic attribute_hidden;
+
+sparc_libm_ifunc_redirected (__redirect_fabs, __fabs,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __fabs_vis3
+ : __fabs_generic);
+weak_alias (__fabs, fabs)
+#if LONG_DOUBLE_COMPAT (libm, GLIBC_2_0)
+compat_symbol (libm, __fabs, fabsl, GLIBC_2_0);
+#endif
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf-generic.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf-generic.S
new file mode 100644
index 0000000..1d55c95
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf-generic.S
@@ -0,0 +1,4 @@
+#define __fabsf __fabsf_generic
+#undef weak_alias
+#define weak_alias(a, b)
+#include <sysdeps/sparc/sparc32/fpu/s_fabsf.S>
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf.S
deleted file mode 100644
index 0f2e11e..0000000
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf.S
+++ /dev/null
@@ -1,12 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(fabsf)
-
-weak_alias (__fabsf, fabsf)
-
-# undef weak_alias
-# define weak_alias(a, b)
-
-#define __fabsf __fabsf_generic
-
-#include "../../../fpu/s_fabsf.S"
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf.c
new file mode 100644
index 0000000..76711b9
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_fabsf.c
@@ -0,0 +1,29 @@
+/* fabsf ifunc resolver, Linux/sparc32 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <math.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (fabsf) __fabsf_vis3 attribute_hidden;
+extern __typeof (fabsf) __fabsf_generic attribute_hidden;
+
+sparc_libm_ifunc (__fabsf,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __fabsf_vis3
+ : __fabsf_generic);
+weak_alias (__fabsf, fabsf)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=48f6f42a80656fe9684713b4ff39d11ba937be25
commit 48f6f42a80656fe9684713b4ff39d11ba937be25
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 15:34:33 2017 -0300
sparc: refactor sparc32 copysign selector to C
This patch refactors the sparc32 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
s_copysign{f}-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
(sysdep_calls): New rule.
(sysdep_routines): Use sysdep_calls as base.
(libm-sysdep_routines): Add generic rule for symbols shared with
libc. Add s_copysign-generic and s_copysign-generic objects.
* sysdeps/sparc/sparcv9/fpu/multiarch/s_copysign-generic.S: New
file.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_copysign.c: Likewise.
* sysdeps/sparc/sparcv9/fpu/multiarch/s_copysignf-generic.S:
Likewise.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_copysignf.c: Likewise.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_copysign.S: Remove file.
* sysdeps/sparc32/sparcv9/fpu/multiarch/s_copysignf.S: Likewise.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index 0ed5d85..346cc4c 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,19 @@
2017-11-29 Adhemerval Zanella <adhemerval.zanella@linaro.org>
+ * sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
+ (sysdep_calls): New rule.
+ (sysdep_routines): Use sysdep_calls as base.
+ (libm-sysdep_routines): Add generic rule for symbols shared with
+ libc. Add s_copysign-generic and s_copysign-generic objects.
+ * sysdeps/sparc/sparcv9/fpu/multiarch/s_copysign-generic.S: New
+ file.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_copysign.c: Likewise.
+ * sysdeps/sparc/sparcv9/fpu/multiarch/s_copysignf-generic.S:
+ Likewise.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_copysignf.c: Likewise.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_copysign.S: Remove file.
+ * sysdeps/sparc32/sparcv9/fpu/multiarch/s_copysignf.S: Likewise.
+
* sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines):
Add add_n-generic.
* sysdeps/sparc/sparc64/multiarch/add_n-generic.S: New file.
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
index 62bf6f1..b8d1126 100644
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/Makefile
@@ -1,12 +1,19 @@
ifeq ($(subdir),math)
-libm-sysdep_routines += m_copysignf-vis3 m_copysign-vis3 s_fabs-vis3 \
- s_fabsf-vis3 s_llrintf-vis3 s_llrint-vis3 \
+
+# These functions are built both for libc and libm because they're required
+# by printf. While the libc objects have the prefix s_, the libm ones are
+# prefixed with m_.
+sysdep_calls := s_copysignf-vis3 s_copysign-vis3 s_copysignf-generic \
+ s_copysign-generic
+
+sysdep_routines += $(sysdep_calls)
+libm-sysdep_routines += s_fabs-vis3 s_fabsf-vis3 s_llrintf-vis3 s_llrint-vis3 \
s_rintf-vis3 s_rint-vis3 \
s_fmaf-vis3 s_fma-vis3 s_fma-generic s_fmaf-generic \
s_nearbyint-vis3 s_nearbyintf-vis3 \
s_fdimf-vis3 s_fdim-vis3 s_fdim-generic \
- s_fdimf-generic
-sysdep_routines += s_copysignf-vis3 s_copysign-vis3
+ s_fdimf-generic \
+ $(sysdep_calls:s_%=m_%)
CFLAGS-s_fdimf-vis3.c += -Wa,-Av9d -mvis3
CFLAGS-s_fdim-vis3.c += -Wa,-Av9d -mvis3
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign-generic.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign-generic.S
new file mode 100644
index 0000000..55fb0ed
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign-generic.S
@@ -0,0 +1,8 @@
+#include <math_ldbl_opt.h>
+
+#define __copysign __copysign_generic
+#undef weak_alias
+#define weak_alias(a, b)
+#undef compat_symbol
+#define compat_symbol(a, b, c, d)
+#include <sysdeps/sparc/sparc32/fpu/s_copysign.S>
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign.S
deleted file mode 100644
index 5d26430..0000000
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign.S
+++ /dev/null
@@ -1,21 +0,0 @@
-#include <sparc-ifunc.h>
-#include <math_ldbl_opt.h>
-
-SPARC_ASM_VIS3_IFUNC(copysign)
-
-weak_alias (__copysign, copysign)
-#if LONG_DOUBLE_COMPAT (libm, GLIBC_2_0)
-compat_symbol (libm, __copysign, copysignl, GLIBC_2_0);
-#endif
-#if LONG_DOUBLE_COMPAT (libc, GLIBC_2_0)
-compat_symbol (libc, __copysign, copysignl, GLIBC_2_0);
-#endif
-
-# undef weak_alias
-# define weak_alias(a, b)
-# undef compat_symbol
-# define compat_symbol(a, b, c, d)
-
-#define __copysign __copysign_generic
-
-#include "../../../fpu/s_copysign.S"
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign.c
new file mode 100644
index 0000000..f11181b
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysign.c
@@ -0,0 +1,38 @@
+/* copysign ifunc resolver, Linux/sparc32 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#define __copysign __redirect_copysign
+#include <math.h>
+#include <math_ldbl_opt.h>
+#undef __copysign
+#include <sparc-ifunc.h>
+
+extern __typeof (__redirect_copysign) __copysign_vis3 attribute_hidden;
+extern __typeof (__redirect_copysign) __copysign_generic attribute_hidden;
+
+sparc_libm_ifunc_redirected (__redirect_copysign, __copysign,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __copysign_vis3
+ : __copysign_generic);
+weak_alias (__copysign, copysign)
+#if LONG_DOUBLE_COMPAT (libm, GLIBC_2_0)
+compat_symbol (libm, __copysign, copysignl, GLIBC_2_0);
+#endif
+#if LONG_DOUBLE_COMPAT (libc, GLIBC_2_0)
+compat_symbol (libc, __copysign, copysignl, GLIBC_2_0);
+#endif
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf-generic.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf-generic.S
new file mode 100644
index 0000000..ebe0759
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf-generic.S
@@ -0,0 +1,4 @@
+#define __copysignf __copysignf_generic
+#undef weak_alias
+#define weak_alias(a, b)
+#include <sysdeps/sparc/sparc32/fpu/s_copysignf.S>
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf.S
deleted file mode 100644
index cd40955..0000000
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf.S
+++ /dev/null
@@ -1,12 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(copysignf)
-
-weak_alias (__copysignf, copysignf)
-
-# undef weak_alias
-# define weak_alias(a, b)
-
-#define __copysignf __copysignf_generic
-
-#include "../../../fpu/s_copysignf.S"
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf.c b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf.c
new file mode 100644
index 0000000..573c14d
--- /dev/null
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_copysignf.c
@@ -0,0 +1,11 @@
+#include <math.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (copysignf) __copysignf_vis3 attribute_hidden;
+extern __typeof (copysignf) __copysignf_generic attribute_hidden;
+
+sparc_libm_ifunc (__copysignf,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __copysignf_vis3
+ : __copysignf_generic);
+weak_alias (__copysignf, copysignf)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=5311b6f06ed39890c624bab96c0bd3ed9d9e4925
commit 5311b6f06ed39890c624bab96c0bd3ed9d9e4925
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 15:01:58 2017 -0300
sparc: refactor sparc64 __mpn_add_n selector to C
This patch refactors the sparc64 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
add_n-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines):
Add add_n-generic.
* sysdeps/sparc/sparc64/multiarch/add_n-generic.S: New file.
* sysdeps/sparc/sparc64/multiarch/add_n.c: Likewise.
* sysdeps/sparc/sparc64/multiarch/add_n.S: Remove file.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index 774dc88..0ed5d85 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,6 +1,12 @@
2017-11-29 Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines):
+ Add add_n-generic.
+ * sysdeps/sparc/sparc64/multiarch/add_n-generic.S: New file.
+ * sysdeps/sparc/sparc64/multiarch/add_n.c: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/add_n.S: Remove file.
+
+ * sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines):
Add submul_1-generic.
* sysdeps/sparc/sparc64/multiarch/submul_1-generic.S: New file.
* sysdeps/sparc/sparc64/multiarch/submul_1.c: Likewise.
diff --git a/sysdeps/sparc/sparc64/multiarch/Makefile b/sysdeps/sparc/sparc64/multiarch/Makefile
index d62a509..ba8ede1 100644
--- a/sysdeps/sparc/sparc64/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/multiarch/Makefile
@@ -14,8 +14,8 @@ endif
ifeq ($(subdir),stdlib)
sysdep_routines += mul_1-vis3 mul_1-generic addmul_1-vis3 addmul_1-generic \
- submul_1-vis3 submul_1-generic add_n-vis3 sub_n-vis3 \
- sub_n-generic
+ submul_1-vis3 submul_1-generic add_n-vis3 add_n-generic \
+ sub_n-vis3 sub_n-generic
endif
ifeq ($(subdir),math)
diff --git a/sysdeps/sparc/sparc64/multiarch/add_n-generic.S b/sysdeps/sparc/sparc64/multiarch/add_n-generic.S
new file mode 100644
index 0000000..a16e709
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/add_n-generic.S
@@ -0,0 +1,2 @@
+#define __mpn_add_n __mpn_add_n_generic
+#include <sysdeps/sparc/sparc64/add_n.S>
diff --git a/sysdeps/sparc/sparc64/multiarch/add_n.S b/sysdeps/sparc/sparc64/multiarch/add_n.S
deleted file mode 100644
index 9ffaf78..0000000
--- a/sysdeps/sparc/sparc64/multiarch/add_n.S
+++ /dev/null
@@ -1,56 +0,0 @@
-/* Multiple versions of add_n
-
- Copyright (C) 2013-2017 Free Software Foundation, Inc.
- Contributed by David S. Miller (davem@davemloft.net)
- This file is part of the GNU C Library.
-
- The GNU C Library is free software; you can redistribute it and/or
- modify it under the terms of the GNU Lesser General Public
- License as published by the Free Software Foundation; either
- version 2.1 of the License, or (at your option) any later version.
-
- The GNU C Library is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- Lesser General Public License for more details.
-
- You should have received a copy of the GNU Lesser General Public
- License along with the GNU C Library; if not, see
- <http://www.gnu.org/licenses/>. */
-
-#include <sysdep.h>
-
-ENTRY(__mpn_add_n)
- .type __mpn_add_n, @gnu_indirect_function
-# ifdef SHARED
- SETUP_PIC_REG_LEAF(o3, o5)
-# endif
- set HWCAP_SPARC_VIS3, %o1
- andcc %o0, %o1, %g0
- be 1f
- nop
-# ifdef SHARED
- sethi %gdop_hix22(__mpn_add_n_vis3), %o1
- xor %o1, %gdop_lox10(__mpn_add_n_vis3), %o1
-# else
- set __mpn_add_n_vis3, %o1
-# endif
- ba 10f
- nop
-1:
-# ifdef SHARED
- sethi %gdop_hix22(__mpn_add_n_generic), %o1
- xor %o1, %gdop_lox10(__mpn_add_n_generic), %o1
-# else
- set __mpn_add_n_generic, %o1
-# endif
-10:
-# ifdef SHARED
- add %o3, %o1, %o1
-# endif
- retl
- mov %o1, %o0
-END(__mpn_add_n)
-
-#define __mpn_add_n __mpn_add_n_generic
-#include "../add_n.S"
diff --git a/sysdeps/sparc/sparc64/multiarch/add_n.c b/sysdeps/sparc/sparc64/multiarch/add_n.c
new file mode 100644
index 0000000..6b509d1
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/add_n.c
@@ -0,0 +1,28 @@
+/* __mpn_add_n ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <gmp.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (mpn_add_n) __mpn_add_n_vis3 attribute_hidden;
+extern __typeof (mpn_add_n) __mpn_add_n_generic attribute_hidden;
+
+sparc_libm_ifunc (__mpn_add_n,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __mpn_add_n_vis3
+ : __mpn_add_n_generic)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=83fd86e9c5c64b59dc67bbacf3922d5744e821cd
commit 83fd86e9c5c64b59dc67bbacf3922d5744e821cd
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 14:59:09 2017 -0300
sparc: refactor sparc64 __mpn_submul_1 selector to C
This patch refactors the sparc64 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
submul_1-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines):
Add submul_1-generic.
* sysdeps/sparc/sparc64/multiarch/submul_1-generic.S: New file.
* sysdeps/sparc/sparc64/multiarch/submul_1.c: Likewise.
* sysdeps/sparc/sparc64/multiarch/submul_1.S: Remove file.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index cb0ae64..774dc88 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,6 +1,12 @@
2017-11-29 Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines):
+ Add submul_1-generic.
+ * sysdeps/sparc/sparc64/multiarch/submul_1-generic.S: New file.
+ * sysdeps/sparc/sparc64/multiarch/submul_1.c: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/submul_1.S: Remove file.
+
+ * sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines):
Add addmul_1-generic.
* sysdeps/sparc/sparc64/multiarch/addmul_1-generic.S: New file.
* sysdeps/sparc/sparc64/multiarch/addmul_1.c: Likewise.
diff --git a/sysdeps/sparc/sparc64/multiarch/Makefile b/sysdeps/sparc/sparc64/multiarch/Makefile
index fbd7e22..d62a509 100644
--- a/sysdeps/sparc/sparc64/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/multiarch/Makefile
@@ -14,7 +14,8 @@ endif
ifeq ($(subdir),stdlib)
sysdep_routines += mul_1-vis3 mul_1-generic addmul_1-vis3 addmul_1-generic \
- submul_1-vis3 add_n-vis3 sub_n-vis3 sub_n-generic
+ submul_1-vis3 submul_1-generic add_n-vis3 sub_n-vis3 \
+ sub_n-generic
endif
ifeq ($(subdir),math)
diff --git a/sysdeps/sparc/sparc64/multiarch/submul_1-generic.S b/sysdeps/sparc/sparc64/multiarch/submul_1-generic.S
new file mode 100644
index 0000000..4c15360
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/submul_1-generic.S
@@ -0,0 +1,2 @@
+#define __mpn_submul_1 __mpn_submul_1_generic
+#include <sysdeps/sparc/sparc64/submul_1.S>
diff --git a/sysdeps/sparc/sparc64/multiarch/submul_1.S b/sysdeps/sparc/sparc64/multiarch/submul_1.S
deleted file mode 100644
index 3c297d9..0000000
--- a/sysdeps/sparc/sparc64/multiarch/submul_1.S
+++ /dev/null
@@ -1,56 +0,0 @@
-/* Multiple versions of submul_1
-
- Copyright (C) 2013-2017 Free Software Foundation, Inc.
- Contributed by David S. Miller (davem@davemloft.net)
- This file is part of the GNU C Library.
-
- The GNU C Library is free software; you can redistribute it and/or
- modify it under the terms of the GNU Lesser General Public
- License as published by the Free Software Foundation; either
- version 2.1 of the License, or (at your option) any later version.
-
- The GNU C Library is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- Lesser General Public License for more details.
-
- You should have received a copy of the GNU Lesser General Public
- License along with the GNU C Library; if not, see
- <http://www.gnu.org/licenses/>. */
-
-#include <sysdep.h>
-
-ENTRY(__mpn_submul_1)
- .type __mpn_submul_1, @gnu_indirect_function
-# ifdef SHARED
- SETUP_PIC_REG_LEAF(o3, o5)
-# endif
- set HWCAP_SPARC_VIS3, %o1
- andcc %o0, %o1, %g0
- be 1f
- nop
-# ifdef SHARED
- sethi %gdop_hix22(__mpn_submul_1_vis3), %o1
- xor %o1, %gdop_lox10(__mpn_submul_1_vis3), %o1
-# else
- set __mpn_submul_1_vis3, %o1
-# endif
- ba 10f
- nop
-1:
-# ifdef SHARED
- sethi %gdop_hix22(__mpn_submul_1_generic), %o1
- xor %o1, %gdop_lox10(__mpn_submul_1_generic), %o1
-# else
- set __mpn_submul_1_generic, %o1
-# endif
-10:
-# ifdef SHARED
- add %o3, %o1, %o1
-# endif
- retl
- mov %o1, %o0
-END(__mpn_submul_1)
-
-#define __mpn_submul_1 __mpn_submul_1_generic
-#include "../submul_1.S"
diff --git a/sysdeps/sparc/sparc64/multiarch/submul_1.c b/sysdeps/sparc/sparc64/multiarch/submul_1.c
new file mode 100644
index 0000000..ab9433f
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/submul_1.c
@@ -0,0 +1,28 @@
+/* __mpn_submul_1 ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <gmp.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (mpn_submul_1) __mpn_submul_1_vis3 attribute_hidden;
+extern __typeof (mpn_submul_1) __mpn_submul_1_generic attribute_hidden;
+
+sparc_libm_ifunc (__mpn_submul_1,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __mpn_submul_1_vis3
+ : __mpn_submul_1_generic)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=a6a726fe6539b9488af76759d7b1156568499533
commit a6a726fe6539b9488af76759d7b1156568499533
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 14:56:29 2017 -0300
sparc: refactor sparc64 __mpn_addmul_1 selector to C
This patch refactors the sparc64 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
addmul_1-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines):
Add addmul_1-generic.
* sysdeps/sparc/sparc64/multiarch/addmul_1-generic.S: New file.
* sysdeps/sparc/sparc64/multiarch/addmul_1.c: Likewise.
* sysdeps/sparc/sparc64/multiarch/addmul_1.S: Remove file.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index 161f794..cb0ae64 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,6 +1,12 @@
2017-11-29 Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines):
+ Add addmul_1-generic.
+ * sysdeps/sparc/sparc64/multiarch/addmul_1-generic.S: New file.
+ * sysdeps/sparc/sparc64/multiarch/addmul_1.c: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/addmul_1.S: Remove file.
+
+ * sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines):
Add sub_n-generic.
* sysdeps/sparc/sparc64/multiarch/sub_n-generic.S: New file.
* sysdeps/sparc/sparc64/multiarch/sub_n.c: Likewise.
diff --git a/sysdeps/sparc/sparc64/multiarch/Makefile b/sysdeps/sparc/sparc64/multiarch/Makefile
index 10fe54f..fbd7e22 100644
--- a/sysdeps/sparc/sparc64/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/multiarch/Makefile
@@ -13,8 +13,8 @@ sysdep_routines += memcpy-ultra3 memcpy-niagara1 memcpy-niagara2 \
endif
ifeq ($(subdir),stdlib)
-sysdep_routines += mul_1-vis3 mul_1-generic addmul_1-vis3 submul_1-vis3 \
- add_n-vis3 sub_n-vis3 sub_n-generic
+sysdep_routines += mul_1-vis3 mul_1-generic addmul_1-vis3 addmul_1-generic \
+ submul_1-vis3 add_n-vis3 sub_n-vis3 sub_n-generic
endif
ifeq ($(subdir),math)
diff --git a/sysdeps/sparc/sparc64/multiarch/addmul_1-generic.S b/sysdeps/sparc/sparc64/multiarch/addmul_1-generic.S
new file mode 100644
index 0000000..5bf1da7
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/addmul_1-generic.S
@@ -0,0 +1,2 @@
+#define __mpn_addmul_1 __mpn_addmul_1_generic
+#include <sysdeps/sparc/sparc64/addmul_1.S>
diff --git a/sysdeps/sparc/sparc64/multiarch/addmul_1.S b/sysdeps/sparc/sparc64/multiarch/addmul_1.S
deleted file mode 100644
index dcb1da1..0000000
--- a/sysdeps/sparc/sparc64/multiarch/addmul_1.S
+++ /dev/null
@@ -1,56 +0,0 @@
-/* Multiple versions of addmul_1
-
- Copyright (C) 2013-2017 Free Software Foundation, Inc.
- Contributed by David S. Miller (davem@davemloft.net)
- This file is part of the GNU C Library.
-
- The GNU C Library is free software; you can redistribute it and/or
- modify it under the terms of the GNU Lesser General Public
- License as published by the Free Software Foundation; either
- version 2.1 of the License, or (at your option) any later version.
-
- The GNU C Library is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- Lesser General Public License for more details.
-
- You should have received a copy of the GNU Lesser General Public
- License along with the GNU C Library; if not, see
- <http://www.gnu.org/licenses/>. */
-
-#include <sysdep.h>
-
-ENTRY(__mpn_addmul_1)
- .type __mpn_addmul_1, @gnu_indirect_function
-# ifdef SHARED
- SETUP_PIC_REG_LEAF(o3, o5)
-# endif
- set HWCAP_SPARC_VIS3, %o1
- andcc %o0, %o1, %g0
- be 1f
- nop
-# ifdef SHARED
- sethi %gdop_hix22(__mpn_addmul_1_vis3), %o1
- xor %o1, %gdop_lox10(__mpn_addmul_1_vis3), %o1
-# else
- set __mpn_addmul_1_vis3, %o1
-# endif
- ba 10f
- nop
-1:
-# ifdef SHARED
- sethi %gdop_hix22(__mpn_addmul_1_generic), %o1
- xor %o1, %gdop_lox10(__mpn_addmul_1_generic), %o1
-# else
- set __mpn_addmul_1_generic, %o1
-# endif
-10:
-# ifdef SHARED
- add %o3, %o1, %o1
-# endif
- retl
- mov %o1, %o0
-END(__mpn_addmul_1)
-
-#define __mpn_addmul_1 __mpn_addmul_1_generic
-#include "../addmul_1.S"
diff --git a/sysdeps/sparc/sparc64/multiarch/addmul_1.c b/sysdeps/sparc/sparc64/multiarch/addmul_1.c
new file mode 100644
index 0000000..78bc34d
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/addmul_1.c
@@ -0,0 +1,28 @@
+/* __mpn_addmul_1 ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <gmp.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (mpn_addmul_1) __mpn_addmul_1_vis3 attribute_hidden;
+extern __typeof (mpn_addmul_1) __mpn_addmul_1_generic attribute_hidden;
+
+sparc_libm_ifunc (__mpn_addmul_1,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __mpn_addmul_1_vis3
+ : __mpn_addmul_1_generic)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=b0a5861e014cfb4dbeba7c6ac63575400e16341a
commit b0a5861e014cfb4dbeba7c6ac63575400e16341a
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 14:53:13 2017 -0300
sparc: refactor sparc64 __mpn_sub_n selector to C
This patch refactors the sparc64 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
sub_n-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines):
Add sub_n-generic.
* sysdeps/sparc/sparc64/multiarch/sub_n-generic.S: New file.
* sysdeps/sparc/sparc64/multiarch/sub_n.c: Likewise.
* sysdeps/sparc/sparc64/multiarch/sub_n.S: Remove file.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index c2ae8d3..161f794 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,6 +1,12 @@
2017-11-29 Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines):
+ Add sub_n-generic.
+ * sysdeps/sparc/sparc64/multiarch/sub_n-generic.S: New file.
+ * sysdeps/sparc/sparc64/multiarch/sub_n.c: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/sub_n.S: Remove file.
+
+ * sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines):
Add mul_1-generic.
* sysdeps/sparc/sparc64/multiarch/mul_1-generic.S: New file.
* sysdeps/sparc/sparc64/multiarch/mul_1.c: Likewise.
diff --git a/sysdeps/sparc/sparc64/multiarch/Makefile b/sysdeps/sparc/sparc64/multiarch/Makefile
index 2338213..10fe54f 100644
--- a/sysdeps/sparc/sparc64/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/multiarch/Makefile
@@ -14,7 +14,7 @@ endif
ifeq ($(subdir),stdlib)
sysdep_routines += mul_1-vis3 mul_1-generic addmul_1-vis3 submul_1-vis3 \
- add_n-vis3 sub_n-vis3
+ add_n-vis3 sub_n-vis3 sub_n-generic
endif
ifeq ($(subdir),math)
diff --git a/sysdeps/sparc/sparc64/multiarch/sub_n-generic.S b/sysdeps/sparc/sparc64/multiarch/sub_n-generic.S
new file mode 100644
index 0000000..7cece93
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/sub_n-generic.S
@@ -0,0 +1,2 @@
+#define __mpn_sub_n __mpn_sub_n_generic
+#include <sysdeps/sparc/sparc64/sub_n.S>
diff --git a/sysdeps/sparc/sparc64/multiarch/sub_n.S b/sysdeps/sparc/sparc64/multiarch/sub_n.S
deleted file mode 100644
index d20a286..0000000
--- a/sysdeps/sparc/sparc64/multiarch/sub_n.S
+++ /dev/null
@@ -1,56 +0,0 @@
-/* Multiple versions of sub_n
-
- Copyright (C) 2013-2017 Free Software Foundation, Inc.
- Contributed by David S. Miller (davem@davemloft.net)
- This file is part of the GNU C Library.
-
- The GNU C Library is free software; you can redistribute it and/or
- modify it under the terms of the GNU Lesser General Public
- License as published by the Free Software Foundation; either
- version 2.1 of the License, or (at your option) any later version.
-
- The GNU C Library is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- Lesser General Public License for more details.
-
- You should have received a copy of the GNU Lesser General Public
- License along with the GNU C Library; if not, see
- <http://www.gnu.org/licenses/>. */
-
-#include <sysdep.h>
-
-ENTRY(__mpn_sub_n)
- .type __mpn_sub_n, @gnu_indirect_function
-# ifdef SHARED
- SETUP_PIC_REG_LEAF(o3, o5)
-# endif
- set HWCAP_SPARC_VIS3, %o1
- andcc %o0, %o1, %g0
- be 1f
- nop
-# ifdef SHARED
- sethi %gdop_hix22(__mpn_sub_n_vis3), %o1
- xor %o1, %gdop_lox10(__mpn_sub_n_vis3), %o1
-# else
- set __mpn_sub_n_vis3, %o1
-# endif
- ba 10f
- nop
-1:
-# ifdef SHARED
- sethi %gdop_hix22(__mpn_sub_n_generic), %o1
- xor %o1, %gdop_lox10(__mpn_sub_n_generic), %o1
-# else
- set __mpn_sub_n_generic, %o1
-# endif
-10:
-# ifdef SHARED
- add %o3, %o1, %o1
-# endif
- retl
- mov %o1, %o0
-END(__mpn_sub_n)
-
-#define __mpn_sub_n __mpn_sub_n_generic
-#include "../sub_n.S"
diff --git a/sysdeps/sparc/sparc64/multiarch/sub_n.c b/sysdeps/sparc/sparc64/multiarch/sub_n.c
new file mode 100644
index 0000000..838d901
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/sub_n.c
@@ -0,0 +1,28 @@
+/* __mpn_sub_n ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <gmp.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (mpn_sub_n) __mpn_sub_n_vis3 attribute_hidden;
+extern __typeof (mpn_sub_n) __mpn_sub_n_generic attribute_hidden;
+
+sparc_libm_ifunc (__mpn_sub_n,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __mpn_sub_n_vis3
+ : __mpn_sub_n_generic)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=8cc3124d56b8e39b98ab5c36785eefc9cb2b6e87
commit 8cc3124d56b8e39b98ab5c36785eefc9cb2b6e87
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 14:52:51 2017 -0300
sparc: refactor sparc64 __mpn_mul_1 selector to C
This patch refactors the sparc64 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
mul_1-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines):
Add mul_1-generic.
* sysdeps/sparc/sparc64/multiarch/mul_1-generic.S: New file.
* sysdeps/sparc/sparc64/multiarch/mul_1.c: Likewise.
* sysdeps/sparc/sparc64/multiarch/mul_1.S: Remove file.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index b417fc3..c2ae8d3 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,11 @@
2017-11-29 Adhemerval Zanella <adhemerval.zanella@linaro.org>
+ * sysdeps/sparc/sparc64/multiarch/Makefile (sysdep_routines):
+ Add mul_1-generic.
+ * sysdeps/sparc/sparc64/multiarch/mul_1-generic.S: New file.
+ * sysdeps/sparc/sparc64/multiarch/mul_1.c: Likewise.
+ * sysdeps/sparc/sparc64/multiarch/mul_1.S: Remove file.
+
* sysdeps/sparc/sparc64/fpu/multiarch/Makefile
(libm-sysdep_routines): Add s_rintf-generic and s_rint-generic
objects.
diff --git a/sysdeps/sparc/sparc64/multiarch/Makefile b/sysdeps/sparc/sparc64/multiarch/Makefile
index 6e90cba..2338213 100644
--- a/sysdeps/sparc/sparc64/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/multiarch/Makefile
@@ -13,7 +13,8 @@ sysdep_routines += memcpy-ultra3 memcpy-niagara1 memcpy-niagara2 \
endif
ifeq ($(subdir),stdlib)
-sysdep_routines += mul_1-vis3 addmul_1-vis3 submul_1-vis3 add_n-vis3 sub_n-vis3
+sysdep_routines += mul_1-vis3 mul_1-generic addmul_1-vis3 submul_1-vis3 \
+ add_n-vis3 sub_n-vis3
endif
ifeq ($(subdir),math)
diff --git a/sysdeps/sparc/sparc64/multiarch/mul_1-generic.S b/sysdeps/sparc/sparc64/multiarch/mul_1-generic.S
new file mode 100644
index 0000000..f1b7e60
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/mul_1-generic.S
@@ -0,0 +1,2 @@
+#define __mpn_mul_1 __mpn_mul_1_generic
+#include <sysdeps/sparc/sparc64/mul_1.S>
diff --git a/sysdeps/sparc/sparc64/multiarch/mul_1.S b/sysdeps/sparc/sparc64/multiarch/mul_1.S
deleted file mode 100644
index 75fca93..0000000
--- a/sysdeps/sparc/sparc64/multiarch/mul_1.S
+++ /dev/null
@@ -1,56 +0,0 @@
-/* Multiple versions of mul_1
-
- Copyright (C) 2013-2017 Free Software Foundation, Inc.
- Contributed by David S. Miller (davem@davemloft.net)
- This file is part of the GNU C Library.
-
- The GNU C Library is free software; you can redistribute it and/or
- modify it under the terms of the GNU Lesser General Public
- License as published by the Free Software Foundation; either
- version 2.1 of the License, or (at your option) any later version.
-
- The GNU C Library is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
- Lesser General Public License for more details.
-
- You should have received a copy of the GNU Lesser General Public
- License along with the GNU C Library; if not, see
- <http://www.gnu.org/licenses/>. */
-
-#include <sysdep.h>
-
-ENTRY(__mpn_mul_1)
- .type __mpn_mul_1, @gnu_indirect_function
-# ifdef SHARED
- SETUP_PIC_REG_LEAF(o3, o5)
-# endif
- set HWCAP_SPARC_VIS3, %o1
- andcc %o0, %o1, %g0
- be 1f
- nop
-# ifdef SHARED
- sethi %gdop_hix22(__mpn_mul_1_vis3), %o1
- xor %o1, %gdop_lox10(__mpn_mul_1_vis3), %o1
-# else
- set __mpn_mul_1_vis3, %o1
-# endif
- ba 10f
- nop
-1:
-# ifdef SHARED
- sethi %gdop_hix22(__mpn_mul_1_generic), %o1
- xor %o1, %gdop_lox10(__mpn_mul_1_generic), %o1
-# else
- set __mpn_mul_1_generic, %o1
-# endif
-10:
-# ifdef SHARED
- add %o3, %o1, %o1
-# endif
- retl
- mov %o1, %o0
-END(__mpn_mul_1)
-
-#define __mpn_mul_1 __mpn_mul_1_generic
-#include "../mul_1.S"
diff --git a/sysdeps/sparc/sparc64/multiarch/mul_1.c b/sysdeps/sparc/sparc64/multiarch/mul_1.c
new file mode 100644
index 0000000..98f0ccc
--- /dev/null
+++ b/sysdeps/sparc/sparc64/multiarch/mul_1.c
@@ -0,0 +1,28 @@
+/* __mpn_mul_1 ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <gmp.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (mpn_mul_1) __mpn_mul_1_vis3 attribute_hidden;
+extern __typeof (mpn_mul_1) __mpn_mul_1_generic attribute_hidden;
+
+sparc_libm_ifunc (__mpn_mul_1,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __mpn_mul_1_vis3
+ : __mpn_mul_1_generic)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=4937706423e043851cf6f91cf6a42fff15ecdcbc
commit 4937706423e043851cf6f91cf6a42fff15ecdcbc
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 13:42:07 2017 -0300
sparc: refactor sparc64 rint{f} selector to C
This patch refactors the sparc64 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
s_rint{f}-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc64/fpu/multiarch/Makefile
(libm-sysdep_routines): Add s_rintf-generic and s_rint-generic
objects.
* sysdeps/sparc/sparc64/fpu/multiarch/s_rint-generic.S: New file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_rint.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_rintf-generic.S: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_rint.S: Remove file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.S: Likewise.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index 3d0be9b..b417fc3 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,6 +1,16 @@
2017-11-29 Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/sparc/sparc64/fpu/multiarch/Makefile
+ (libm-sysdep_routines): Add s_rintf-generic and s_rint-generic
+ objects.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_rint-generic.S: New file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_rint.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_rintf-generic.S: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_rint.S: Remove file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.S: Likewise.
+
+ * sysdeps/sparc/sparc64/fpu/multiarch/Makefile
(libm-sysdep_routines): Add s_lrint-generic and s_lrintf-generic
objects.
* sysdeps/sparc/sparc64/fpu/multiarch/s_lrint-generic.S: New file.
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
index d0a87d1..3321e1d 100644
--- a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
@@ -11,6 +11,7 @@ sysdep_calls := s_signbitf-vis3 s_signbit-vis3 s_signbitf-generic \
sysdep_routines += $(sysdep_calls)
libm-sysdep_routines += s_lrintf-vis3 s_lrint-vis3 s_lrintf-generic \
s_lrint-generic s_rintf-vis3 s_rint-vis3 \
+ s_rintf-generic s_rint-generic \
s_fmaf-vis3 s_fma-vis3 s_fmaf-generic s_fma-generic \
s_nearbyint-vis3 s_nearbyintf-vis3 \
s_nearbyint-generic s_nearbyintf-generic \
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_rint-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_rint-generic.S
new file mode 100644
index 0000000..d927434
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_rint-generic.S
@@ -0,0 +1,4 @@
+#define __rint __rint_generic
+#undef weak_alias
+#define weak_alias(a, b)
+#include <sysdeps/sparc/sparc64/fpu/s_rint.S>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_rint.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_rint.S
deleted file mode 100644
index cc980eb..0000000
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_rint.S
+++ /dev/null
@@ -1,12 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(rint)
-
-weak_alias (__rint, rint)
-
-# undef weak_alias
-# define weak_alias(a, b)
-
-#define __rint __rint_generic
-
-#include "../s_rint.S"
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_rint.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_rint.c
new file mode 100644
index 0000000..ca566c2
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_rint.c
@@ -0,0 +1,29 @@
+/* rint ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <math.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (rint) __rint_vis3 attribute_hidden;
+extern __typeof (rint) __rint_generic attribute_hidden;
+
+sparc_libm_ifunc (__rint,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __rint_vis3
+ : __rint_generic);
+weak_alias (__rint, rint)
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_rintf-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_rintf-generic.S
new file mode 100644
index 0000000..30da5f0
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_rintf-generic.S
@@ -0,0 +1,4 @@
+#define __rintf __rintf_generic
+#undef weak_alias
+#define weak_alias(a, b)
+#include <sysdeps/sparc/sparc64/fpu/s_rintf.S>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.S
deleted file mode 100644
index 38fd936..0000000
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.S
+++ /dev/null
@@ -1,12 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(rintf)
-
-weak_alias (__rintf, rintf)
-
-# undef weak_alias
-# define weak_alias(a, b)
-
-#define __rintf __rintf_generic
-
-#include "../s_rintf.S"
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.c
new file mode 100644
index 0000000..67f166c
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_rintf.c
@@ -0,0 +1,29 @@
+/* rintf ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <math.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (rintf) __rintf_vis3 attribute_hidden;
+extern __typeof (rintf) __rintf_generic attribute_hidden;
+
+sparc_libm_ifunc (__rintf,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __rintf_vis3
+ : __rintf_generic);
+weak_alias (__rintf, rintf)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=12b2fe3215bab57525c413120b20398a8982e627
commit 12b2fe3215bab57525c413120b20398a8982e627
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 13:20:00 2017 -0300
sparc: refactor sparc64 lrint{f} selector to C
This patch refactors the sparc64 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
s_lrint{f}-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc64/fpu/multiarch/Makefile
(libm-sysdep_routines): Add s_lrint-generic and s_lrint-generic
objects.
* sysdeps/sparc/sparc64/fpu/multiarch/s_lrint-generic.S: New file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf-generic.S: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.S: Remove file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.S: Likewise.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index b2f94a1..3d0be9b 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,6 +1,16 @@
2017-11-29 Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/sparc/sparc64/fpu/multiarch/Makefile
+ (libm-sysdep_routines): Add s_lrint-generic and s_lrintf-generic
+ objects.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_lrint-generic.S: New file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf-generic.S: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.S: Remove file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.S: Likewise.
+
+ * sysdeps/sparc/sparc64/fpu/multiarch/Makefile
(libm-sysdep_routines): Add s_nearbyint-generic and
s_nearbyintf-generic objects.
* sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-generic.S: New file.
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
index 6062af0..d0a87d1 100644
--- a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
@@ -9,7 +9,8 @@ sysdep_calls := s_signbitf-vis3 s_signbit-vis3 s_signbitf-generic \
s_isnanf-vis3 s_isnan-vis3 s_isnanf-generic s_isnan-generic
sysdep_routines += $(sysdep_calls)
-libm-sysdep_routines += s_lrintf-vis3 s_lrint-vis3 s_rintf-vis3 s_rint-vis3 \
+libm-sysdep_routines += s_lrintf-vis3 s_lrint-vis3 s_lrintf-generic \
+ s_lrint-generic s_rintf-vis3 s_rint-vis3 \
s_fmaf-vis3 s_fma-vis3 s_fmaf-generic s_fma-generic \
s_nearbyint-vis3 s_nearbyintf-vis3 \
s_nearbyint-generic s_nearbyintf-generic \
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_lrint-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_lrint-generic.S
new file mode 100644
index 0000000..e6ab999
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_lrint-generic.S
@@ -0,0 +1,6 @@
+#define __lrint __lrint_generic
+#undef weak_alias
+#define weak_alias(a,b)
+#undef strong_alias
+#define strong_alias(a,b)
+#include <sysdeps/sparc/sparc64/fpu/s_lrint.S>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.S
deleted file mode 100644
index 94af8f0..0000000
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.S
+++ /dev/null
@@ -1,17 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(lrint)
-
-weak_alias (__lrint, lrint)
-
-strong_alias (__lrint, __llrint)
-weak_alias (__llrint, llrint)
-
-# undef weak_alias
-# define weak_alias(a, b)
-# undef strong_alias
-# define strong_alias(a, b)
-
-#define __lrint __lrint_generic
-
-#include "../s_lrint.S"
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.c
new file mode 100644
index 0000000..557f0d6
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_lrint.c
@@ -0,0 +1,39 @@
+/* lrint/llrint ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#define lrint __redirect_lrint
+#define llrint __redirect_llrint
+#define __lrint __redirect___lrint
+#define __llrint __redirect___llrint
+#include <math.h>
+#undef lrint
+#undef llrint
+#undef __lrint
+#undef __llrint
+#include <sparc-ifunc.h>
+
+extern __typeof (__redirect_lrint) __lrint_vis3 attribute_hidden;
+extern __typeof (__redirect_lrint) __lrint_generic attribute_hidden;
+
+sparc_libm_ifunc_redirected (__redirect_lrint, __lrint,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __lrint_vis3
+ : __lrint_generic);
+weak_alias (__lrint, lrint)
+strong_alias (__lrint, __llrint)
+weak_alias (__llrint, llrint)
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf-generic.S
new file mode 100644
index 0000000..4cfbf4a
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf-generic.S
@@ -0,0 +1,6 @@
+#define __lrintf __lrintf_generic
+#undef weak_alias
+#define weak_alias(a,b)
+#undef strong_alias
+#define strong_alias(a,b)
+#include <sysdeps/sparc/sparc64/fpu/s_lrintf.S>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.S
deleted file mode 100644
index e6ea406..0000000
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.S
+++ /dev/null
@@ -1,17 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(lrintf)
-
-weak_alias (__lrintf, lrintf)
-
-strong_alias (__lrintf, __llrintf)
-weak_alias (__llrintf, llrintf)
-
-# undef weak_alias
-# define weak_alias(a, b)
-# undef strong_alias
-# define strong_alias(a, b)
-
-#define __lrintf __lrintf_generic
-
-#include "../s_lrintf.S"
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.c
new file mode 100644
index 0000000..9b1a569
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_lrintf.c
@@ -0,0 +1,39 @@
+/* lrintf/llrintf ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#define lrintf __redirect_lrintf
+#define llrintf __redirect_llrintf
+#define __lrintf __redirect_lrintf
+#define __llrintf __redirect_llrintf
+#include <math.h>
+#undef lrintf
+#undef llrintf
+#undef __lrintf
+#undef __llrintf
+#include <sparc-ifunc.h>
+
+extern __typeof (__redirect_lrintf) __lrintf_vis3 attribute_hidden;
+extern __typeof (__redirect_lrintf) __lrintf_generic attribute_hidden;
+
+sparc_libm_ifunc_redirected (__redirect_lrintf, __lrintf,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __lrintf_vis3
+ : __lrintf_generic);
+weak_alias (__lrintf, lrintf)
+strong_alias (__lrintf, __llrintf)
+weak_alias (__llrintf, llrintf)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=9bf4464923f079ad81a87fb1e2fed715024dd7cc
commit 9bf4464923f079ad81a87fb1e2fed715024dd7cc
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 12:00:28 2017 -0300
sparc: refactor sparc64 nearbyint{f} selector to C
This patch refactors the sparc64 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
s_nearbyint{f}-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc64/fpu/multiarch/Makefile
(libm-sysdep_routines): Add s_nearbyint-generic and
s_nearbyintf-generic objects.
* sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-generic.S: New file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-generic.S: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.S: Remove file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.S: Likewise.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index 70fe1df..b2f94a1 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,15 @@
2017-11-29 Adhemerval Zanella <adhemerval.zanella@linaro.org>
+ * sysdeps/sparc/sparc64/fpu/multiarch/Makefile
+ (libm-sysdep_routines): Add s_nearbyint-generic and
+ s_nearbyintf-generic objects.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-generic.S: New file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-generic.S: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.S: Remove file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.S: Likewise.
+
* sysdeps/sparc/sparc64/fpu/multiarch/Makefile (sysdeps_calls):
Add s_finitef-generic and s_finite-generic objects.
* sysdeps/sparc/sparc64/fpu/multiarch/s_finite-generic.S: New file.
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
index d19a446..6062af0 100644
--- a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
@@ -12,6 +12,7 @@ sysdep_routines += $(sysdep_calls)
libm-sysdep_routines += s_lrintf-vis3 s_lrint-vis3 s_rintf-vis3 s_rint-vis3 \
s_fmaf-vis3 s_fma-vis3 s_fmaf-generic s_fma-generic \
s_nearbyint-vis3 s_nearbyintf-vis3 \
+ s_nearbyint-generic s_nearbyintf-generic \
s_ceilf-vis3 s_ceil-vis3 s_ceilf-generic \
s_ceil-generic s_floorf-vis3 s_floor-vis3 \
s_floorf-generic s_floor-generic s_truncf-vis3 \
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-generic.S
new file mode 100644
index 0000000..efe2383
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-generic.S
@@ -0,0 +1,4 @@
+#define __nearbyint __nearbyint_generic
+#undef weak_alias
+#define weak_alias(a,b)
+#include <sysdeps/sparc/sparc64/fpu/s_nearbyint.S>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.S
deleted file mode 100644
index bb75ab3..0000000
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.S
+++ /dev/null
@@ -1,12 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(nearbyint)
-
-weak_alias (__nearbyint, nearbyint)
-
-# undef weak_alias
-# define weak_alias(a, b)
-
-#define __nearbyint __nearbyint_generic
-
-#include "../s_nearbyint.S"
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.c
new file mode 100644
index 0000000..3ccb3be
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint.c
@@ -0,0 +1,29 @@
+/* nearbyint ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <math.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (nearbyint) __nearbyint_vis3 attribute_hidden;
+extern __typeof (nearbyint) __nearbyint_generic attribute_hidden;
+
+sparc_libm_ifunc (__nearbyint,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __nearbyint_vis3
+ : __nearbyint_generic);
+weak_alias (__nearbyint, nearbyint)
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-generic.S
new file mode 100644
index 0000000..a2e38e9
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-generic.S
@@ -0,0 +1,4 @@
+#define __nearbyintf __nearbyintf_generic
+#undef weak_alias
+#define weak_alias(a,b)
+#include <sysdeps/sparc/sparc64/fpu/s_nearbyintf.S>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.S
deleted file mode 100644
index 95100c1..0000000
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.S
+++ /dev/null
@@ -1,12 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(nearbyintf)
-
-weak_alias (__nearbyintf, nearbyintf)
-
-# undef weak_alias
-# define weak_alias(a, b)
-
-#define __nearbyintf __nearbyintf_generic
-
-#include "../s_nearbyintf.S"
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.c
new file mode 100644
index 0000000..23e3c13
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf.c
@@ -0,0 +1,29 @@
+/* nearbyintf ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <math.h>
+#include <sparc-ifunc.h>
+
+extern __typeof (nearbyintf) __nearbyintf_vis3 attribute_hidden;
+extern __typeof (nearbyintf) __nearbyintf_generic attribute_hidden;
+
+sparc_libm_ifunc (__nearbyintf,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __nearbyintf_vis3
+ : __nearbyintf_generic);
+weak_alias (__nearbyintf, nearbyintf)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=f8a7969c78f6e13d4a5a90a53b96a196f0861376
commit f8a7969c78f6e13d4a5a90a53b96a196f0861376
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 11:48:57 2017 -0300
sparc: refactor sparc64 finite{f} selector to C
This patch refactors the sparc64 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
s_finite{f}-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc64/fpu/multiarch/Makefile (sysdeps_calls):
Add s_finitef-generic and s_finite-generic objects.
* sysdeps/sparc/sparc64/fpu/multiarch/s_finite-generic.S: New file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_finite.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_finitef-generic.S: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_finite.S: Remove file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.S: Remove file.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index 5ecb7ed..70fe1df 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,6 +1,15 @@
2017-11-29 Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/sparc/sparc64/fpu/multiarch/Makefile (sysdeps_calls):
+ Add s_finitef-generic and s_finite-generic objects.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_finite-generic.S: New file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_finite.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_finitef-generic.S: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_finite.S: Remove file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.S: Remove file.
+
+ * sysdeps/sparc/sparc64/fpu/multiarch/Makefile (sysdeps_calls):
Add s_isinff-generic and s_isinf-generic objects.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isinf-generic.S: New file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.c: Likewise.
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
index f0c8fa3..d19a446 100644
--- a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
@@ -4,6 +4,7 @@ ifeq ($(subdir),math)
# prefixed with m_.
sysdep_calls := s_signbitf-vis3 s_signbit-vis3 s_signbitf-generic \
s_signbit-generic s_finitef-vis3 s_finite-vis3 \
+ s_finitef-generic s_finite-generic \
s_isinff-vis3 s_isinf-vis3 s_isinff-generic s_isinf-generic \
s_isnanf-vis3 s_isnan-vis3 s_isnanf-generic s_isnan-generic
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_finite-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_finite-generic.S
new file mode 100644
index 0000000..dfbf32f
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_finite-generic.S
@@ -0,0 +1,6 @@
+#define __finite __finite_generic
+#undef hidden_def
+#define hidden_def(a)
+#undef weak_alias
+#define weak_alias(a,b)
+#include <sysdeps/sparc/sparc64/fpu/s_finite.S>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_finite.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_finite.S
deleted file mode 100644
index 78406a6..0000000
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_finite.S
+++ /dev/null
@@ -1,15 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(finite)
-
-hidden_def (__finite)
-weak_alias (__finite, finite)
-
-# undef weak_alias
-# define weak_alias(a, b)
-# undef hidden_def
-# define hidden_def(a)
-
-#define __finite __finite_generic
-
-#include "../s_finite.S"
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_finite.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_finite.c
new file mode 100644
index 0000000..22e46c4
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_finite.c
@@ -0,0 +1,37 @@
+/* finite ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#define __finite __redirect___finite
+#define __finitef __redirect___finitef
+#define __finitel __redirect___finitel
+#include <math.h>
+#undef __finite
+#undef __finitef
+#undef __finitel
+#include <sparc-ifunc.h>
+
+extern __typeof (finite) __finite_vis3 attribute_hidden;
+extern __typeof (finite) __finite_generic attribute_hidden;
+
+sparc_libm_ifunc_redirected (__redirect___finite, __finite,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __finite_vis3
+ : __finite_generic);
+
+sparc_ifunc_redirected_hidden_def (__redirect___finite, __finite)
+weak_alias (__finite, finite)
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_finitef-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_finitef-generic.S
new file mode 100644
index 0000000..3888076
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_finitef-generic.S
@@ -0,0 +1,6 @@
+#define __finitef __finitef_generic
+#undef hidden_def
+#define hidden_def(a)
+#undef weak_alias
+#define weak_alias(a,b)
+#include <sysdeps/sparc/sparc64/fpu/s_finitef.S>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.S
deleted file mode 100644
index cafd41f..0000000
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.S
+++ /dev/null
@@ -1,15 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(finitef)
-
-hidden_def (__finitef)
-weak_alias (__finitef, finitef)
-
-# undef weak_alias
-# define weak_alias(a, b)
-# undef hidden_def
-# define hidden_def(a)
-
-#define __finitef __finitef_generic
-
-#include "../s_finitef.S"
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.c
new file mode 100644
index 0000000..695e8a0
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_finitef.c
@@ -0,0 +1,33 @@
+/* finitef ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#define __finitef __redirect___finitef
+#include <math.h>
+#undef __finitef
+#include <sparc-ifunc.h>
+
+extern __typeof (finitef) __finitef_vis3 attribute_hidden;
+extern __typeof (finitef) __finitef_generic attribute_hidden;
+
+sparc_libm_ifunc_redirected (__redirect___finitef, __finitef,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __finitef_vis3
+ : __finitef_generic);
+
+sparc_ifunc_redirected_hidden_def (__redirect___finitef, __finitef)
+weak_alias (__finitef, finitef)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=785dbfe93048fe47726712639aa07829dc763295
commit 785dbfe93048fe47726712639aa07829dc763295
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 11:39:43 2017 -0300
sparc: refactor sparc64 isinf{f} selector to C
This patch refactors the sparc64 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
s_isinf{f}-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc64/fpu/multiarch/Makefile (sysdeps_calls):
Add isinff-generic and s_isinf-generic objects.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isinf-generic.S: New file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isinff-generic.S: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.S: Remove file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.S: Likewise.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index 9300643..5ecb7ed 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,6 +1,15 @@
2017-11-29 Adhemerval Zanella <adhemerval.zanella@linaro.org>
* sysdeps/sparc/sparc64/fpu/multiarch/Makefile (sysdeps_calls):
+ Add s_isinff-generic and s_isinf-generic objects.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_isinf-generic.S: New file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_isinff-generic.S: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.S: Remove file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.S: Likewise.
+
+ * sysdeps/sparc/sparc64/fpu/multiarch/Makefile (sysdeps_calls):
Add s_isnanf-generic and s_isnan-generic objects.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isnan-generic.S: New file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf-generic.S: Likewise.
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
index a46773b..f0c8fa3 100644
--- a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
@@ -3,8 +3,8 @@ ifeq ($(subdir),math)
# by printf. While the libc objects have the prefix s_, the libm ones are
# prefixed with m_.
sysdep_calls := s_signbitf-vis3 s_signbit-vis3 s_signbitf-generic \
- s_signbit-generic s_finitef-vis3 \
- s_finite-vis3 s_isinff-vis3 s_isinf-vis3 \
+ s_signbit-generic s_finitef-vis3 s_finite-vis3 \
+ s_isinff-vis3 s_isinf-vis3 s_isinff-generic s_isinf-generic \
s_isnanf-vis3 s_isnan-vis3 s_isnanf-generic s_isnan-generic
sysdep_routines += $(sysdep_calls)
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isinf-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_isinf-generic.S
new file mode 100644
index 0000000..ebaf054
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_isinf-generic.S
@@ -0,0 +1,6 @@
+#define __isinf __isinf_generic
+#undef hidden_def
+#define hidden_def(a)
+#undef weak_alias
+#define weak_alias(a,b)
+#include <./sysdeps/sparc/sparc64/fpu/s_isinf.S>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.S
deleted file mode 100644
index ed9b626..0000000
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.S
+++ /dev/null
@@ -1,15 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(isinf)
-
-hidden_def (__isinf)
-weak_alias (__isinf, isinf)
-
-# undef weak_alias
-# define weak_alias(a, b)
-# undef hidden_def
-# define hidden_def(a)
-
-#define __isinf __isinf_generic
-
-#include "../s_isinf.S"
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.c
new file mode 100644
index 0000000..d7fec22
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_isinf.c
@@ -0,0 +1,37 @@
+/* isinf ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#define __isinf __redirect___isinf
+#define __isinff __redirect___isinff
+#define __isinfl __redirect___isinfl
+#include <math.h>
+#undef __isinf
+#undef __isinff
+#undef __isinfl
+#include <sparc-ifunc.h>
+
+extern __typeof (isinf) __isinf_vis3 attribute_hidden;
+extern __typeof (isinf) __isinf_generic attribute_hidden;
+
+sparc_libm_ifunc_redirected (__redirect___isinf, __isinf,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __isinf_vis3
+ : __isinf_generic)
+
+sparc_ifunc_redirected_hidden_def (__redirect___isinf, __isinf)
+weak_alias (__isinf, isinf)
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isinff-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_isinff-generic.S
new file mode 100644
index 0000000..d37243f
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_isinff-generic.S
@@ -0,0 +1,6 @@
+#define __isinff __isinff_generic
+#undef hidden_def
+#define hidden_def(a)
+#undef weak_alias
+#define weak_alias(a,b)
+#include <sysdeps/sparc/sparc64/fpu/s_isinff.S>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.S
deleted file mode 100644
index 0451739..0000000
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.S
+++ /dev/null
@@ -1,15 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(isinff)
-
-hidden_def (__isinff)
-weak_alias (__isinff, isinff)
-
-# undef weak_alias
-# define weak_alias(a, b)
-# undef hidden_def
-# define hidden_def(a)
-
-#define __isinff __isinff_generic
-
-#include "../s_isinff.S"
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.c
new file mode 100644
index 0000000..31c67f3
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_isinff.c
@@ -0,0 +1,33 @@
+/* isinff ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#define __isinff __redirect___isinff
+#include <math.h>
+#undef __isinff
+#include <sparc-ifunc.h>
+
+extern __typeof (isinff) __isinff_vis3 attribute_hidden;
+extern __typeof (isinff) __isinff_generic attribute_hidden;
+
+sparc_libm_ifunc_redirected (__redirect___isinff, __isinff,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __isinff_vis3
+ : __isinff_generic);
+
+sparc_ifunc_redirected_hidden_def (__redirect___isinff, __isinff)
+weak_alias (__isinff, isinff)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=7a091726165f0c09705ba9d08f67e6bc7591b4f2
commit 7a091726165f0c09705ba9d08f67e6bc7591b4f2
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 11:28:55 2017 -0300
sparc: refactor sparc64 isnan{f} selector to C
This patch refactors the sparc64 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
(s_isnan-generic.S).
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc64/fpu/multiarch/Makefile (sysdeps_calls):
Add s_isnanf-generic and s_isnan-generic objects.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isnan-generic.S: New file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf-generic.S: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.S: Remove file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.S: Likewise.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index c5c38e5..9300643 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,14 @@
2017-11-29 Adhemerval Zanella <adhemerval.zanella@linaro.org>
+ * sysdeps/sparc/sparc64/fpu/multiarch/Makefile (sysdeps_calls):
+ Add s_isnanf-generic and s_isnan-generic objects.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_isnan-generic.S: New file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf-generic.S: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.S: Remove file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.S: Likewise.
+
* sysdeps/sparc/sparc-ifunc.h (sparc_libm_ifunc_redirected): New
macro.
* sysdeps/sparc/sparc64/fpu/multiarch/Makefile (sysdep_calls): New
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
index 702452c..a46773b 100644
--- a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
@@ -5,7 +5,7 @@ ifeq ($(subdir),math)
sysdep_calls := s_signbitf-vis3 s_signbit-vis3 s_signbitf-generic \
s_signbit-generic s_finitef-vis3 \
s_finite-vis3 s_isinff-vis3 s_isinf-vis3 \
- s_isnanf-vis3 s_isnan-vis3
+ s_isnanf-vis3 s_isnan-vis3 s_isnanf-generic s_isnan-generic
sysdep_routines += $(sysdep_calls)
libm-sysdep_routines += s_lrintf-vis3 s_lrint-vis3 s_rintf-vis3 s_rint-vis3 \
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isnan-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_isnan-generic.S
new file mode 100644
index 0000000..64d4430
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_isnan-generic.S
@@ -0,0 +1,6 @@
+#define __isnan __isnan_generic
+#undef hidden_def
+#define hidden_def(a)
+#undef weak_alias
+#define weak_alias(a,b)
+#include <sysdeps/sparc/sparc64/fpu/s_isnan.S>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.S
deleted file mode 100644
index 40e985a..0000000
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.S
+++ /dev/null
@@ -1,15 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(isnan)
-
-hidden_def (__isnan)
-weak_alias (__isnan, isnan)
-
-# undef weak_alias
-# define weak_alias(a, b)
-# undef hidden_def
-# define hidden_def(a)
-
-#define __isnan __isnan_generic
-
-#include "../s_isnan.S"
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.c
new file mode 100644
index 0000000..3b3d700
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_isnan.c
@@ -0,0 +1,37 @@
+/* isnan ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#define __isnan __redirect___isnan
+#define __isnanf __redirect___isnanf
+#define __isnanl __redirect___isnanl
+#include <math.h>
+#undef __isnan
+#undef __isnanf
+#undef __isnanl
+#include <sparc-ifunc.h>
+
+extern __typeof (isnan) __isnan_vis3 attribute_hidden;
+extern __typeof (isnan) __isnan_generic attribute_hidden;
+
+sparc_libm_ifunc_redirected (__redirect___isnan, __isnan,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __isnan_vis3
+ : __isnan_generic);
+
+sparc_ifunc_redirected_hidden_def (__redirect___isnan, __isnan)
+weak_alias (__isnan, isnan)
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf-generic.S
new file mode 100644
index 0000000..5c82f7d
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf-generic.S
@@ -0,0 +1,6 @@
+#define __isnanf __isnanf_generic
+#undef hidden_def
+#define hidden_def(a)
+#undef weak_alias
+#define weak_alias(a,b)
+#include <sysdeps/sparc/sparc64/fpu/s_isnanf.S>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.S
deleted file mode 100644
index 6b53b69..0000000
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.S
+++ /dev/null
@@ -1,15 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(isnanf)
-
-hidden_def (__isnanf)
-weak_alias (__isnanf, isnanf)
-
-# undef weak_alias
-# define weak_alias(a, b)
-# undef hidden_def
-# define hidden_def(a)
-
-#define __isnanf __isnanf_generic
-
-#include "../s_isnanf.S"
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.c
new file mode 100644
index 0000000..f6a6380
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_isnanf.c
@@ -0,0 +1,33 @@
+/* isnanf ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#define __isnanf __redirect___isnanf
+#include <math.h>
+#undef __isnanf
+#include <sparc-ifunc.h>
+
+extern __typeof (isnanf) __isnanf_vis3 attribute_hidden;
+extern __typeof (isnanf) __isnanf_generic attribute_hidden;
+
+sparc_libm_ifunc_redirected (__redirect___isnanf, __isnanf,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __isnanf_vis3
+ : __isnanf_generic);
+
+sparc_ifunc_redirected_hidden_def (__redirect___isnanf,__isnanf)
+weak_alias (__isnanf, isnanf)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=631755fefb2aa55f3eb9af1e7d2c4bf7609ad542
commit 631755fefb2aa55f3eb9af1e7d2c4bf7609ad542
Author: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Date: Fri Oct 13 09:56:49 2017 -0300
sparc: refactor sparc64 signbit{f} selector to C
This patch refactors the sparc64 ifunc selector to a C implementation.
Also, the generic symbol is moved to its own implementation file
(s_signbit-generic.S).
The patch simplifies the Makefile by moving the common objects from
libm-sysdeps_routines and sysdeps_routines to sysdeps_call rule and
including it where required with the correct prefix.
Checked on sparc64-linux-gnu and sparcv9-linux-gnu.
* sysdeps/sparc/sparc-ifunc.h (sparc_libm_ifunc_redirected): New
macro.
* sysdeps/sparc/sparc64/fpu/multiarch/Makefile (sysdep_calls): New
rule.
(sysdep_routines): Use sysdep_calls as base.
(libm-sysdep_routines): Add generic rule for symbols shared with
libc. Add s_signbit-generic and s_signbitf-generic objects.
* sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.c: New file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.c: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_signbit-generic.S: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf-generic.S: Likewise.
* sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.S: Remove file.
* sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.S: Likewise.
Signed-off-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
diff --git a/ChangeLog b/ChangeLog
index a73e09f..c5c38e5 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,19 @@
+2017-11-29 Adhemerval Zanella <adhemerval.zanella@linaro.org>
+
+ * sysdeps/sparc/sparc-ifunc.h (sparc_libm_ifunc_redirected): New
+ macro.
+ * sysdeps/sparc/sparc64/fpu/multiarch/Makefile (sysdep_calls): New
+ rule.
+ (sysdep_routines): Use sysdep_calls as base.
+ (libm-sysdep_routines): Add generic rule for symbols shared with
+ libc. Add s_signbit-generic and s_signbitf-generic objects.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.c: New file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.c: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_signbit-generic.S: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf-generic.S: Likewise.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.S: Remove file.
+ * sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.S: Likewise.
+
2017-11-28 Mike FABIAN <mfabian@redhat.com>, Alexandre Oliva <aoliva@redhat.com>
[BZ #17750]
diff --git a/sysdeps/sparc/sparc-ifunc.h b/sysdeps/sparc/sparc-ifunc.h
index 54420d8..4a68cf1 100644
--- a/sysdeps/sparc/sparc-ifunc.h
+++ b/sysdeps/sparc/sparc-ifunc.h
@@ -158,6 +158,9 @@ END (__##name)
# define sparc_libc_ifunc(name, expr) sparc_libm_ifunc (name, expr)
+# define sparc_libm_ifunc_redirected(redirected_name, name, expr) \
+ __ifunc (redirected_name, name, expr, int hwcap, libm_ifunc_init)
+
/* It essentially does libc_hidden_builtin_def (name) and redirect
the internal redirected symbol to ifunc implementation. */
# if defined SHARED
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
index 2ac4496..702452c 100644
--- a/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/Makefile
@@ -1,17 +1,21 @@
ifeq ($(subdir),math)
-libm-sysdep_routines += m_signbitf-vis3 m_signbit-vis3 m_finitef-vis3 \
- m_finite-vis3 m_isinff-vis3 m_isinf-vis3 \
- m_isnanf-vis3 m_isnan-vis3 s_lrintf-vis3 \
- s_lrint-vis3 s_rintf-vis3 s_rint-vis3 \
+# These functions are built both for libc and libm because they're required
+# by printf. While the libc objects have the prefix s_, the libm ones are
+# prefixed with m_.
+sysdep_calls := s_signbitf-vis3 s_signbit-vis3 s_signbitf-generic \
+ s_signbit-generic s_finitef-vis3 \
+ s_finite-vis3 s_isinff-vis3 s_isinf-vis3 \
+ s_isnanf-vis3 s_isnan-vis3
+
+sysdep_routines += $(sysdep_calls)
+libm-sysdep_routines += s_lrintf-vis3 s_lrint-vis3 s_rintf-vis3 s_rint-vis3 \
s_fmaf-vis3 s_fma-vis3 s_fmaf-generic s_fma-generic \
s_nearbyint-vis3 s_nearbyintf-vis3 \
s_ceilf-vis3 s_ceil-vis3 s_ceilf-generic \
s_ceil-generic s_floorf-vis3 s_floor-vis3 \
s_floorf-generic s_floor-generic s_truncf-vis3 \
- s_trunc-vis3 s_truncf-generic s_trunc-generic
-sysdep_routines += s_signbitf-vis3 s_signbit-vis3 s_finitef-vis3 \
- s_finite-vis3 s_isinff-vis3 s_isinf-vis3 \
- s_isnanf-vis3 s_isnan-vis3
+ s_trunc-vis3 s_truncf-generic s_trunc-generic \
+ $(sysdep_calls:s_%=m_%)
CFLAGS-s_ceilf-vis3.c += -Wa,-Av9d -mvis3
CFLAGS-s_ceil-vis3.c += -Wa,-Av9d -mvis3
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit-generic.S
new file mode 100644
index 0000000..dfa40ac
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit-generic.S
@@ -0,0 +1,6 @@
+#define __signbit __signbit_generic
+#undef strong_alias
+#define strong_alias(a, b)
+#undef hidden_def
+#define hidden_def(a)
+#include <sysdeps/sparc/sparc64/fpu/s_signbit.S>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.S
deleted file mode 100644
index b8ff64a..0000000
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.S
+++ /dev/null
@@ -1,20 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(signbit)
-
-/* On 64-bit the double version will also always work for
- long-double-precision since in both cases the word with the
- sign bit in it is passed always in register %f0. */
-strong_alias (__signbit, __signbitl)
-hidden_def (__signbitl)
-
-# undef weak_alias
-# define weak_alias(a, b)
-# undef strong_alias
-# define strong_alias(a, b)
-# undef hidden_def
-# define hidden_def(a)
-
-#define __signbit __signbit_generic
-
-#include "../s_signbit.S"
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.c
new file mode 100644
index 0000000..33e69f8
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbit.c
@@ -0,0 +1,37 @@
+/* signbit ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#define __signbit __redirect_signbit
+#include <math.h>
+#undef __signbit
+
+#include <sparc-ifunc.h>
+
+extern __typeof (__redirect_signbit) __signbit_vis3 attribute_hidden;
+extern __typeof (__redirect_signbit) __signbit_generic attribute_hidden;
+
+sparc_libm_ifunc_redirected (__redirect_signbit, __signbit,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __signbit_vis3
+ : __signbit_generic);
+
+/* On 64-bit the double version will also always work for
+ long-double-precision since in both cases the word with the
+ sign bit in it is passed always in register %f0. */
+strong_alias (__signbit, __signbitl)
+sparc_ifunc_redirected_hidden_def (__redirect_signbit, __signbitl)
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf-generic.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf-generic.S
new file mode 100644
index 0000000..851ff35
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf-generic.S
@@ -0,0 +1,2 @@
+#define __signbitf __signbitf_generic
+#include <sysdeps/sparc/sparc64/fpu/s_signbitf.S>
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.S
deleted file mode 100644
index d57e999..0000000
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.S
+++ /dev/null
@@ -1,10 +0,0 @@
-#include <sparc-ifunc.h>
-
-SPARC_ASM_VIS3_IFUNC(signbitf)
-
-# undef weak_alias
-# define weak_alias(a, b)
-
-#define __signbitf __signbitf_generic
-
-#include "../s_signbitf.S"
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.c b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.c
new file mode 100644
index 0000000..7e817f0
--- /dev/null
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_signbitf.c
@@ -0,0 +1,28 @@
+/* signbit ifunc resolver, Linux/sparc64 version.
+ Copyright (C) 2017 Free Software Foundation, Inc.
+ This file is part of the GNU C Library.
+
+ The GNU C Library is free software; you can redistribute it and/or
+ modify it under the terms of the GNU Lesser General Public
+ License as published by the Free Software Foundation; either
+ version 2.1 of the License, or (at your option) any later version.
+
+ The GNU C Library is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ Lesser General Public License for more details.
+
+ You should have received a copy of the GNU Lesser General Public
+ License along with the GNU C Library; if not, see
+ <http://www.gnu.org/licenses/>. */
+
+#include <math.h>
+#include <sparc-ifunc.h>
+
+extern int __signbitf_vis3 (float) attribute_hidden;
+extern int __signbitf_generic (float) attribute_hidden;
+
+sparc_libm_ifunc(__signbitf,
+ hwcap & HWCAP_SPARC_VIS3
+ ? __signbitf_vis3
+ : __signbitf_generic);
-----------------------------------------------------------------------
hooks/post-receive
--
GNU C Library master sources