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GNU C Library master sources branch master updated. glibc-2.23-533-g2cbec36

From: aurel32 at sourceware dot org
To: glibc-cvs at sourceware dot org
Date: 1 Jul 2016 14:37:24 -0000
Subject: GNU C Library master sources branch master updated. glibc-2.23-533-g2cbec36
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The branch, master has been updated
       via  2cbec365663cd0e2fe21f77b1f5e20ae3ab5f538 (commit)
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http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=2cbec365663cd0e2fe21f77b1f5e20ae3ab5f538

commit 2cbec365663cd0e2fe21f77b1f5e20ae3ab5f538
Author: Aurelien Jarno <aurelien@aurel32.net>
Date:   Thu Jun 30 21:18:34 2016 +0200

    SPARC: fix nearbyint on sNaN input
    
    nearbyint and nearbyintf should not trigger inexact exceptions, but
    should still trigger an invalid exception for a sNaN input.
    
    The SPARC specific implementations of these functions save the FSR at
    the beginning of the function and restore it at the end to not trigger
    an inexact exception. This however doesn't work for an sNaN input which
    need to trigger an invalid exception. Fix that by adding a fcmp
    instruction using the input value before saving FSR, so that an invalid
    exception is triggered for a sNaN input.
    
    This fixes the math/test-nearbyint-except test on SPARC.
    
    Changelog:
    	* sparc/sparc32/sparcv9/fpu/s_nearbyint.S (__nearbyint): Trigger an
    	invalid exception for a sNaN input.
    	* sparc/sparc32/sparcv9/fpu/s_nearbyintf.S (__nearbyintf): Likewise.
    	* sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S
    	(__nearbyint_vis3): Likewise
    	* sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S
    	(__nearbyintf_vis3): Likewise
    	* sparc/sparc64/fpu/s_nearbyint.S (__nearbyint): Likewise.
    	* sparc/sparc64/fpu/s_nearbyintf.S (__nearbyintf): Likewise.
    	* sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S (__nearbyint_vis3):
    	Likewise.
    	* sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S (__nearbyintf_vis3):
    	Likewise.

diff --git a/ChangeLog b/ChangeLog
index 5844894..a7ca1ff 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,19 @@
+2016-07-01  Aurelien Jarno  <aurelien@aurel32.net>
+
+	* sparc/sparc32/sparcv9/fpu/s_nearbyint.S (__nearbyint): Trigger an
+	invalid exception for a sNaN input.
+	* sparc/sparc32/sparcv9/fpu/s_nearbyintf.S (__nearbyintf): Likewise.
+	* sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S
+	(__nearbyint_vis3): Likewise
+	* sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S
+	(__nearbyintf_vis3): Likewise
+	* sparc/sparc64/fpu/s_nearbyint.S (__nearbyint): Likewise.
+	* sparc/sparc64/fpu/s_nearbyintf.S (__nearbyintf): Likewise.
+	* sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S (__nearbyint_vis3):
+	Likewise.
+	* sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S (__nearbyintf_vis3):
+	Likewise.
+
 2016-07-01  H.J. Lu  <hongjiu.lu@intel.com>
 
 	[BZ #20139]
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S
index 4475e8c..d9ff0cc 100644
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyint-vis3.S
@@ -36,6 +36,7 @@
 #define SIGN_BIT	%f12			/* -0.0 */
 
 ENTRY (__nearbyint_vis3)
+	fcmpd	%fcc3, %f0, %f0			/* Check for sNaN */
 	st	%fsr, [%sp + 88]
 	sethi	%hi(TWO_FIFTYTWO), %o2
 	sethi	%hi(0xf8003e0), %o5
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S
index e39134b..5cd1eb0 100644
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/multiarch/s_nearbyintf-vis3.S
@@ -35,6 +35,7 @@
 #define SIGN_BIT	%f12			/* -0.0 */
 
 ENTRY (__nearbyintf_vis3)
+	fcmps	%fcc3, %f1, %f1			/* Check for sNaN */
 	st	%fsr, [%sp + 88]
 	movwtos	%o0, %f1
 	sethi	%hi(TWO_TWENTYTHREE), %o2
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyint.S b/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyint.S
index 29b56b4..84a1097 100644
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyint.S
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyint.S
@@ -36,6 +36,7 @@
 #define SIGN_BIT	%f12			/* -0.0 */
 
 ENTRY (__nearbyint)
+	fcmpd	%fcc3, %f0, %f0			/* Check for sNaN */
 	st	%fsr, [%sp + 88]
 	sethi	%hi(TWO_FIFTYTWO), %o2
 	sethi	%hi(0xf8003e0), %o5
diff --git a/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyintf.S b/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyintf.S
index e2188b2..d5cf5ce 100644
--- a/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyintf.S
+++ b/sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyintf.S
@@ -35,6 +35,7 @@
 #define SIGN_BIT	%f12			/* -0.0 */
 
 ENTRY (__nearbyintf)
+	fcmps	%fcc3, %f1, %f1			/* Check for sNaN */
 	st	%fsr, [%sp + 88]
 	st	%o0, [%sp + 68]
 	sethi	%hi(TWO_TWENTYTHREE), %o2
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S
index fff277a..3180554 100644
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S
@@ -35,6 +35,7 @@
 #define SIGN_BIT	%f12			/* -0.0 */
 
 ENTRY (__nearbyint_vis3)
+	fcmpd	%fcc3, %f0, %f0			/* Check for sNaN */
 	stx	%fsr, [%sp + STACK_BIAS + 144]
 	sethi	%hi(TWO_FIFTYTWO), %o2
 	sllx	%o2, 32, %o2
diff --git a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S
index c6e94ba..7bf7eed 100644
--- a/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S
+++ b/sysdeps/sparc/sparc64/fpu/multiarch/s_nearbyintf-vis3.S
@@ -35,6 +35,7 @@
 #define SIGN_BIT	%f12			/* -0.0 */
 
 ENTRY (__nearbyintf_vis3)
+	fcmps	%fcc3, %f1, %f1			/* Check for sNaN */
 	stx	%fsr, [%sp + STACK_BIAS + 144]
 	sethi	%hi(0xf8003e0), %o5
 	sethi	%hi(TWO_TWENTYTHREE), %o2
diff --git a/sysdeps/sparc/sparc64/fpu/s_nearbyint.S b/sysdeps/sparc/sparc64/fpu/s_nearbyint.S
index caf4d72..456c315 100644
--- a/sysdeps/sparc/sparc64/fpu/s_nearbyint.S
+++ b/sysdeps/sparc/sparc64/fpu/s_nearbyint.S
@@ -35,6 +35,7 @@
 #define SIGN_BIT	%f12			/* -0.0 */
 
 ENTRY (__nearbyint)
+	fcmpd	%fcc3, %f0, %f0			/* Check for sNaN */
 	stx	%fsr, [%sp + STACK_BIAS + 144]
 	sethi	%hi(TWO_FIFTYTWO), %o2
 	sllx	%o2, 32, %o2
diff --git a/sysdeps/sparc/sparc64/fpu/s_nearbyintf.S b/sysdeps/sparc/sparc64/fpu/s_nearbyintf.S
index 4232eca..d0d9bed 100644
--- a/sysdeps/sparc/sparc64/fpu/s_nearbyintf.S
+++ b/sysdeps/sparc/sparc64/fpu/s_nearbyintf.S
@@ -35,6 +35,7 @@
 #define SIGN_BIT	%f12			/* -0.0 */
 
 ENTRY (__nearbyintf)
+	fcmps	%fcc3, %f1, %f1			/* Check for sNaN */
 	stx	%fsr, [%sp + STACK_BIAS + 144]
 	sethi	%hi(0xf8003e0), %o5
 	sethi	%hi(TWO_TWENTYTHREE), %o2

-----------------------------------------------------------------------

Summary of changes:
 ChangeLog                                          |   16 ++++++++++++++++
 .../sparcv9/fpu/multiarch/s_nearbyint-vis3.S       |    1 +
 .../sparcv9/fpu/multiarch/s_nearbyintf-vis3.S      |    1 +
 sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyint.S    |    1 +
 sysdeps/sparc/sparc32/sparcv9/fpu/s_nearbyintf.S   |    1 +
 .../sparc/sparc64/fpu/multiarch/s_nearbyint-vis3.S |    1 +
 .../sparc64/fpu/multiarch/s_nearbyintf-vis3.S      |    1 +
 sysdeps/sparc/sparc64/fpu/s_nearbyint.S            |    1 +
 sysdeps/sparc/sparc64/fpu/s_nearbyintf.S           |    1 +
 9 files changed, 24 insertions(+), 0 deletions(-)


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