This is the mail archive of the
glibc-cvs@sourceware.org
mailing list for the glibc project.
GNU C Library master sources branch hjl/cpuid/master updated. glibc-2.21-676-g9b865b4
- From: hjl at sourceware dot org
- To: glibc-cvs at sourceware dot org
- Date: 1 Aug 2015 14:50:08 -0000
- Subject: GNU C Library master sources branch hjl/cpuid/master updated. glibc-2.21-676-g9b865b4
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "GNU C Library master sources".
The branch, hjl/cpuid/master has been updated
via 9b865b47e9c53734b0f95e93e0f3c0ae7bce5c3e (commit)
via 2ac8834fcb0dba1608f32c88322c8b221ba58002 (commit)
via 267df24fff308c8dd7ab9da4094080e34bed35b6 (commit)
via 7ff00d52660cffa7006dc12ce9ae6d4126b118a5 (commit)
via bceb0e7ce16a3917ea36b49477ff98cf61dd70bd (commit)
via bcbfce0a79fd8a31e14093339c6a58bd254bfaf6 (commit)
via d56c9d73023c8f13c7a6ed120b10f33093d7d612 (commit)
from 734d442158bf9ff7532f80081eb016f9f10718aa (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=9b865b47e9c53734b0f95e93e0f3c0ae7bce5c3e
commit 9b865b47e9c53734b0f95e93e0f3c0ae7bce5c3e
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Sat Aug 1 07:48:54 2015 -0700
Update x86_64/multiarch
diff --git a/sysdeps/x86_64/fpu/multiarch/e_asin.c b/sysdeps/x86_64/fpu/multiarch/e_asin.c
index 55865c0..a0edb96 100644
--- a/sysdeps/x86_64/fpu/multiarch/e_asin.c
+++ b/sysdeps/x86_64/fpu/multiarch/e_asin.c
@@ -9,11 +9,15 @@ extern double __ieee754_acos_fma4 (double);
extern double __ieee754_asin_fma4 (double);
libm_ifunc (__ieee754_acos,
- HAS_FMA4 ? __ieee754_acos_fma4 : __ieee754_acos_sse2);
+ HAS_ARCH_FEATURE (FMA4_Usable)
+ ? __ieee754_acos_fma4
+ : __ieee754_acos_sse2);
strong_alias (__ieee754_acos, __acos_finite)
libm_ifunc (__ieee754_asin,
- HAS_FMA4 ? __ieee754_asin_fma4 : __ieee754_asin_sse2);
+ HAS_ARCH_FEATURE (FMA4_Usable)
+ ? __ieee754_asin_fma4
+ : __ieee754_asin_sse2);
strong_alias (__ieee754_asin, __asin_finite)
# define __ieee754_acos __ieee754_acos_sse2
diff --git a/sysdeps/x86_64/fpu/multiarch/e_atan2.c b/sysdeps/x86_64/fpu/multiarch/e_atan2.c
index 547681c..269dcc9 100644
--- a/sysdeps/x86_64/fpu/multiarch/e_atan2.c
+++ b/sysdeps/x86_64/fpu/multiarch/e_atan2.c
@@ -8,14 +8,15 @@ extern double __ieee754_atan2_avx (double, double);
# ifdef HAVE_FMA4_SUPPORT
extern double __ieee754_atan2_fma4 (double, double);
# else
-# undef HAS_FMA4
-# define HAS_FMA4 0
+# undef HAS_ARCH_FEATURE
+# define HAS_ARCH_FEATURE(feature) 0
# define __ieee754_atan2_fma4 ((void *) 0)
# endif
libm_ifunc (__ieee754_atan2,
- HAS_FMA4 ? __ieee754_atan2_fma4
- : (HAS_AVX ? __ieee754_atan2_avx : __ieee754_atan2_sse2));
+ HAS_ARCH_FEATURE (FMA4_Usable) ? __ieee754_atan2_fma4
+ : (HAS_ARCH_FEATURE (AVX_Usable)
+ ? __ieee754_atan2_avx : __ieee754_atan2_sse2));
strong_alias (__ieee754_atan2, __atan2_finite)
# define __ieee754_atan2 __ieee754_atan2_sse2
diff --git a/sysdeps/x86_64/fpu/multiarch/e_exp.c b/sysdeps/x86_64/fpu/multiarch/e_exp.c
index d244954..9c124ca 100644
--- a/sysdeps/x86_64/fpu/multiarch/e_exp.c
+++ b/sysdeps/x86_64/fpu/multiarch/e_exp.c
@@ -8,14 +8,15 @@ extern double __ieee754_exp_avx (double);
# ifdef HAVE_FMA4_SUPPORT
extern double __ieee754_exp_fma4 (double);
# else
-# undef HAS_FMA4
-# define HAS_FMA4 0
+# undef HAS_ARCH_FEATURE
+# define HAS_ARCH_FEATURE(feature) 0
# define __ieee754_exp_fma4 ((void *) 0)
# endif
libm_ifunc (__ieee754_exp,
- HAS_FMA4 ? __ieee754_exp_fma4
- : (HAS_AVX ? __ieee754_exp_avx : __ieee754_exp_sse2));
+ HAS_ARCH_FEATURE (FMA4_Usable) ? __ieee754_exp_fma4
+ : (HAS_ARCH_FEATURE (AVX_Usable)
+ ? __ieee754_exp_avx : __ieee754_exp_sse2));
strong_alias (__ieee754_exp, __exp_finite)
# define __ieee754_exp __ieee754_exp_sse2
diff --git a/sysdeps/x86_64/fpu/multiarch/e_log.c b/sysdeps/x86_64/fpu/multiarch/e_log.c
index 9805473..04e9ac5 100644
--- a/sysdeps/x86_64/fpu/multiarch/e_log.c
+++ b/sysdeps/x86_64/fpu/multiarch/e_log.c
@@ -8,14 +8,15 @@ extern double __ieee754_log_avx (double);
# ifdef HAVE_FMA4_SUPPORT
extern double __ieee754_log_fma4 (double);
# else
-# undef HAS_FMA4
-# define HAS_FMA4 0
+# undef HAS_ARCH_FEATURE
+# define HAS_ARCH_FEATURE(feature) 0
# define __ieee754_log_fma4 ((void *) 0)
# endif
libm_ifunc (__ieee754_log,
- HAS_FMA4 ? __ieee754_log_fma4
- : (HAS_AVX ? __ieee754_log_avx : __ieee754_log_sse2));
+ HAS_ARCH_FEATURE (FMA4_Usable) ? __ieee754_log_fma4
+ : (HAS_ARCH_FEATURE (AVX_Usable)
+ ? __ieee754_log_avx : __ieee754_log_sse2));
strong_alias (__ieee754_log, __log_finite)
# define __ieee754_log __ieee754_log_sse2
diff --git a/sysdeps/x86_64/fpu/multiarch/e_pow.c b/sysdeps/x86_64/fpu/multiarch/e_pow.c
index 433cce0..6d422d6 100644
--- a/sysdeps/x86_64/fpu/multiarch/e_pow.c
+++ b/sysdeps/x86_64/fpu/multiarch/e_pow.c
@@ -6,7 +6,10 @@
extern double __ieee754_pow_sse2 (double, double);
extern double __ieee754_pow_fma4 (double, double);
-libm_ifunc (__ieee754_pow, HAS_FMA4 ? __ieee754_pow_fma4 : __ieee754_pow_sse2);
+libm_ifunc (__ieee754_pow,
+ HAS_ARCH_FEATURE (FMA4_Usable)
+ ? __ieee754_pow_fma4
+ : __ieee754_pow_sse2);
strong_alias (__ieee754_pow, __pow_finite)
# define __ieee754_pow __ieee754_pow_sse2
diff --git a/sysdeps/x86_64/fpu/multiarch/s_atan.c b/sysdeps/x86_64/fpu/multiarch/s_atan.c
index ae16d7c..57b5c65 100644
--- a/sysdeps/x86_64/fpu/multiarch/s_atan.c
+++ b/sysdeps/x86_64/fpu/multiarch/s_atan.c
@@ -7,13 +7,14 @@ extern double __atan_avx (double);
# ifdef HAVE_FMA4_SUPPORT
extern double __atan_fma4 (double);
# else
-# undef HAS_FMA4
-# define HAS_FMA4 0
+# undef HAS_ARCH_FEATURE
+# define HAS_ARCH_FEATURE(feature) 0
# define __atan_fma4 ((void *) 0)
# endif
-libm_ifunc (atan, (HAS_FMA4 ? __atan_fma4 :
- HAS_AVX ? __atan_avx : __atan_sse2));
+libm_ifunc (atan, (HAS_ARCH_FEATURE (FMA4_Usable) ? __atan_fma4 :
+ HAS_ARCH_FEATURE (AVX_Usable)
+ ? __atan_avx : __atan_sse2));
# define atan __atan_sse2
#endif
diff --git a/sysdeps/x86_64/fpu/multiarch/s_fma.c b/sysdeps/x86_64/fpu/multiarch/s_fma.c
index 0963a0b..78e7732 100644
--- a/sysdeps/x86_64/fpu/multiarch/s_fma.c
+++ b/sysdeps/x86_64/fpu/multiarch/s_fma.c
@@ -42,14 +42,15 @@ __fma_fma4 (double x, double y, double z)
return x;
}
# else
-# undef HAS_FMA4
-# define HAS_FMA4 0
+# undef HAS_ARCH_FEATURE
+# define HAS_ARCH_FEATURE(feature) 0
# define __fma_fma4 ((void *) 0)
# endif
-libm_ifunc (__fma, HAS_FMA
- ? __fma_fma3 : (HAS_FMA4 ? __fma_fma4 : __fma_sse2));
+libm_ifunc (__fma, HAS_ARCH_FEATURE (FMA_Usable)
+ ? __fma_fma3 : (HAS_ARCH_FEATURE (FMA4_Usable)
+ ? __fma_fma4 : __fma_sse2));
weak_alias (__fma, fma)
# define __fma __fma_sse2
diff --git a/sysdeps/x86_64/fpu/multiarch/s_fmaf.c b/sysdeps/x86_64/fpu/multiarch/s_fmaf.c
index 6046961..bebd3ee 100644
--- a/sysdeps/x86_64/fpu/multiarch/s_fmaf.c
+++ b/sysdeps/x86_64/fpu/multiarch/s_fmaf.c
@@ -41,14 +41,15 @@ __fmaf_fma4 (float x, float y, float z)
return x;
}
# else
-# undef HAS_FMA4
-# define HAS_FMA4 0
+# undef HAS_ARCH_FEATURE
+# define HAS_ARCH_FEATURE(feature) 0
# define __fmaf_fma4 ((void *) 0)
# endif
-libm_ifunc (__fmaf, HAS_FMA
- ? __fmaf_fma3 : (HAS_FMA4 ? __fmaf_fma4 : __fmaf_sse2));
+libm_ifunc (__fmaf, HAS_ARCH_FEATURE (FMA_Usable)
+ ? __fmaf_fma3 : (HAS_ARCH_FEATURE (FMA4_Usable)
+ ? __fmaf_fma4 : __fmaf_sse2));
weak_alias (__fmaf, fmaf)
# define __fmaf __fmaf_sse2
diff --git a/sysdeps/x86_64/fpu/multiarch/s_sin.c b/sysdeps/x86_64/fpu/multiarch/s_sin.c
index a0c2521..3bc7330 100644
--- a/sysdeps/x86_64/fpu/multiarch/s_sin.c
+++ b/sysdeps/x86_64/fpu/multiarch/s_sin.c
@@ -11,18 +11,20 @@ extern double __sin_avx (double);
extern double __cos_fma4 (double);
extern double __sin_fma4 (double);
# else
-# undef HAS_FMA4
-# define HAS_FMA4 0
+# undef HAS_ARCH_FEATURE
+# define HAS_ARCH_FEATURE(feature) 0
# define __cos_fma4 ((void *) 0)
# define __sin_fma4 ((void *) 0)
# endif
-libm_ifunc (__cos, (HAS_FMA4 ? __cos_fma4 :
- HAS_AVX ? __cos_avx : __cos_sse2));
+libm_ifunc (__cos, (HAS_ARCH_FEATURE (FMA4_Usable) ? __cos_fma4 :
+ HAS_ARCH_FEATURE (AVX_Usable)
+ ? __cos_avx : __cos_sse2));
weak_alias (__cos, cos)
-libm_ifunc (__sin, (HAS_FMA4 ? __sin_fma4 :
- HAS_AVX ? __sin_avx : __sin_sse2));
+libm_ifunc (__sin, (HAS_ARCH_FEATURE (FMA4_Usable) ? __sin_fma4 :
+ HAS_ARCH_FEATURE (AVX_Usable)
+ ? __sin_avx : __sin_sse2));
weak_alias (__sin, sin)
# define __cos __cos_sse2
diff --git a/sysdeps/x86_64/fpu/multiarch/s_tan.c b/sysdeps/x86_64/fpu/multiarch/s_tan.c
index 904308f..d99d9db 100644
--- a/sysdeps/x86_64/fpu/multiarch/s_tan.c
+++ b/sysdeps/x86_64/fpu/multiarch/s_tan.c
@@ -7,13 +7,14 @@ extern double __tan_avx (double);
# ifdef HAVE_FMA4_SUPPORT
extern double __tan_fma4 (double);
# else
-# undef HAS_FMA4
-# define HAS_FMA4 0
+# undef HAS_ARCH_FEATURE
+# define HAS_ARCH_FEATURE(feature) 0
# define __tan_fma4 ((void *) 0)
# endif
-libm_ifunc (tan, (HAS_FMA4 ? __tan_fma4 :
- HAS_AVX ? __tan_avx : __tan_sse2));
+libm_ifunc (tan, (HAS_ARCH_FEATURE (FMA4_Usable) ? __tan_fma4 :
+ HAS_ARCH_FEATURE (AVX_Usable)
+ ? __tan_avx : __tan_sse2));
# define tan __tan_sse2
#endif
diff --git a/sysdeps/x86_64/multiarch/ifunc-impl-list.c b/sysdeps/x86_64/multiarch/ifunc-impl-list.c
index b64e4f1..f5a576c 100644
--- a/sysdeps/x86_64/multiarch/ifunc-impl-list.c
+++ b/sysdeps/x86_64/multiarch/ifunc-impl-list.c
@@ -39,48 +39,57 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
/* Support sysdeps/x86_64/multiarch/memcmp.S. */
IFUNC_IMPL (i, name, memcmp,
- IFUNC_IMPL_ADD (array, i, memcmp, HAS_SSE4_1,
+ IFUNC_IMPL_ADD (array, i, memcmp, HAS_CPU_FEATURE (SSE4_1),
__memcmp_sse4_1)
- IFUNC_IMPL_ADD (array, i, memcmp, HAS_SSSE3, __memcmp_ssse3)
+ IFUNC_IMPL_ADD (array, i, memcmp, HAS_CPU_FEATURE (SSSE3),
+ __memcmp_ssse3)
IFUNC_IMPL_ADD (array, i, memcmp, 1, __memcmp_sse2))
/* Support sysdeps/x86_64/multiarch/memmove_chk.S. */
IFUNC_IMPL (i, name, __memmove_chk,
- IFUNC_IMPL_ADD (array, i, __memmove_chk, HAS_AVX,
+ IFUNC_IMPL_ADD (array, i, __memmove_chk,
+ HAS_ARCH_FEATURE (AVX_Usable),
__memmove_chk_avx_unaligned)
- IFUNC_IMPL_ADD (array, i, __memmove_chk, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, __memmove_chk,
+ HAS_CPU_FEATURE (SSSE3),
__memmove_chk_ssse3_back)
- IFUNC_IMPL_ADD (array, i, __memmove_chk, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, __memmove_chk,
+ HAS_CPU_FEATURE (SSSE3),
__memmove_chk_ssse3)
IFUNC_IMPL_ADD (array, i, __memmove_chk, 1,
__memmove_chk_sse2))
/* Support sysdeps/x86_64/multiarch/memmove.S. */
IFUNC_IMPL (i, name, memmove,
- IFUNC_IMPL_ADD (array, i, memmove, HAS_AVX,
+ IFUNC_IMPL_ADD (array, i, memmove,
+ HAS_ARCH_FEATURE (AVX_Usable),
__memmove_avx_unaligned)
- IFUNC_IMPL_ADD (array, i, memmove, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, memmove, HAS_CPU_FEATURE (SSSE3),
__memmove_ssse3_back)
- IFUNC_IMPL_ADD (array, i, memmove, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, memmove, HAS_CPU_FEATURE (SSSE3),
__memmove_ssse3)
IFUNC_IMPL_ADD (array, i, memmove, 1, __memmove_sse2))
#ifdef HAVE_AVX2_SUPPORT
/* Support sysdeps/x86_64/multiarch/memset_chk.S. */
IFUNC_IMPL (i, name, __memset_chk,
- IFUNC_IMPL_ADD (array, i, __memset_chk, 1, __memset_chk_sse2)
- IFUNC_IMPL_ADD (array, i, __memset_chk, HAS_AVX2,
+ IFUNC_IMPL_ADD (array, i, __memset_chk, 1,
+ __memset_chk_sse2)
+ IFUNC_IMPL_ADD (array, i, __memset_chk,
+ HAS_ARCH_FEATURE (AVX2_Usable),
__memset_chk_avx2))
/* Support sysdeps/x86_64/multiarch/memset.S. */
IFUNC_IMPL (i, name, memset,
IFUNC_IMPL_ADD (array, i, memset, 1, __memset_sse2)
- IFUNC_IMPL_ADD (array, i, memset, HAS_AVX2, __memset_avx2))
+ IFUNC_IMPL_ADD (array, i, memset,
+ HAS_ARCH_FEATURE (AVX2_Usable),
+ __memset_avx2))
#endif
/* Support sysdeps/x86_64/multiarch/stpncpy.S. */
IFUNC_IMPL (i, name, stpncpy,
- IFUNC_IMPL_ADD (array, i, stpncpy, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, stpncpy, HAS_CPU_FEATURE (SSSE3),
__stpncpy_ssse3)
IFUNC_IMPL_ADD (array, i, stpncpy, 1,
__stpncpy_sse2_unaligned)
@@ -88,27 +97,34 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
/* Support sysdeps/x86_64/multiarch/stpcpy.S. */
IFUNC_IMPL (i, name, stpcpy,
- IFUNC_IMPL_ADD (array, i, stpcpy, HAS_SSSE3, __stpcpy_ssse3)
+ IFUNC_IMPL_ADD (array, i, stpcpy, HAS_CPU_FEATURE (SSSE3),
+ __stpcpy_ssse3)
IFUNC_IMPL_ADD (array, i, stpcpy, 1, __stpcpy_sse2_unaligned)
IFUNC_IMPL_ADD (array, i, stpcpy, 1, __stpcpy_sse2))
/* Support sysdeps/x86_64/multiarch/strcasecmp_l.S. */
IFUNC_IMPL (i, name, strcasecmp,
- IFUNC_IMPL_ADD (array, i, strcasecmp, HAS_AVX,
+ IFUNC_IMPL_ADD (array, i, strcasecmp,
+ HAS_ARCH_FEATURE (AVX_Usable),
__strcasecmp_avx)
- IFUNC_IMPL_ADD (array, i, strcasecmp, HAS_SSE4_2,
+ IFUNC_IMPL_ADD (array, i, strcasecmp,
+ HAS_CPU_FEATURE (SSE4_2),
__strcasecmp_sse42)
- IFUNC_IMPL_ADD (array, i, strcasecmp, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, strcasecmp,
+ HAS_CPU_FEATURE (SSSE3),
__strcasecmp_ssse3)
IFUNC_IMPL_ADD (array, i, strcasecmp, 1, __strcasecmp_sse2))
/* Support sysdeps/x86_64/multiarch/strcasecmp_l.S. */
IFUNC_IMPL (i, name, strcasecmp_l,
- IFUNC_IMPL_ADD (array, i, strcasecmp_l, HAS_AVX,
+ IFUNC_IMPL_ADD (array, i, strcasecmp_l,
+ HAS_ARCH_FEATURE (AVX_Usable),
__strcasecmp_l_avx)
- IFUNC_IMPL_ADD (array, i, strcasecmp_l, HAS_SSE4_2,
+ IFUNC_IMPL_ADD (array, i, strcasecmp_l,
+ HAS_CPU_FEATURE (SSE4_2),
__strcasecmp_l_sse42)
- IFUNC_IMPL_ADD (array, i, strcasecmp_l, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, strcasecmp_l,
+ HAS_CPU_FEATURE (SSSE3),
__strcasecmp_l_ssse3)
IFUNC_IMPL_ADD (array, i, strcasecmp_l, 1,
__strcasecmp_l_sse2))
@@ -119,7 +135,8 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
/* Support sysdeps/x86_64/multiarch/strcat.S. */
IFUNC_IMPL (i, name, strcat,
- IFUNC_IMPL_ADD (array, i, strcat, HAS_SSSE3, __strcat_ssse3)
+ IFUNC_IMPL_ADD (array, i, strcat, HAS_CPU_FEATURE (SSSE3),
+ __strcat_ssse3)
IFUNC_IMPL_ADD (array, i, strcat, 1, __strcat_sse2_unaligned)
IFUNC_IMPL_ADD (array, i, strcat, 1, __strcat_sse2))
@@ -130,48 +147,57 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
/* Support sysdeps/x86_64/multiarch/strcmp.S. */
IFUNC_IMPL (i, name, strcmp,
- IFUNC_IMPL_ADD (array, i, strcmp, HAS_SSE4_2, __strcmp_sse42)
- IFUNC_IMPL_ADD (array, i, strcmp, HAS_SSSE3, __strcmp_ssse3)
+ IFUNC_IMPL_ADD (array, i, strcmp, HAS_CPU_FEATURE (SSE4_2),
+ __strcmp_sse42)
+ IFUNC_IMPL_ADD (array, i, strcmp, HAS_CPU_FEATURE (SSSE3),
+ __strcmp_ssse3)
IFUNC_IMPL_ADD (array, i, strcmp, 1, __strcmp_sse2_unaligned)
IFUNC_IMPL_ADD (array, i, strcmp, 1, __strcmp_sse2))
/* Support sysdeps/x86_64/multiarch/strcpy.S. */
IFUNC_IMPL (i, name, strcpy,
- IFUNC_IMPL_ADD (array, i, strcpy, HAS_SSSE3, __strcpy_ssse3)
+ IFUNC_IMPL_ADD (array, i, strcpy, HAS_CPU_FEATURE (SSSE3),
+ __strcpy_ssse3)
IFUNC_IMPL_ADD (array, i, strcpy, 1, __strcpy_sse2_unaligned)
IFUNC_IMPL_ADD (array, i, strcpy, 1, __strcpy_sse2))
/* Support sysdeps/x86_64/multiarch/strcspn.S. */
IFUNC_IMPL (i, name, strcspn,
- IFUNC_IMPL_ADD (array, i, strcspn, HAS_SSE4_2,
+ IFUNC_IMPL_ADD (array, i, strcspn, HAS_CPU_FEATURE (SSE4_2),
__strcspn_sse42)
IFUNC_IMPL_ADD (array, i, strcspn, 1, __strcspn_sse2))
/* Support sysdeps/x86_64/multiarch/strncase_l.S. */
IFUNC_IMPL (i, name, strncasecmp,
- IFUNC_IMPL_ADD (array, i, strncasecmp, HAS_AVX,
+ IFUNC_IMPL_ADD (array, i, strncasecmp,
+ HAS_ARCH_FEATURE (AVX_Usable),
__strncasecmp_avx)
- IFUNC_IMPL_ADD (array, i, strncasecmp, HAS_SSE4_2,
+ IFUNC_IMPL_ADD (array, i, strncasecmp,
+ HAS_CPU_FEATURE (SSE4_2),
__strncasecmp_sse42)
- IFUNC_IMPL_ADD (array, i, strncasecmp, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, strncasecmp,
+ HAS_CPU_FEATURE (SSSE3),
__strncasecmp_ssse3)
IFUNC_IMPL_ADD (array, i, strncasecmp, 1,
__strncasecmp_sse2))
/* Support sysdeps/x86_64/multiarch/strncase_l.S. */
IFUNC_IMPL (i, name, strncasecmp_l,
- IFUNC_IMPL_ADD (array, i, strncasecmp_l, HAS_AVX,
+ IFUNC_IMPL_ADD (array, i, strncasecmp_l,
+ HAS_ARCH_FEATURE (AVX_Usable),
__strncasecmp_l_avx)
- IFUNC_IMPL_ADD (array, i, strncasecmp_l, HAS_SSE4_2,
+ IFUNC_IMPL_ADD (array, i, strncasecmp_l,
+ HAS_CPU_FEATURE (SSE4_2),
__strncasecmp_l_sse42)
- IFUNC_IMPL_ADD (array, i, strncasecmp_l, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, strncasecmp_l,
+ HAS_CPU_FEATURE (SSSE3),
__strncasecmp_l_ssse3)
IFUNC_IMPL_ADD (array, i, strncasecmp_l, 1,
__strncasecmp_l_sse2))
/* Support sysdeps/x86_64/multiarch/strncat.S. */
IFUNC_IMPL (i, name, strncat,
- IFUNC_IMPL_ADD (array, i, strncat, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, strncat, HAS_CPU_FEATURE (SSSE3),
__strncat_ssse3)
IFUNC_IMPL_ADD (array, i, strncat, 1,
__strncat_sse2_unaligned)
@@ -179,7 +205,7 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
/* Support sysdeps/x86_64/multiarch/strncpy.S. */
IFUNC_IMPL (i, name, strncpy,
- IFUNC_IMPL_ADD (array, i, strncpy, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, strncpy, HAS_CPU_FEATURE (SSSE3),
__strncpy_ssse3)
IFUNC_IMPL_ADD (array, i, strncpy, 1,
__strncpy_sse2_unaligned)
@@ -187,14 +213,15 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
/* Support sysdeps/x86_64/multiarch/strpbrk.S. */
IFUNC_IMPL (i, name, strpbrk,
- IFUNC_IMPL_ADD (array, i, strpbrk, HAS_SSE4_2,
+ IFUNC_IMPL_ADD (array, i, strpbrk, HAS_CPU_FEATURE (SSE4_2),
__strpbrk_sse42)
IFUNC_IMPL_ADD (array, i, strpbrk, 1, __strpbrk_sse2))
/* Support sysdeps/x86_64/multiarch/strspn.S. */
IFUNC_IMPL (i, name, strspn,
- IFUNC_IMPL_ADD (array, i, strspn, HAS_SSE4_2, __strspn_sse42)
+ IFUNC_IMPL_ADD (array, i, strspn, HAS_CPU_FEATURE (SSE4_2),
+ __strspn_sse42)
IFUNC_IMPL_ADD (array, i, strspn, 1, __strspn_sse2))
/* Support sysdeps/x86_64/multiarch/strstr.c. */
@@ -204,65 +231,75 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
/* Support sysdeps/x86_64/multiarch/wcscpy.S. */
IFUNC_IMPL (i, name, wcscpy,
- IFUNC_IMPL_ADD (array, i, wcscpy, HAS_SSSE3, __wcscpy_ssse3)
+ IFUNC_IMPL_ADD (array, i, wcscpy, HAS_CPU_FEATURE (SSSE3),
+ __wcscpy_ssse3)
IFUNC_IMPL_ADD (array, i, wcscpy, 1, __wcscpy_sse2))
/* Support sysdeps/x86_64/multiarch/wmemcmp.S. */
IFUNC_IMPL (i, name, wmemcmp,
- IFUNC_IMPL_ADD (array, i, wmemcmp, HAS_SSE4_1,
+ IFUNC_IMPL_ADD (array, i, wmemcmp, HAS_CPU_FEATURE (SSE4_1),
__wmemcmp_sse4_1)
- IFUNC_IMPL_ADD (array, i, wmemcmp, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, wmemcmp, HAS_CPU_FEATURE (SSSE3),
__wmemcmp_ssse3)
IFUNC_IMPL_ADD (array, i, wmemcmp, 1, __wmemcmp_sse2))
#ifdef SHARED
/* Support sysdeps/x86_64/multiarch/memcpy_chk.S. */
IFUNC_IMPL (i, name, __memcpy_chk,
- IFUNC_IMPL_ADD (array, i, __memcpy_chk, HAS_AVX,
+ IFUNC_IMPL_ADD (array, i, __memcpy_chk,
+ HAS_ARCH_FEATURE (AVX_Usable),
__memcpy_chk_avx_unaligned)
- IFUNC_IMPL_ADD (array, i, __memcpy_chk, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, __memcpy_chk,
+ HAS_CPU_FEATURE (SSSE3),
__memcpy_chk_ssse3_back)
- IFUNC_IMPL_ADD (array, i, __memcpy_chk, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, __memcpy_chk,
+ HAS_CPU_FEATURE (SSSE3),
__memcpy_chk_ssse3)
IFUNC_IMPL_ADD (array, i, __memcpy_chk, 1,
__memcpy_chk_sse2))
/* Support sysdeps/x86_64/multiarch/memcpy.S. */
IFUNC_IMPL (i, name, memcpy,
- IFUNC_IMPL_ADD (array, i, memcpy, HAS_AVX,
+ IFUNC_IMPL_ADD (array, i, memcpy,
+ HAS_ARCH_FEATURE (AVX_Usable),
__memcpy_avx_unaligned)
- IFUNC_IMPL_ADD (array, i, memcpy, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, memcpy, HAS_CPU_FEATURE (SSSE3),
__memcpy_ssse3_back)
- IFUNC_IMPL_ADD (array, i, memcpy, HAS_SSSE3, __memcpy_ssse3)
+ IFUNC_IMPL_ADD (array, i, memcpy, HAS_CPU_FEATURE (SSSE3),
+ __memcpy_ssse3)
IFUNC_IMPL_ADD (array, i, memcpy, 1, __memcpy_sse2_unaligned)
IFUNC_IMPL_ADD (array, i, memcpy, 1, __memcpy_sse2))
/* Support sysdeps/x86_64/multiarch/mempcpy_chk.S. */
IFUNC_IMPL (i, name, __mempcpy_chk,
- IFUNC_IMPL_ADD (array, i, __mempcpy_chk, HAS_AVX,
+ IFUNC_IMPL_ADD (array, i, __mempcpy_chk,
+ HAS_ARCH_FEATURE (AVX_Usable),
__mempcpy_chk_avx_unaligned)
- IFUNC_IMPL_ADD (array, i, __mempcpy_chk, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, __mempcpy_chk,
+ HAS_CPU_FEATURE (SSSE3),
__mempcpy_chk_ssse3_back)
- IFUNC_IMPL_ADD (array, i, __mempcpy_chk, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, __mempcpy_chk,
+ HAS_CPU_FEATURE (SSSE3),
__mempcpy_chk_ssse3)
IFUNC_IMPL_ADD (array, i, __mempcpy_chk, 1,
__mempcpy_chk_sse2))
/* Support sysdeps/x86_64/multiarch/mempcpy.S. */
IFUNC_IMPL (i, name, mempcpy,
- IFUNC_IMPL_ADD (array, i, mempcpy, HAS_AVX,
+ IFUNC_IMPL_ADD (array, i, mempcpy,
+ HAS_ARCH_FEATURE (AVX_Usable),
__mempcpy_avx_unaligned)
- IFUNC_IMPL_ADD (array, i, mempcpy, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, mempcpy, HAS_CPU_FEATURE (SSSE3),
__mempcpy_ssse3_back)
- IFUNC_IMPL_ADD (array, i, mempcpy, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, mempcpy, HAS_CPU_FEATURE (SSSE3),
__mempcpy_ssse3)
IFUNC_IMPL_ADD (array, i, mempcpy, 1, __mempcpy_sse2))
/* Support sysdeps/x86_64/multiarch/strncmp.S. */
IFUNC_IMPL (i, name, strncmp,
- IFUNC_IMPL_ADD (array, i, strncmp, HAS_SSE4_2,
+ IFUNC_IMPL_ADD (array, i, strncmp, HAS_CPU_FEATURE (SSE4_2),
__strncmp_sse42)
- IFUNC_IMPL_ADD (array, i, strncmp, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, strncmp, HAS_CPU_FEATURE (SSSE3),
__strncmp_ssse3)
IFUNC_IMPL_ADD (array, i, strncmp, 1, __strncmp_sse2))
#endif
diff --git a/sysdeps/x86_64/multiarch/memcmp.S b/sysdeps/x86_64/multiarch/memcmp.S
index 8f0e274..871a081 100644
--- a/sysdeps/x86_64/multiarch/memcmp.S
+++ b/sysdeps/x86_64/multiarch/memcmp.S
@@ -27,12 +27,12 @@
ENTRY(memcmp)
.type memcmp, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
- HAS_SSSE3
+ HAS_CPU_FEATURE (SSSE3)
jnz 2f
leaq __memcmp_sse2(%rip), %rax
ret
-2: HAS_SSE4_1
+2: HAS_CPU_FEATURE (SSE4_1)
jz 3f
leaq __memcmp_sse4_1(%rip), %rax
ret
diff --git a/sysdeps/x86_64/multiarch/memcpy.S b/sysdeps/x86_64/multiarch/memcpy.S
index 780c1ad..7e119d3 100644
--- a/sysdeps/x86_64/multiarch/memcpy.S
+++ b/sysdeps/x86_64/multiarch/memcpy.S
@@ -31,15 +31,15 @@ ENTRY(__new_memcpy)
.type __new_memcpy, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq __memcpy_avx_unaligned(%rip), %rax
- HAS_AVX_FAST_UNALIGNED_LOAD
+ HAS_ARCH_FEATURE (AVX_Fast_Unaligned_Load)
jz 1f
ret
1: leaq __memcpy_sse2(%rip), %rax
- HAS_SLOW_BSF
+ HAS_ARCH_FEATURE (Slow_BSF)
jnz 2f
leaq __memcpy_sse2_unaligned(%rip), %rax
ret
-2: HAS_SSSE3
+2: HAS_CPU_FEATURE (SSSE3)
jz 3f
leaq __memcpy_ssse3(%rip), %rax
3: ret
diff --git a/sysdeps/x86_64/multiarch/memcpy_chk.S b/sysdeps/x86_64/multiarch/memcpy_chk.S
index b9b157b..81f83dd 100644
--- a/sysdeps/x86_64/multiarch/memcpy_chk.S
+++ b/sysdeps/x86_64/multiarch/memcpy_chk.S
@@ -31,13 +31,13 @@ ENTRY(__memcpy_chk)
.type __memcpy_chk, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq __memcpy_chk_sse2(%rip), %rax
- HAS_SSSE3
+ HAS_CPU_FEATURE (SSSE3)
jz 2f
leaq __memcpy_chk_ssse3(%rip), %rax
- HAS_FAST_COPY_BACKWARD
+ HAS_ARCH_FEATURE (Fast_Copy_Backward)
jz 2f
leaq __memcpy_chk_ssse3_back(%rip), %rax
- HAS_AVX_FAST_UNALIGNED_LOAD
+ HAS_ARCH_FEATURE (AVX_Fast_Unaligned_Load)
jz 2f
leaq __memcpy_chk_avx_unaligned(%rip), %rax
2: ret
diff --git a/sysdeps/x86_64/multiarch/memmove.c b/sysdeps/x86_64/multiarch/memmove.c
index dd153a3..bbddbc1 100644
--- a/sysdeps/x86_64/multiarch/memmove.c
+++ b/sysdeps/x86_64/multiarch/memmove.c
@@ -49,10 +49,10 @@ extern __typeof (__redirect_memmove) __memmove_avx_unaligned attribute_hidden;
ifunc symbol properly. */
extern __typeof (__redirect_memmove) __libc_memmove;
libc_ifunc (__libc_memmove,
- HAS_AVX_FAST_UNALIGNED_LOAD
+ HAS_ARCH_FEATURE (AVX_Fast_Unaligned_Load)
? __memmove_avx_unaligned
- : (HAS_SSSE3
- ? (HAS_FAST_COPY_BACKWARD
+ : (HAS_CPU_FEATURE (SSSE3)
+ ? (HAS_ARCH_FEATURE (Fast_Copy_Backward)
? __memmove_ssse3_back : __memmove_ssse3)
: __memmove_sse2));
diff --git a/sysdeps/x86_64/multiarch/memmove_chk.c b/sysdeps/x86_64/multiarch/memmove_chk.c
index 8b12d00..5f70e3a 100644
--- a/sysdeps/x86_64/multiarch/memmove_chk.c
+++ b/sysdeps/x86_64/multiarch/memmove_chk.c
@@ -30,8 +30,8 @@ extern __typeof (__memmove_chk) __memmove_chk_avx_unaligned attribute_hidden;
#include "debug/memmove_chk.c"
libc_ifunc (__memmove_chk,
- HAS_AVX_FAST_UNALIGNED_LOAD ? __memmove_chk_avx_unaligned :
- (HAS_SSSE3
- ? (HAS_FAST_COPY_BACKWARD
+ HAS_ARCH_FEATURE (AVX_Fast_Unaligned_Load) ? __memmove_chk_avx_unaligned :
+ (HAS_CPU_FEATURE (SSSE3)
+ ? (HAS_ARCH_FEATURE (Fast_Copy_Backward)
? __memmove_chk_ssse3_back : __memmove_chk_ssse3)
: __memmove_chk_sse2));
diff --git a/sysdeps/x86_64/multiarch/mempcpy.S b/sysdeps/x86_64/multiarch/mempcpy.S
index f346696..ad36840 100644
--- a/sysdeps/x86_64/multiarch/mempcpy.S
+++ b/sysdeps/x86_64/multiarch/mempcpy.S
@@ -29,13 +29,13 @@ ENTRY(__mempcpy)
.type __mempcpy, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq __mempcpy_sse2(%rip), %rax
- HAS_SSSE3
+ HAS_CPU_FEATURE (SSSE3)
jz 2f
leaq __mempcpy_ssse3(%rip), %rax
- HAS_FAST_COPY_BACKWARD
+ HAS_ARCH_FEATURE (Fast_Copy_Backward)
jz 2f
leaq __mempcpy_ssse3_back(%rip), %rax
- HAS_AVX_FAST_UNALIGNED_LOAD
+ HAS_ARCH_FEATURE (AVX_Fast_Unaligned_Load)
jz 2f
leaq __mempcpy_avx_unaligned(%rip), %rax
2: ret
diff --git a/sysdeps/x86_64/multiarch/mempcpy_chk.S b/sysdeps/x86_64/multiarch/mempcpy_chk.S
index a31c3b1..0a46b56 100644
--- a/sysdeps/x86_64/multiarch/mempcpy_chk.S
+++ b/sysdeps/x86_64/multiarch/mempcpy_chk.S
@@ -31,13 +31,13 @@ ENTRY(__mempcpy_chk)
.type __mempcpy_chk, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq __mempcpy_chk_sse2(%rip), %rax
- HAS_SSSE3
+ HAS_CPU_FEATURE (SSSE3)
jz 2f
leaq __mempcpy_chk_ssse3(%rip), %rax
- HAS_FAST_COPY_BACKWARD
+ HAS_ARCH_FEATURE (Fast_Copy_Backward)
jz 2f
leaq __mempcpy_chk_ssse3_back(%rip), %rax
- HAS_AVX_FAST_UNALIGNED_LOAD
+ HAS_ARCH_FEATURE (AVX_Fast_Unaligned_Load)
jz 2f
leaq __mempcpy_chk_avx_unaligned(%rip), %rax
2: ret
diff --git a/sysdeps/x86_64/multiarch/memset.S b/sysdeps/x86_64/multiarch/memset.S
index e542548..16fefa7 100644
--- a/sysdeps/x86_64/multiarch/memset.S
+++ b/sysdeps/x86_64/multiarch/memset.S
@@ -28,7 +28,7 @@ ENTRY(memset)
.type memset, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq __memset_sse2(%rip), %rax
- HAS_AVX2
+ HAS_ARCH_FEATURE (AVX2_Usable)
jz 2f
leaq __memset_avx2(%rip), %rax
2: ret
diff --git a/sysdeps/x86_64/multiarch/memset_chk.S b/sysdeps/x86_64/multiarch/memset_chk.S
index 63bcc89..ef8c64f 100644
--- a/sysdeps/x86_64/multiarch/memset_chk.S
+++ b/sysdeps/x86_64/multiarch/memset_chk.S
@@ -27,7 +27,7 @@ ENTRY(__memset_chk)
.type __memset_chk, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq __memset_chk_sse2(%rip), %rax
- HAS_AVX2
+ HAS_ARCH_FEATURE (AVX2_Usable)
jz 2f
leaq __memset_chk_avx2(%rip), %rax
2: ret
diff --git a/sysdeps/x86_64/multiarch/sched_cpucount.c b/sysdeps/x86_64/multiarch/sched_cpucount.c
index 72ad7b0..e9391a2 100644
--- a/sysdeps/x86_64/multiarch/sched_cpucount.c
+++ b/sysdeps/x86_64/multiarch/sched_cpucount.c
@@ -33,4 +33,4 @@
#undef __sched_cpucount
libc_ifunc (__sched_cpucount,
- HAS_POPCOUNT ? popcount_cpucount : generic_cpucount);
+ HAS_CPU_FEATURE (POPCOUNT) ? popcount_cpucount : generic_cpucount);
diff --git a/sysdeps/x86_64/multiarch/strcat.S b/sysdeps/x86_64/multiarch/strcat.S
index 986b13f..25d926c 100644
--- a/sysdeps/x86_64/multiarch/strcat.S
+++ b/sysdeps/x86_64/multiarch/strcat.S
@@ -49,10 +49,10 @@ ENTRY(STRCAT)
.type STRCAT, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq STRCAT_SSE2_UNALIGNED(%rip), %rax
- HAS_FAST_UNALIGNED_LOAD
+ HAS_ARCH_FEATURE (Fast_Unaligned_Load)
jnz 2f
leaq STRCAT_SSE2(%rip), %rax
- HAS_SSSE3
+ HAS_CPU_FEATURE (SSSE3)
jz 2f
leaq STRCAT_SSSE3(%rip), %rax
2: ret
diff --git a/sysdeps/x86_64/multiarch/strchr.S b/sysdeps/x86_64/multiarch/strchr.S
index 373fb87..0c5fdd9 100644
--- a/sysdeps/x86_64/multiarch/strchr.S
+++ b/sysdeps/x86_64/multiarch/strchr.S
@@ -27,7 +27,7 @@ ENTRY(strchr)
.type strchr, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq __strchr_sse2(%rip), %rax
-2: HAS_SLOW_BSF
+2: HAS_ARCH_FEATURE (Slow_BSF)
jz 3f
leaq __strchr_sse2_no_bsf(%rip), %rax
3: ret
diff --git a/sysdeps/x86_64/multiarch/strcmp.S b/sysdeps/x86_64/multiarch/strcmp.S
index b219319..c180ce6 100644
--- a/sysdeps/x86_64/multiarch/strcmp.S
+++ b/sysdeps/x86_64/multiarch/strcmp.S
@@ -87,17 +87,17 @@ ENTRY(STRCMP)
LOAD_RTLD_GLOBAL_RO_RDX
#ifdef USE_AS_STRCMP
leaq __strcmp_sse2_unaligned(%rip), %rax
- HAS_FAST_UNALIGNED_LOAD
+ HAS_ARCH_FEATURE (Fast_Unaligned_Load)
jnz 3f
#else
- HAS_SLOW_SSE4_2
+ HAS_ARCH_FEATURE (Slow_SSE4_2)
jnz 2f
leaq STRCMP_SSE42(%rip), %rax
- HAS_SSE4_2
+ HAS_CPU_FEATURE (SSE4_2)
jnz 3f
#endif
2: leaq STRCMP_SSSE3(%rip), %rax
- HAS_SSSE3
+ HAS_CPU_FEATURE (SSSE3)
jnz 3f
leaq STRCMP_SSE2(%rip), %rax
3: ret
@@ -109,16 +109,16 @@ ENTRY(__strcasecmp)
LOAD_RTLD_GLOBAL_RO_RDX
# ifdef HAVE_AVX_SUPPORT
leaq __strcasecmp_avx(%rip), %rax
- HAS_AVX
+ HAS_ARCH_FEATURE (AVX_Usable)
jnz 3f
# endif
- HAS_SLOW_SSE4_2
+ HAS_ARCH_FEATURE (Slow_SSE4_2)
jnz 2f
leaq __strcasecmp_sse42(%rip), %rax
- HAS_SSE4_2
+ HAS_CPU_FEATURE (SSE4_2)
jnz 3f
2: leaq __strcasecmp_ssse3(%rip), %rax
- HAS_SSSE3
+ HAS_CPU_FEATURE (SSSE3)
jnz 3f
leaq __strcasecmp_sse2(%rip), %rax
3: ret
@@ -131,16 +131,16 @@ ENTRY(__strncasecmp)
LOAD_RTLD_GLOBAL_RO_RDX
# ifdef HAVE_AVX_SUPPORT
leaq __strncasecmp_avx(%rip), %rax
- HAS_AVX
+ HAS_ARCH_FEATURE (AVX_Usable)
jnz 3f
# endif
- HAS_SLOW_SSE4_2
+ HAS_ARCH_FEATURE (Slow_SSE4_2)
jnz 2f
leaq __strncasecmp_sse42(%rip), %rax
- HAS_SSE4_2
+ HAS_CPU_FEATURE (SSE4_2)
jnz 3f
2: leaq __strncasecmp_ssse3(%rip), %rax
- HAS_SSSE3
+ HAS_CPU_FEATURE (SSSE3)
jnz 3f
leaq __strncasecmp_sse2(%rip), %rax
3: ret
diff --git a/sysdeps/x86_64/multiarch/strcpy.S b/sysdeps/x86_64/multiarch/strcpy.S
index 5c040ae..3aae8ee 100644
--- a/sysdeps/x86_64/multiarch/strcpy.S
+++ b/sysdeps/x86_64/multiarch/strcpy.S
@@ -63,10 +63,10 @@ ENTRY(STRCPY)
.type STRCPY, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq STRCPY_SSE2_UNALIGNED(%rip), %rax
- HAS_FAST_UNALIGNED_LOAD
+ HAS_ARCH_FEATURE (Fast_Unaligned_Load)
jnz 2f
leaq STRCPY_SSE2(%rip), %rax
- HAS_SSSE3
+ HAS_CPU_FEATURE (SSSE3)
jz 2f
leaq STRCPY_SSSE3(%rip), %rax
2: ret
diff --git a/sysdeps/x86_64/multiarch/strcspn.S b/sysdeps/x86_64/multiarch/strcspn.S
index 340cab6..45c69b3 100644
--- a/sysdeps/x86_64/multiarch/strcspn.S
+++ b/sysdeps/x86_64/multiarch/strcspn.S
@@ -47,7 +47,7 @@ ENTRY(STRCSPN)
.type STRCSPN, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq STRCSPN_SSE2(%rip), %rax
- HAS_SSE4_2
+ HAS_CPU_FEATURE (SSE4_2)
jz 2f
leaq STRCSPN_SSE42(%rip), %rax
2: ret
diff --git a/sysdeps/x86_64/multiarch/strspn.S b/sysdeps/x86_64/multiarch/strspn.S
index c0afcf3..c4d3b27 100644
--- a/sysdeps/x86_64/multiarch/strspn.S
+++ b/sysdeps/x86_64/multiarch/strspn.S
@@ -32,7 +32,7 @@ ENTRY(strspn)
.type strspn, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq __strspn_sse2(%rip), %rax
- HAS_SSE4_2
+ HAS_CPU_FEATURE (SSE4_2)
jz 2f
leaq __strspn_sse42(%rip), %rax
2: ret
diff --git a/sysdeps/x86_64/multiarch/strstr.c b/sysdeps/x86_64/multiarch/strstr.c
index 507994b..b8827f0 100644
--- a/sysdeps/x86_64/multiarch/strstr.c
+++ b/sysdeps/x86_64/multiarch/strstr.c
@@ -41,7 +41,10 @@ extern __typeof (__redirect_strstr) __strstr_sse2 attribute_hidden;
/* Avoid DWARF definition DIE on ifunc symbol so that GDB can handle
ifunc symbol properly. */
extern __typeof (__redirect_strstr) __libc_strstr;
-libc_ifunc (__libc_strstr, HAS_FAST_UNALIGNED_LOAD ? __strstr_sse2_unaligned : __strstr_sse2)
+libc_ifunc (__libc_strstr,
+ HAS_ARCH_FEATURE (Fast_Unaligned_Load)
+ ? __strstr_sse2_unaligned
+ : __strstr_sse2)
#undef strstr
strong_alias (__libc_strstr, strstr)
diff --git a/sysdeps/x86_64/multiarch/test-multiarch.c b/sysdeps/x86_64/multiarch/test-multiarch.c
index 949d26e..e893894 100644
--- a/sysdeps/x86_64/multiarch/test-multiarch.c
+++ b/sysdeps/x86_64/multiarch/test-multiarch.c
@@ -75,12 +75,18 @@ do_test (int argc, char **argv)
int fails;
get_cpuinfo ();
- fails = check_proc ("avx", HAS_AVX, "HAS_AVX");
- fails += check_proc ("fma4", HAS_FMA4, "HAS_FMA4");
- fails += check_proc ("sse4_2", HAS_SSE4_2, "HAS_SSE4_2");
- fails += check_proc ("sse4_1", HAS_SSE4_1, "HAS_SSE4_1");
- fails += check_proc ("ssse3", HAS_SSSE3, "HAS_SSSE3");
- fails += check_proc ("popcnt", HAS_POPCOUNT, "HAS_POPCOUNT");
+ fails = check_proc ("avx", HAS_ARCH_FEATURE (AVX_Usable),
+ "HAS_ARCH_FEATURE (AVX_Usable)");
+ fails += check_proc ("fma4", HAS_ARCH_FEATURE (FMA4_Usable),
+ "HAS_ARCH_FEATURE (FMA4_Usable)");
+ fails += check_proc ("sse4_2", HAS_CPU_FEATURE (SSE4_2),
+ "HAS_CPU_FEATURE (SSE4_2)");
+ fails += check_proc ("sse4_1", HAS_CPU_FEATURE (SSE4_1)
+ , "HAS_CPU_FEATURE (SSE4_1)");
+ fails += check_proc ("ssse3", HAS_CPU_FEATURE (SSSE3),
+ "HAS_CPU_FEATURE (SSSE3)");
+ fails += check_proc ("popcnt", HAS_CPU_FEATURE (POPCOUNT),
+ "HAS_CPU_FEATURE (POPCOUNT)");
printf ("%d differences between /proc/cpuinfo and glibc code.\n", fails);
diff --git a/sysdeps/x86_64/multiarch/wcscpy.S b/sysdeps/x86_64/multiarch/wcscpy.S
index 40c1fc4..c47c51c 100644
--- a/sysdeps/x86_64/multiarch/wcscpy.S
+++ b/sysdeps/x86_64/multiarch/wcscpy.S
@@ -28,7 +28,7 @@
ENTRY(wcscpy)
.type wcscpy, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
- HAS_SSSE3
+ HAS_CPU_FEATURE (SSSE3)
jnz 2f
leaq __wcscpy_sse2(%rip), %rax
ret
diff --git a/sysdeps/x86_64/multiarch/wmemcmp.S b/sysdeps/x86_64/multiarch/wmemcmp.S
index c6b73aa..62215f4 100644
--- a/sysdeps/x86_64/multiarch/wmemcmp.S
+++ b/sysdeps/x86_64/multiarch/wmemcmp.S
@@ -27,12 +27,12 @@
ENTRY(wmemcmp)
.type wmemcmp, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
- HAS_SSSE3
+ HAS_CPU_FEATURE (SSSE3)
jnz 2f
leaq __wmemcmp_sse2(%rip), %rax
ret
-2: HAS_SSE4_1
+2: HAS_CPU_FEATURE (SSE4_1)
jz 3f
leaq __wmemcmp_sse4_1(%rip), %rax
ret
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=2ac8834fcb0dba1608f32c88322c8b221ba58002
commit 2ac8834fcb0dba1608f32c88322c8b221ba58002
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Sat Aug 1 07:47:16 2015 -0700
Update elision-conf.c for cpu-feattures
diff --git a/sysdeps/unix/sysv/linux/x86/elision-conf.c b/sysdeps/unix/sysv/linux/x86/elision-conf.c
index 84902ac..4a73382 100644
--- a/sysdeps/unix/sysv/linux/x86/elision-conf.c
+++ b/sysdeps/unix/sysv/linux/x86/elision-conf.c
@@ -62,11 +62,11 @@ elision_init (int argc __attribute__ ((unused)),
char **argv __attribute__ ((unused)),
char **environ)
{
- __elision_available = HAS_RTM;
+ __elision_available = HAS_CPU_FEATURE (RTM);
#ifdef ENABLE_LOCK_ELISION
__pthread_force_elision = __libc_enable_secure ? 0 : __elision_available;
#endif
- if (!HAS_RTM)
+ if (!HAS_CPU_FEATURE (RTM))
__elision_aconf.retry_try_xbegin = 0; /* Disable elision on rwlocks */
}
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=267df24fff308c8dd7ab9da4094080e34bed35b6
commit 267df24fff308c8dd7ab9da4094080e34bed35b6
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Sat Aug 1 07:46:39 2015 -0700
Update libmvec for cpu-features
diff --git a/sysdeps/x86_64/fpu/math-tests-arch.h b/sysdeps/x86_64/fpu/math-tests-arch.h
index 0de4cd8..fb8251b 100644
--- a/sysdeps/x86_64/fpu/math-tests-arch.h
+++ b/sysdeps/x86_64/fpu/math-tests-arch.h
@@ -24,7 +24,7 @@
# define CHECK_ARCH_EXT \
do \
{ \
- if (!HAS_AVX) return; \
+ if (!HAS_ARCH_FEATURE (AVX_Usable)) return; \
} \
while (0)
@@ -36,7 +36,7 @@
# define CHECK_ARCH_EXT \
do \
{ \
- if (!HAS_AVX2) return; \
+ if (!HAS_ARCH_FEATURE (AVX2_Usable)) return; \
} \
while (0)
@@ -48,7 +48,7 @@
# define CHECK_ARCH_EXT \
do \
{ \
- if (!HAS_AVX512F) return; \
+ if (!HAS_ARCH_FEATURE (AVX512F_Usable)) return; \
} \
while (0)
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.S
index 74305fb..c64485e 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.S
@@ -24,7 +24,7 @@ ENTRY (_ZGVbN2v_cos)
.type _ZGVbN2v_cos, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVbN2v_cos_sse4(%rip), %rax
- HAS_SSE4_1
+ HAS_CPU_FEATURE (SSE4_1)
jz 2f
ret
2: leaq _ZGVbN2v_cos_sse2(%rip), %rax
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.S
index 5ac3d0e..6460690 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.S
@@ -24,7 +24,7 @@ ENTRY (_ZGVdN4v_cos)
.type _ZGVdN4v_cos, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVdN4v_cos_avx2(%rip), %rax
- HAS_AVX2
+ HAS_ARCH_FEATURE (AVX2_Usable)
jz 2f
ret
2: leaq _ZGVdN4v_cos_sse_wrapper(%rip), %rax
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.S
index 7d8f31c..add99a1 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.S
@@ -24,10 +24,10 @@ ENTRY (_ZGVeN8v_cos)
.type _ZGVeN8v_cos, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
1: leaq _ZGVeN8v_cos_skx(%rip), %rax
- HAS_AVX512DQ
+ HAS_ARCH_FEATURE (AVX512DQ_Usable)
jnz 2f
leaq _ZGVeN8v_cos_knl(%rip), %rax
- HAS_AVX512F
+ HAS_ARCH_FEATURE (AVX512F_Usable)
jnz 2f
leaq _ZGVeN8v_cos_avx2_wrapper(%rip), %rax
2: ret
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
index 1d625ae..538e991 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S
@@ -24,7 +24,7 @@ ENTRY (_ZGVbN2v_exp)
.type _ZGVbN2v_exp, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVbN2v_exp_sse4(%rip), %rax
- HAS_SSE4_1
+ HAS_CPU_FEATURE (SSE4_1)
jz 2f
ret
2: leaq _ZGVbN2v_exp_sse2(%rip), %rax
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.S
index a80702b..c68ca93 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.S
@@ -24,7 +24,7 @@ ENTRY (_ZGVdN4v_exp)
.type _ZGVdN4v_exp, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVdN4v_exp_avx2(%rip), %rax
- HAS_AVX2
+ HAS_ARCH_FEATURE (AVX2_Usable)
jz 2f
ret
2: leaq _ZGVdN4v_exp_sse_wrapper(%rip), %rax
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.S
index 3389c89..d3985dc 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.S
@@ -24,10 +24,10 @@ ENTRY (_ZGVeN8v_exp)
.type _ZGVeN8v_exp, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVeN8v_exp_skx(%rip), %rax
- HAS_AVX512DQ
+ HAS_ARCH_FEATURE (AVX512DQ_Usable)
jnz 2f
leaq _ZGVeN8v_exp_knl(%rip), %rax
- HAS_AVX512F
+ HAS_ARCH_FEATURE (AVX512F_Usable)
jnz 2f
leaq _ZGVeN8v_exp_avx2_wrapper(%rip), %rax
2: ret
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.S
index 4f9d990..adcb34e 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.S
@@ -24,7 +24,7 @@ ENTRY (_ZGVbN2v_log)
.type _ZGVbN2v_log, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVbN2v_log_sse4(%rip), %rax
- HAS_SSE4_1
+ HAS_CPU_FEATURE (SSE4_1)
jz 2f
ret
2: leaq _ZGVbN2v_log_sse2(%rip), %rax
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.S
index 594adf6..9c9f84a 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.S
@@ -24,7 +24,7 @@ ENTRY (_ZGVdN4v_log)
.type _ZGVdN4v_log, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVdN4v_log_avx2(%rip), %rax
- HAS_AVX2
+ HAS_ARCH_FEATURE (AVX2_Usable)
jz 2f
ret
2: leaq _ZGVdN4v_log_sse_wrapper(%rip), %rax
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.S
index ca22197..0ceb9eb 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.S
@@ -24,10 +24,10 @@ ENTRY (_ZGVeN8v_log)
.type _ZGVeN8v_log, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVeN8v_log_skx(%rip), %rax
- HAS_AVX512DQ
+ HAS_ARCH_FEATURE (AVX512DQ_Usable)
jnz 2f
leaq _ZGVeN8v_log_knl(%rip), %rax
- HAS_AVX512F
+ HAS_ARCH_FEATURE (AVX512F_Usable)
jnz 2f
leaq _ZGVeN8v_log_avx2_wrapper(%rip), %rax
2: ret
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.S
index 49f1fb9..0fbdb43 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.S
@@ -24,7 +24,7 @@ ENTRY (_ZGVbN2vv_pow)
.type _ZGVbN2vv_pow, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVbN2vv_pow_sse4(%rip), %rax
- HAS_SSE4_1
+ HAS_CPU_FEATURE (SSE4_1)
jz 2f
ret
2: leaq _ZGVbN2vv_pow_sse2(%rip), %rax
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.S
index dff294f..0cf5c9b 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.S
@@ -24,7 +24,7 @@ ENTRY (_ZGVdN4vv_pow)
.type _ZGVdN4vv_pow, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVdN4vv_pow_avx2(%rip), %rax
- HAS_AVX2
+ HAS_ARCH_FEATURE (AVX2_Usable)
jz 2f
ret
2: leaq _ZGVdN4vv_pow_sse_wrapper(%rip), %rax
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.S
index 197925b..9afdf67 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.S
@@ -24,10 +24,10 @@ ENTRY (_ZGVeN8vv_pow)
.type _ZGVeN8vv_pow, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVeN8vv_pow_skx(%rip), %rax
- HAS_AVX512DQ
+ HAS_ARCH_FEATURE (AVX512DQ_Usable)
jnz 2f
leaq _ZGVeN8vv_pow_knl(%rip), %rax
- HAS_AVX512F
+ HAS_ARCH_FEATURE (AVX512F_Usable)
jnz 2f
leaq _ZGVeN8vv_pow_avx2_wrapper(%rip), %rax
2: ret
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.S
index 80bd858..eec486b 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.S
@@ -24,7 +24,7 @@ ENTRY (_ZGVbN2v_sin)
.type _ZGVbN2v_sin, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVbN2v_sin_sse4(%rip), %rax
- HAS_SSE4_1
+ HAS_CPU_FEATURE (SSE4_1)
jz 2f
ret
2: leaq _ZGVbN2v_sin_sse2(%rip), %rax
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S
index 861c9b3..17cb5c1 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S
@@ -24,7 +24,7 @@ ENTRY (_ZGVdN4v_sin)
.type _ZGVdN4v_sin, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVdN4v_sin_avx2(%rip), %rax
- HAS_AVX2
+ HAS_ARCH_FEATURE (AVX2_Usable)
jz 2f
ret
2: leaq _ZGVdN4v_sin_sse_wrapper(%rip), %rax
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.S
index 3482ac5..61ee0c0 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.S
@@ -24,10 +24,10 @@ ENTRY (_ZGVeN8v_sin)
.type _ZGVeN8v_sin, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVeN8v_sin_skx(%rip), %rax
- HAS_AVX512DQ
+ HAS_ARCH_FEATURE (AVX512DQ_Usable)
jnz 2f
leaq _ZGVeN8v_sin_knl(%rip), %rax
- HAS_AVX512F
+ HAS_ARCH_FEATURE (AVX512F_Usable)
jnz 2f
leaq _ZGVeN8v_sin_avx2_wrapper(%rip), %rax
2: ret
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.S
index 8ae0903..3d03c53 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.S
@@ -24,7 +24,7 @@ ENTRY (_ZGVbN2vvv_sincos)
.type _ZGVbN2vvv_sincos, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVbN2vvv_sincos_sse4(%rip), %rax
- HAS_SSE4_1
+ HAS_CPU_FEATURE (SSE4_1)
jz 2f
ret
2: leaq _ZGVbN2vvv_sincos_sse2(%rip), %rax
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.S
index 671e8fc..1cc2b69 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.S
@@ -24,7 +24,7 @@ ENTRY (_ZGVdN4vvv_sincos)
.type _ZGVdN4vvv_sincos, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVdN4vvv_sincos_avx2(%rip), %rax
- HAS_AVX2
+ HAS_ARCH_FEATURE (AVX2_Usable)
jz 2f
ret
2: leaq _ZGVdN4vvv_sincos_sse_wrapper(%rip), %rax
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.S
index 24922e1..850f221 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.S
@@ -24,10 +24,10 @@ ENTRY (_ZGVeN8vvv_sincos)
.type _ZGVeN8vvv_sincos, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVeN8vvv_sincos_skx(%rip), %rax
- HAS_AVX512DQ
+ HAS_ARCH_FEATURE (AVX512DQ_Usable)
jnz 2f
leaq _ZGVeN8vvv_sincos_knl(%rip), %rax
- HAS_AVX512F
+ HAS_ARCH_FEATURE (AVX512F_Usable)
jnz 2f
leaq _ZGVeN8vvv_sincos_avx2_wrapper(%rip), %rax
2: ret
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core.S
index fdd640c..227f46e 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core.S
@@ -24,10 +24,10 @@ ENTRY (_ZGVeN16v_cosf)
.type _ZGVeN16v_cosf, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVeN16v_cosf_skx(%rip), %rax
- HAS_AVX512DQ
+ HAS_ARCH_FEATURE (AVX512DQ_Usable)
jnz 2f
leaq _ZGVeN16v_cosf_knl(%rip), %rax
- HAS_AVX512F
+ HAS_ARCH_FEATURE (AVX512F_Usable)
jnz 2f
leaq _ZGVeN16v_cosf_avx2_wrapper(%rip), %rax
2: ret
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.S
index b9b2210..2e98938 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.S
@@ -24,7 +24,7 @@ ENTRY (_ZGVbN4v_cosf)
.type _ZGVbN4v_cosf, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVbN4v_cosf_sse4(%rip), %rax
- HAS_SSE4_1
+ HAS_CPU_FEATURE (SSE4_1)
jz 2f
ret
2: leaq _ZGVbN4v_cosf_sse2(%rip), %rax
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core.S
index b9589b3..830b10f 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core.S
@@ -24,7 +24,7 @@ ENTRY (_ZGVdN8v_cosf)
.type _ZGVdN8v_cosf, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVdN8v_cosf_avx2(%rip), %rax
- HAS_AVX2
+ HAS_ARCH_FEATURE (AVX2_Usable)
jz 2f
ret
2: leaq _ZGVdN8v_cosf_sse_wrapper(%rip), %rax
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core.S
index 6a1fdbb..79ac304 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core.S
@@ -24,10 +24,10 @@ ENTRY (_ZGVeN16v_expf)
.type _ZGVeN16v_expf, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVeN16v_expf_skx(%rip), %rax
- HAS_AVX512DQ
+ HAS_ARCH_FEATURE (AVX512DQ_Usable)
jnz 2f
leaq _ZGVeN16v_expf_knl(%rip), %rax
- HAS_AVX512F
+ HAS_ARCH_FEATURE (AVX512F_Usable)
jnz 2f
leaq _ZGVeN16v_expf_avx2_wrapper(%rip), %rax
2: ret
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core.S
index 6ad7841..e9781f3 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core.S
@@ -24,7 +24,7 @@ ENTRY (_ZGVbN4v_expf)
.type _ZGVbN4v_expf, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVbN4v_expf_sse4(%rip), %rax
- HAS_SSE4_1
+ HAS_CPU_FEATURE (SSE4_1)
jz 2f
ret
2: leaq _ZGVbN4v_expf_sse2(%rip), %rax
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core.S
index a5e1917..41e59ef 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core.S
@@ -24,7 +24,7 @@ ENTRY (_ZGVdN8v_expf)
.type _ZGVdN8v_expf, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVdN8v_expf_avx2(%rip), %rax
- HAS_AVX2
+ HAS_ARCH_FEATURE (AVX2_Usable)
jz 2f
ret
2: leaq _ZGVdN8v_expf_sse_wrapper(%rip), %rax
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.S
index 3d2b8b1..fa01161 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.S
@@ -24,10 +24,10 @@ ENTRY (_ZGVeN16v_logf)
.type _ZGVeN16v_logf, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVeN16v_logf_skx(%rip), %rax
- HAS_AVX512DQ
+ HAS_ARCH_FEATURE (AVX512DQ_Usable)
jnz 2f
leaq _ZGVeN16v_logf_knl(%rip), %rax
- HAS_AVX512F
+ HAS_ARCH_FEATURE (AVX512F_Usable)
jnz 2f
leaq _ZGVeN16v_logf_avx2_wrapper(%rip), %rax
2: ret
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core.S
index a8dd898..0f1ca73 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core.S
@@ -24,7 +24,7 @@ ENTRY (_ZGVbN4v_logf)
.type _ZGVbN4v_logf, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVbN4v_logf_sse4(%rip), %rax
- HAS_SSE4_1
+ HAS_CPU_FEATURE (SSE4_1)
jz 2f
ret
2: leaq _ZGVbN4v_logf_sse2(%rip), %rax
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core.S
index f5356d8..65d1f7f 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core.S
@@ -24,7 +24,7 @@ ENTRY (_ZGVdN8v_logf)
.type _ZGVdN8v_logf, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVdN8v_logf_avx2(%rip), %rax
- HAS_AVX2
+ HAS_ARCH_FEATURE (AVX2_Usable)
jz 2f
ret
2: leaq _ZGVdN8v_logf_sse_wrapper(%rip), %rax
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.S
index 3d32202..e33e83e 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.S
@@ -24,10 +24,10 @@ ENTRY (_ZGVeN16vv_powf)
.type _ZGVeN16vv_powf, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVeN16vv_powf_skx(%rip), %rax
- HAS_AVX512DQ
+ HAS_ARCH_FEATURE (AVX512DQ_Usable)
jnz 2f
leaq _ZGVeN16vv_powf_knl(%rip), %rax
- HAS_AVX512F
+ HAS_ARCH_FEATURE (AVX512F_Usable)
jnz 2f
leaq _ZGVeN16vv_powf_avx2_wrapper(%rip), %rax
2: ret
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.S
index 94f172c..28abeec 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.S
@@ -24,7 +24,7 @@ ENTRY (_ZGVbN4vv_powf)
.type _ZGVbN4vv_powf, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVbN4vv_powf_sse4(%rip), %rax
- HAS_SSE4_1
+ HAS_CPU_FEATURE (SSE4_1)
jz 2f
ret
2: leaq _ZGVbN4vv_powf_sse2(%rip), %rax
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.S
index 3618adf..0cbbe5d 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.S
@@ -24,7 +24,7 @@ ENTRY (_ZGVdN8vv_powf)
.type _ZGVdN8vv_powf, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVdN8vv_powf_avx2(%rip), %rax
- HAS_AVX2
+ HAS_ARCH_FEATURE (AVX2_Usable)
jz 2f
ret
2: leaq _ZGVdN8vv_powf_sse_wrapper(%rip), %rax
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core.S
index f20df2f..a32b66e 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf16_core.S
@@ -24,10 +24,10 @@ ENTRY (_ZGVeN16vvv_sincosf)
.type _ZGVeN16vvv_sincosf, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVeN16vvv_sincosf_skx(%rip), %rax
- HAS_AVX512DQ
+ HAS_ARCH_FEATURE (AVX512DQ_Usable)
jnz 2f
leaq _ZGVeN16vvv_sincosf_knl(%rip), %rax
- HAS_AVX512F
+ HAS_ARCH_FEATURE (AVX512F_Usable)
jnz 2f
leaq _ZGVeN16vvv_sincosf_avx2_wrapper(%rip), %rax
2: ret
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core.S
index a83c830..e64fbfb 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf4_core.S
@@ -24,7 +24,7 @@ ENTRY (_ZGVbN4vvv_sincosf)
.type _ZGVbN4vvv_sincosf, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVbN4vvv_sincosf_sse4(%rip), %rax
- HAS_SSE4_1
+ HAS_CPU_FEATURE (SSE4_1)
jz 2f
ret
2: leaq _ZGVbN4vvv_sincosf_sse2(%rip), %rax
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core.S
index a20772b..b3f31c6 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sincosf8_core.S
@@ -24,7 +24,7 @@ ENTRY (_ZGVdN8vvv_sincosf)
.type _ZGVdN8vvv_sincosf, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVdN8vvv_sincosf_avx2(%rip), %rax
- HAS_AVX2
+ HAS_ARCH_FEATURE (AVX2_Usable)
jz 2f
ret
2: leaq _ZGVdN8vvv_sincosf_sse_wrapper(%rip), %rax
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core.S
index 25ec834..c7a0adb 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core.S
@@ -24,10 +24,10 @@ ENTRY (_ZGVeN16v_sinf)
.type _ZGVeN16v_sinf, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVeN16v_sinf_skx(%rip), %rax
- HAS_AVX512DQ
+ HAS_ARCH_FEATURE (AVX512DQ_Usable)
jnz 2f
leaq _ZGVeN16v_sinf_knl(%rip), %rax
- HAS_AVX512F
+ HAS_ARCH_FEATURE (AVX512F_Usable)
jnz 2f
leaq _ZGVeN16v_sinf_avx2_wrapper(%rip), %rax
2: ret
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core.S
index 4a71052..58bd177 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core.S
@@ -24,7 +24,7 @@ ENTRY (_ZGVbN4v_sinf)
.type _ZGVbN4v_sinf, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
leaq _ZGVbN4v_sinf_sse4(%rip), %rax
- HAS_SSE4_1
+ HAS_CPU_FEATURE (SSE4_1)
jz 2f
ret
2: leaq _ZGVbN4v_sinf_sse2(%rip), %rax
diff --git a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core.S b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core.S
index e14c5b2..debec59 100644
--- a/sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core.S
+++ b/sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core.S
@@ -24,7 +24,7 @@ ENTRY (_ZGVdN8v_sinf)
.type _ZGVdN8v_sinf, @gnu_indirect_function
LOAD_RTLD_GLOBAL_RO_RDX
1: leaq _ZGVdN8v_sinf_avx2(%rip), %rax
- HAS_AVX2
+ HAS_ARCH_FEATURE (AVX2_Usable)
jz 2f
ret
2: leaq _ZGVdN8v_sinf_sse_wrapper(%rip), %rax
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=7ff00d52660cffa7006dc12ce9ae6d4126b118a5
commit 7ff00d52660cffa7006dc12ce9ae6d4126b118a5
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Sat Aug 1 07:45:21 2015 -0700
Update i386 for cpu-features
diff --git a/sysdeps/i386/i686/fpu/multiarch/e_expf.c b/sysdeps/i386/i686/fpu/multiarch/e_expf.c
index 5102dae..6978883 100644
--- a/sysdeps/i386/i686/fpu/multiarch/e_expf.c
+++ b/sysdeps/i386/i686/fpu/multiarch/e_expf.c
@@ -23,11 +23,15 @@ extern double __ieee754_expf_ia32 (double);
double __ieee754_expf (double);
libm_ifunc (__ieee754_expf,
- HAS_SSE2 ? __ieee754_expf_sse2 : __ieee754_expf_ia32);
+ HAS_CPU_FEATURE (SSE2)
+ ? __ieee754_expf_sse2
+ : __ieee754_expf_ia32);
extern double __expf_finite_sse2 (double);
extern double __expf_finite_ia32 (double);
double __expf_finite (double);
libm_ifunc (__expf_finite,
- HAS_SSE2 ? __expf_finite_sse2 : __expf_finite_ia32);
+ HAS_CPU_FEATURE (SSE2)
+ ? __expf_finite_sse2
+ : __expf_finite_ia32);
diff --git a/sysdeps/i386/i686/fpu/multiarch/s_cosf.c b/sysdeps/i386/i686/fpu/multiarch/s_cosf.c
index 0799dca..e32b2f4 100644
--- a/sysdeps/i386/i686/fpu/multiarch/s_cosf.c
+++ b/sysdeps/i386/i686/fpu/multiarch/s_cosf.c
@@ -22,7 +22,7 @@ extern float __cosf_sse2 (float);
extern float __cosf_ia32 (float);
float __cosf (float);
-libm_ifunc (__cosf, HAS_SSE2 ? __cosf_sse2 : __cosf_ia32);
+libm_ifunc (__cosf, HAS_CPU_FEATURE (SSE2) ? __cosf_sse2 : __cosf_ia32);
weak_alias (__cosf, cosf);
#define COSF __cosf_ia32
diff --git a/sysdeps/i386/i686/fpu/multiarch/s_sincosf.c b/sysdeps/i386/i686/fpu/multiarch/s_sincosf.c
index 384d844..0d827e0 100644
--- a/sysdeps/i386/i686/fpu/multiarch/s_sincosf.c
+++ b/sysdeps/i386/i686/fpu/multiarch/s_sincosf.c
@@ -22,7 +22,8 @@ extern void __sincosf_sse2 (float, float *, float *);
extern void __sincosf_ia32 (float, float *, float *);
void __sincosf (float, float *, float *);
-libm_ifunc (__sincosf, HAS_SSE2 ? __sincosf_sse2 : __sincosf_ia32);
+libm_ifunc (__sincosf,
+ HAS_CPU_FEATURE (SSE2) ? __sincosf_sse2 : __sincosf_ia32);
weak_alias (__sincosf, sincosf);
#define SINCOSF __sincosf_ia32
diff --git a/sysdeps/i386/i686/fpu/multiarch/s_sinf.c b/sysdeps/i386/i686/fpu/multiarch/s_sinf.c
index 6b62772..18afaa2 100644
--- a/sysdeps/i386/i686/fpu/multiarch/s_sinf.c
+++ b/sysdeps/i386/i686/fpu/multiarch/s_sinf.c
@@ -22,7 +22,7 @@ extern float __sinf_sse2 (float);
extern float __sinf_ia32 (float);
float __sinf (float);
-libm_ifunc (__sinf, HAS_SSE2 ? __sinf_sse2 : __sinf_ia32);
+libm_ifunc (__sinf, HAS_CPU_FEATURE (SSE2) ? __sinf_sse2 : __sinf_ia32);
weak_alias (__sinf, sinf);
#define SINF __sinf_ia32
#include <sysdeps/ieee754/flt-32/s_sinf.c>
diff --git a/sysdeps/i386/i686/multiarch/bcopy.S b/sysdeps/i386/i686/multiarch/bcopy.S
index 7657082..3fc95dc 100644
--- a/sysdeps/i386/i686/multiarch/bcopy.S
+++ b/sysdeps/i386/i686/multiarch/bcopy.S
@@ -28,15 +28,15 @@ ENTRY(bcopy)
.type bcopy, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
LOAD_FUNC_GOT_EAX (__bcopy_ia32)
- HAS_SSE2
+ HAS_CPU_FEATURE (SSE2)
jz 2f
LOAD_FUNC_GOT_EAX (__bcopy_sse2_unaligned)
- HAS_FAST_UNALIGNED_LOAD
+ HAS_ARCH_FEATURE (Fast_Unaligned_Load)
jnz 2f
- HAS_SSSE3
+ HAS_CPU_FEATURE (SSSE3)
jz 2f
LOAD_FUNC_GOT_EAX (__bcopy_ssse3)
- HAS_FAST_REP_STRING
+ HAS_CPU_FEATURE (Fast_Rep_String)
jz 2f
LOAD_FUNC_GOT_EAX (__bcopy_ssse3_rep)
2: ret
diff --git a/sysdeps/i386/i686/multiarch/bzero.S b/sysdeps/i386/i686/multiarch/bzero.S
index ac142bc..95c96a8 100644
--- a/sysdeps/i386/i686/multiarch/bzero.S
+++ b/sysdeps/i386/i686/multiarch/bzero.S
@@ -28,10 +28,10 @@ ENTRY(__bzero)
.type __bzero, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
LOAD_FUNC_GOT_EAX (__bzero_ia32)
- HAS_SSE2
+ HAS_CPU_FEATURE (SSE2)
jz 2f
LOAD_FUNC_GOT_EAX ( __bzero_sse2)
- HAS_FAST_REP_STRING
+ HAS_CPU_FEATURE (Fast_Rep_String)
jz 2f
LOAD_FUNC_GOT_EAX (__bzero_sse2_rep)
2: ret
diff --git a/sysdeps/i386/i686/multiarch/ifunc-impl-list.c b/sysdeps/i386/i686/multiarch/ifunc-impl-list.c
index 92366a7..a6735a8 100644
--- a/sysdeps/i386/i686/multiarch/ifunc-impl-list.c
+++ b/sysdeps/i386/i686/multiarch/ifunc-impl-list.c
@@ -38,152 +38,179 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
/* Support sysdeps/i386/i686/multiarch/bcopy.S. */
IFUNC_IMPL (i, name, bcopy,
- IFUNC_IMPL_ADD (array, i, bcopy, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, bcopy, HAS_CPU_FEATURE (SSSE3),
__bcopy_ssse3_rep)
- IFUNC_IMPL_ADD (array, i, bcopy, HAS_SSSE3, __bcopy_ssse3)
- IFUNC_IMPL_ADD (array, i, bcopy, HAS_SSE2,
+ IFUNC_IMPL_ADD (array, i, bcopy, HAS_CPU_FEATURE (SSSE3),
+ __bcopy_ssse3)
+ IFUNC_IMPL_ADD (array, i, bcopy, HAS_CPU_FEATURE (SSE2),
__bcopy_sse2_unaligned)
IFUNC_IMPL_ADD (array, i, bcopy, 1, __bcopy_ia32))
/* Support sysdeps/i386/i686/multiarch/bzero.S. */
IFUNC_IMPL (i, name, bzero,
- IFUNC_IMPL_ADD (array, i, bzero, HAS_SSE2, __bzero_sse2_rep)
- IFUNC_IMPL_ADD (array, i, bzero, HAS_SSE2, __bzero_sse2)
+ IFUNC_IMPL_ADD (array, i, bzero, HAS_CPU_FEATURE (SSE2),
+ __bzero_sse2_rep)
+ IFUNC_IMPL_ADD (array, i, bzero, HAS_CPU_FEATURE (SSE2),
+ __bzero_sse2)
IFUNC_IMPL_ADD (array, i, bzero, 1, __bzero_ia32))
/* Support sysdeps/i386/i686/multiarch/memchr.S. */
IFUNC_IMPL (i, name, memchr,
- IFUNC_IMPL_ADD (array, i, memchr, HAS_SSE2,
+ IFUNC_IMPL_ADD (array, i, memchr, HAS_CPU_FEATURE (SSE2),
__memchr_sse2_bsf)
- IFUNC_IMPL_ADD (array, i, memchr, HAS_SSE2, __memchr_sse2)
+ IFUNC_IMPL_ADD (array, i, memchr, HAS_CPU_FEATURE (SSE2),
+ __memchr_sse2)
IFUNC_IMPL_ADD (array, i, memchr, 1, __memchr_ia32))
/* Support sysdeps/i386/i686/multiarch/memcmp.S. */
IFUNC_IMPL (i, name, memcmp,
- IFUNC_IMPL_ADD (array, i, memcmp, HAS_SSE4_2,
+ IFUNC_IMPL_ADD (array, i, memcmp, HAS_CPU_FEATURE (SSE4_2),
__memcmp_sse4_2)
- IFUNC_IMPL_ADD (array, i, memcmp, HAS_SSSE3, __memcmp_ssse3)
+ IFUNC_IMPL_ADD (array, i, memcmp, HAS_CPU_FEATURE (SSSE3),
+ __memcmp_ssse3)
IFUNC_IMPL_ADD (array, i, memcmp, 1, __memcmp_ia32))
/* Support sysdeps/i386/i686/multiarch/memmove_chk.S. */
IFUNC_IMPL (i, name, __memmove_chk,
- IFUNC_IMPL_ADD (array, i, __memmove_chk, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, __memmove_chk,
+ HAS_CPU_FEATURE (SSSE3),
__memmove_chk_ssse3_rep)
- IFUNC_IMPL_ADD (array, i, __memmove_chk, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, __memmove_chk,
+ HAS_CPU_FEATURE (SSSE3),
__memmove_chk_ssse3)
- IFUNC_IMPL_ADD (array, i, __memmove_chk, HAS_SSE2,
+ IFUNC_IMPL_ADD (array, i, __memmove_chk,
+ HAS_CPU_FEATURE (SSE2),
__memmove_chk_sse2_unaligned)
IFUNC_IMPL_ADD (array, i, __memmove_chk, 1,
__memmove_chk_ia32))
/* Support sysdeps/i386/i686/multiarch/memmove.S. */
IFUNC_IMPL (i, name, memmove,
- IFUNC_IMPL_ADD (array, i, memmove, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, memmove, HAS_CPU_FEATURE (SSSE3),
__memmove_ssse3_rep)
- IFUNC_IMPL_ADD (array, i, memmove, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, memmove, HAS_CPU_FEATURE (SSSE3),
__memmove_ssse3)
- IFUNC_IMPL_ADD (array, i, memmove, HAS_SSE2,
+ IFUNC_IMPL_ADD (array, i, memmove, HAS_CPU_FEATURE (SSE2),
__memmove_sse2_unaligned)
IFUNC_IMPL_ADD (array, i, memmove, 1, __memmove_ia32))
/* Support sysdeps/i386/i686/multiarch/memrchr.S. */
IFUNC_IMPL (i, name, memrchr,
- IFUNC_IMPL_ADD (array, i, memrchr, HAS_SSE2,
+ IFUNC_IMPL_ADD (array, i, memrchr, HAS_CPU_FEATURE (SSE2),
__memrchr_sse2_bsf)
- IFUNC_IMPL_ADD (array, i, memrchr, HAS_SSE2, __memrchr_sse2)
+ IFUNC_IMPL_ADD (array, i, memrchr, HAS_CPU_FEATURE (SSE2),
+ __memrchr_sse2)
IFUNC_IMPL_ADD (array, i, memrchr, 1, __memrchr_ia32))
/* Support sysdeps/i386/i686/multiarch/memset_chk.S. */
IFUNC_IMPL (i, name, __memset_chk,
- IFUNC_IMPL_ADD (array, i, __memset_chk, HAS_SSE2,
+ IFUNC_IMPL_ADD (array, i, __memset_chk,
+ HAS_CPU_FEATURE (SSE2),
__memset_chk_sse2_rep)
- IFUNC_IMPL_ADD (array, i, __memset_chk, HAS_SSE2,
+ IFUNC_IMPL_ADD (array, i, __memset_chk,
+ HAS_CPU_FEATURE (SSE2),
__memset_chk_sse2)
IFUNC_IMPL_ADD (array, i, __memset_chk, 1,
__memset_chk_ia32))
/* Support sysdeps/i386/i686/multiarch/memset.S. */
IFUNC_IMPL (i, name, memset,
- IFUNC_IMPL_ADD (array, i, memset, HAS_SSE2,
+ IFUNC_IMPL_ADD (array, i, memset, HAS_CPU_FEATURE (SSE2),
__memset_sse2_rep)
- IFUNC_IMPL_ADD (array, i, memset, HAS_SSE2, __memset_sse2)
+ IFUNC_IMPL_ADD (array, i, memset, HAS_CPU_FEATURE (SSE2),
+ __memset_sse2)
IFUNC_IMPL_ADD (array, i, memset, 1, __memset_ia32))
/* Support sysdeps/i386/i686/multiarch/rawmemchr.S. */
IFUNC_IMPL (i, name, rawmemchr,
- IFUNC_IMPL_ADD (array, i, rawmemchr, HAS_SSE2,
+ IFUNC_IMPL_ADD (array, i, rawmemchr, HAS_CPU_FEATURE (SSE2),
__rawmemchr_sse2_bsf)
- IFUNC_IMPL_ADD (array, i, rawmemchr, HAS_SSE2,
+ IFUNC_IMPL_ADD (array, i, rawmemchr, HAS_CPU_FEATURE (SSE2),
__rawmemchr_sse2)
IFUNC_IMPL_ADD (array, i, rawmemchr, 1, __rawmemchr_ia32))
/* Support sysdeps/i386/i686/multiarch/stpncpy.S. */
IFUNC_IMPL (i, name, stpncpy,
- IFUNC_IMPL_ADD (array, i, stpncpy, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, stpncpy, HAS_CPU_FEATURE (SSSE3),
__stpncpy_ssse3)
- IFUNC_IMPL_ADD (array, i, stpncpy, HAS_SSE2, __stpncpy_sse2)
+ IFUNC_IMPL_ADD (array, i, stpncpy, HAS_CPU_FEATURE (SSE2),
+ __stpncpy_sse2)
IFUNC_IMPL_ADD (array, i, stpncpy, 1, __stpncpy_ia32))
/* Support sysdeps/i386/i686/multiarch/stpcpy.S. */
IFUNC_IMPL (i, name, stpcpy,
- IFUNC_IMPL_ADD (array, i, stpcpy, HAS_SSSE3, __stpcpy_ssse3)
- IFUNC_IMPL_ADD (array, i, stpcpy, HAS_SSE2, __stpcpy_sse2)
+ IFUNC_IMPL_ADD (array, i, stpcpy, HAS_CPU_FEATURE (SSSE3),
+ __stpcpy_ssse3)
+ IFUNC_IMPL_ADD (array, i, stpcpy, HAS_CPU_FEATURE (SSE2),
+ __stpcpy_sse2)
IFUNC_IMPL_ADD (array, i, stpcpy, 1, __stpcpy_ia32))
/* Support sysdeps/i386/i686/multiarch/strcasecmp.S. */
IFUNC_IMPL (i, name, strcasecmp,
- IFUNC_IMPL_ADD (array, i, strcasecmp, HAS_SSE4_2,
+ IFUNC_IMPL_ADD (array, i, strcasecmp,
+ HAS_CPU_FEATURE (SSE4_2),
__strcasecmp_sse4_2)
- IFUNC_IMPL_ADD (array, i, strcasecmp, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, strcasecmp,
+ HAS_CPU_FEATURE (SSSE3),
__strcasecmp_ssse3)
IFUNC_IMPL_ADD (array, i, strcasecmp, 1, __strcasecmp_ia32))
/* Support sysdeps/i386/i686/multiarch/strcasecmp_l.S. */
IFUNC_IMPL (i, name, strcasecmp_l,
- IFUNC_IMPL_ADD (array, i, strcasecmp_l, HAS_SSE4_2,
+ IFUNC_IMPL_ADD (array, i, strcasecmp_l,
+ HAS_CPU_FEATURE (SSE4_2),
__strcasecmp_l_sse4_2)
- IFUNC_IMPL_ADD (array, i, strcasecmp_l, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, strcasecmp_l,
+ HAS_CPU_FEATURE (SSSE3),
__strcasecmp_l_ssse3)
IFUNC_IMPL_ADD (array, i, strcasecmp_l, 1,
__strcasecmp_l_ia32))
/* Support sysdeps/i386/i686/multiarch/strcat.S. */
IFUNC_IMPL (i, name, strcat,
- IFUNC_IMPL_ADD (array, i, strcat, HAS_SSSE3, __strcat_ssse3)
- IFUNC_IMPL_ADD (array, i, strcat, HAS_SSE2, __strcat_sse2)
+ IFUNC_IMPL_ADD (array, i, strcat, HAS_CPU_FEATURE (SSSE3),
+ __strcat_ssse3)
+ IFUNC_IMPL_ADD (array, i, strcat, HAS_CPU_FEATURE (SSE2),
+ __strcat_sse2)
IFUNC_IMPL_ADD (array, i, strcat, 1, __strcat_ia32))
/* Support sysdeps/i386/i686/multiarch/strchr.S. */
IFUNC_IMPL (i, name, strchr,
- IFUNC_IMPL_ADD (array, i, strchr, HAS_SSE2,
+ IFUNC_IMPL_ADD (array, i, strchr, HAS_CPU_FEATURE (SSE2),
__strchr_sse2_bsf)
- IFUNC_IMPL_ADD (array, i, strchr, HAS_SSE2, __strchr_sse2)
+ IFUNC_IMPL_ADD (array, i, strchr, HAS_CPU_FEATURE (SSE2),
+ __strchr_sse2)
IFUNC_IMPL_ADD (array, i, strchr, 1, __strchr_ia32))
/* Support sysdeps/i386/i686/multiarch/strcmp.S. */
IFUNC_IMPL (i, name, strcmp,
- IFUNC_IMPL_ADD (array, i, strcmp, HAS_SSE4_2,
+ IFUNC_IMPL_ADD (array, i, strcmp, HAS_CPU_FEATURE (SSE4_2),
__strcmp_sse4_2)
- IFUNC_IMPL_ADD (array, i, strcmp, HAS_SSSE3, __strcmp_ssse3)
+ IFUNC_IMPL_ADD (array, i, strcmp, HAS_CPU_FEATURE (SSSE3),
+ __strcmp_ssse3)
IFUNC_IMPL_ADD (array, i, strcmp, 1, __strcmp_ia32))
/* Support sysdeps/i386/i686/multiarch/strcpy.S. */
IFUNC_IMPL (i, name, strcpy,
- IFUNC_IMPL_ADD (array, i, strcpy, HAS_SSSE3, __strcpy_ssse3)
- IFUNC_IMPL_ADD (array, i, strcpy, HAS_SSE2, __strcpy_sse2)
+ IFUNC_IMPL_ADD (array, i, strcpy, HAS_CPU_FEATURE (SSSE3),
+ __strcpy_ssse3)
+ IFUNC_IMPL_ADD (array, i, strcpy, HAS_CPU_FEATURE (SSE2),
+ __strcpy_sse2)
IFUNC_IMPL_ADD (array, i, strcpy, 1, __strcpy_ia32))
/* Support sysdeps/i386/i686/multiarch/strcspn.S. */
IFUNC_IMPL (i, name, strcspn,
- IFUNC_IMPL_ADD (array, i, strcspn, HAS_SSE4_2,
+ IFUNC_IMPL_ADD (array, i, strcspn, HAS_CPU_FEATURE (SSE4_2),
__strcspn_sse42)
IFUNC_IMPL_ADD (array, i, strcspn, 1, __strcspn_ia32))
/* Support sysdeps/i386/i686/multiarch/strncase.S. */
IFUNC_IMPL (i, name, strncasecmp,
- IFUNC_IMPL_ADD (array, i, strncasecmp, HAS_SSE4_2,
+ IFUNC_IMPL_ADD (array, i, strncasecmp,
+ HAS_CPU_FEATURE (SSE4_2),
__strncasecmp_sse4_2)
- IFUNC_IMPL_ADD (array, i, strncasecmp, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, strncasecmp,
+ HAS_CPU_FEATURE (SSSE3),
__strncasecmp_ssse3)
IFUNC_IMPL_ADD (array, i, strncasecmp, 1,
__strncasecmp_ia32))
@@ -191,136 +218,156 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array,
/* Support sysdeps/i386/i686/multiarch/strncase_l.S. */
IFUNC_IMPL (i, name, strncasecmp_l,
IFUNC_IMPL_ADD (array, i, strncasecmp_l,
- HAS_SSE4_2, __strncasecmp_l_sse4_2)
+ HAS_CPU_FEATURE (SSE4_2),
+ __strncasecmp_l_sse4_2)
IFUNC_IMPL_ADD (array, i, strncasecmp_l,
- HAS_SSSE3, __strncasecmp_l_ssse3)
+ HAS_CPU_FEATURE (SSSE3),
+ __strncasecmp_l_ssse3)
IFUNC_IMPL_ADD (array, i, strncasecmp_l, 1,
__strncasecmp_l_ia32))
/* Support sysdeps/i386/i686/multiarch/strncat.S. */
IFUNC_IMPL (i, name, strncat,
- IFUNC_IMPL_ADD (array, i, strncat, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, strncat, HAS_CPU_FEATURE (SSSE3),
__strncat_ssse3)
- IFUNC_IMPL_ADD (array, i, strncat, HAS_SSE2, __strncat_sse2)
+ IFUNC_IMPL_ADD (array, i, strncat, HAS_CPU_FEATURE (SSE2),
+ __strncat_sse2)
IFUNC_IMPL_ADD (array, i, strncat, 1, __strncat_ia32))
/* Support sysdeps/i386/i686/multiarch/strncpy.S. */
IFUNC_IMPL (i, name, strncpy,
- IFUNC_IMPL_ADD (array, i, strncpy, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, strncpy, HAS_CPU_FEATURE (SSSE3),
__strncpy_ssse3)
- IFUNC_IMPL_ADD (array, i, strncpy, HAS_SSE2, __strncpy_sse2)
+ IFUNC_IMPL_ADD (array, i, strncpy, HAS_CPU_FEATURE (SSE2),
+ __strncpy_sse2)
IFUNC_IMPL_ADD (array, i, strncpy, 1, __strncpy_ia32))
/* Support sysdeps/i386/i686/multiarch/strnlen.S. */
IFUNC_IMPL (i, name, strnlen,
- IFUNC_IMPL_ADD (array, i, strnlen, HAS_SSE2, __strnlen_sse2)
+ IFUNC_IMPL_ADD (array, i, strnlen, HAS_CPU_FEATURE (SSE2),
+ __strnlen_sse2)
IFUNC_IMPL_ADD (array, i, strnlen, 1, __strnlen_ia32))
/* Support sysdeps/i386/i686/multiarch/strpbrk.S. */
IFUNC_IMPL (i, name, strpbrk,
- IFUNC_IMPL_ADD (array, i, strpbrk, HAS_SSE4_2,
+ IFUNC_IMPL_ADD (array, i, strpbrk, HAS_CPU_FEATURE (SSE4_2),
__strpbrk_sse42)
IFUNC_IMPL_ADD (array, i, strpbrk, 1, __strpbrk_ia32))
/* Support sysdeps/i386/i686/multiarch/strrchr.S. */
IFUNC_IMPL (i, name, strrchr,
- IFUNC_IMPL_ADD (array, i, strrchr, HAS_SSE2,
+ IFUNC_IMPL_ADD (array, i, strrchr, HAS_CPU_FEATURE (SSE2),
__strrchr_sse2_bsf)
- IFUNC_IMPL_ADD (array, i, strrchr, HAS_SSE2, __strrchr_sse2)
+ IFUNC_IMPL_ADD (array, i, strrchr, HAS_CPU_FEATURE (SSE2),
+ __strrchr_sse2)
IFUNC_IMPL_ADD (array, i, strrchr, 1, __strrchr_ia32))
/* Support sysdeps/i386/i686/multiarch/strspn.S. */
IFUNC_IMPL (i, name, strspn,
- IFUNC_IMPL_ADD (array, i, strspn, HAS_SSE4_2, __strspn_sse42)
+ IFUNC_IMPL_ADD (array, i, strspn, HAS_CPU_FEATURE (SSE4_2),
+ __strspn_sse42)
IFUNC_IMPL_ADD (array, i, strspn, 1, __strspn_ia32))
/* Support sysdeps/i386/i686/multiarch/wcschr.S. */
IFUNC_IMPL (i, name, wcschr,
- IFUNC_IMPL_ADD (array, i, wcschr, HAS_SSE2, __wcschr_sse2)
+ IFUNC_IMPL_ADD (array, i, wcschr, HAS_CPU_FEATURE (SSE2),
+ __wcschr_sse2)
IFUNC_IMPL_ADD (array, i, wcschr, 1, __wcschr_ia32))
/* Support sysdeps/i386/i686/multiarch/wcscmp.S. */
IFUNC_IMPL (i, name, wcscmp,
- IFUNC_IMPL_ADD (array, i, wcscmp, HAS_SSE2, __wcscmp_sse2)
+ IFUNC_IMPL_ADD (array, i, wcscmp, HAS_CPU_FEATURE (SSE2),
+ __wcscmp_sse2)
IFUNC_IMPL_ADD (array, i, wcscmp, 1, __wcscmp_ia32))
/* Support sysdeps/i386/i686/multiarch/wcscpy.S. */
IFUNC_IMPL (i, name, wcscpy,
- IFUNC_IMPL_ADD (array, i, wcscpy, HAS_SSSE3, __wcscpy_ssse3)
+ IFUNC_IMPL_ADD (array, i, wcscpy, HAS_CPU_FEATURE (SSSE3),
+ __wcscpy_ssse3)
IFUNC_IMPL_ADD (array, i, wcscpy, 1, __wcscpy_ia32))
/* Support sysdeps/i386/i686/multiarch/wcslen.S. */
IFUNC_IMPL (i, name, wcslen,
- IFUNC_IMPL_ADD (array, i, wcslen, HAS_SSE2, __wcslen_sse2)
+ IFUNC_IMPL_ADD (array, i, wcslen, HAS_CPU_FEATURE (SSE2),
+ __wcslen_sse2)
IFUNC_IMPL_ADD (array, i, wcslen, 1, __wcslen_ia32))
/* Support sysdeps/i386/i686/multiarch/wcsrchr.S. */
IFUNC_IMPL (i, name, wcsrchr,
- IFUNC_IMPL_ADD (array, i, wcsrchr, HAS_SSE2, __wcsrchr_sse2)
+ IFUNC_IMPL_ADD (array, i, wcsrchr, HAS_CPU_FEATURE (SSE2),
+ __wcsrchr_sse2)
IFUNC_IMPL_ADD (array, i, wcsrchr, 1, __wcsrchr_ia32))
/* Support sysdeps/i386/i686/multiarch/wmemcmp.S. */
IFUNC_IMPL (i, name, wmemcmp,
- IFUNC_IMPL_ADD (array, i, wmemcmp, HAS_SSE4_2,
+ IFUNC_IMPL_ADD (array, i, wmemcmp, HAS_CPU_FEATURE (SSE4_2),
__wmemcmp_sse4_2)
- IFUNC_IMPL_ADD (array, i, wmemcmp, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, wmemcmp, HAS_CPU_FEATURE (SSSE3),
__wmemcmp_ssse3)
IFUNC_IMPL_ADD (array, i, wmemcmp, 1, __wmemcmp_ia32))
#ifdef SHARED
/* Support sysdeps/i386/i686/multiarch/memcpy_chk.S. */
IFUNC_IMPL (i, name, __memcpy_chk,
- IFUNC_IMPL_ADD (array, i, __memcpy_chk, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, __memcpy_chk,
+ HAS_CPU_FEATURE (SSSE3),
__memcpy_chk_ssse3_rep)
- IFUNC_IMPL_ADD (array, i, __memcpy_chk, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, __memcpy_chk,
+ HAS_CPU_FEATURE (SSSE3),
__memcpy_chk_ssse3)
- IFUNC_IMPL_ADD (array, i, __memcpy_chk, HAS_SSE2,
+ IFUNC_IMPL_ADD (array, i, __memcpy_chk,
+ HAS_CPU_FEATURE (SSE2),
__memcpy_chk_sse2_unaligned)
IFUNC_IMPL_ADD (array, i, __memcpy_chk, 1,
__memcpy_chk_ia32))
/* Support sysdeps/i386/i686/multiarch/memcpy.S. */
IFUNC_IMPL (i, name, memcpy,
- IFUNC_IMPL_ADD (array, i, memcpy, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, memcpy, HAS_CPU_FEATURE (SSSE3),
__memcpy_ssse3_rep)
- IFUNC_IMPL_ADD (array, i, memcpy, HAS_SSSE3, __memcpy_ssse3)
- IFUNC_IMPL_ADD (array, i, memcpy, HAS_SSE2,
+ IFUNC_IMPL_ADD (array, i, memcpy, HAS_CPU_FEATURE (SSSE3),
+ __memcpy_ssse3)
+ IFUNC_IMPL_ADD (array, i, memcpy, HAS_CPU_FEATURE (SSE2),
__memcpy_sse2_unaligned)
IFUNC_IMPL_ADD (array, i, memcpy, 1, __memcpy_ia32))
/* Support sysdeps/i386/i686/multiarch/mempcpy_chk.S. */
IFUNC_IMPL (i, name, __mempcpy_chk,
- IFUNC_IMPL_ADD (array, i, __mempcpy_chk, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, __mempcpy_chk,
+ HAS_CPU_FEATURE (SSSE3),
__mempcpy_chk_ssse3_rep)
- IFUNC_IMPL_ADD (array, i, __mempcpy_chk, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, __mempcpy_chk,
+ HAS_CPU_FEATURE (SSSE3),
__mempcpy_chk_ssse3)
- IFUNC_IMPL_ADD (array, i, __mempcpy_chk, HAS_SSE2,
+ IFUNC_IMPL_ADD (array, i, __mempcpy_chk,
+ HAS_CPU_FEATURE (SSE2),
__mempcpy_chk_sse2_unaligned)
IFUNC_IMPL_ADD (array, i, __mempcpy_chk, 1,
__mempcpy_chk_ia32))
/* Support sysdeps/i386/i686/multiarch/mempcpy.S. */
IFUNC_IMPL (i, name, mempcpy,
- IFUNC_IMPL_ADD (array, i, mempcpy, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, mempcpy, HAS_CPU_FEATURE (SSSE3),
__mempcpy_ssse3_rep)
- IFUNC_IMPL_ADD (array, i, mempcpy, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, mempcpy, HAS_CPU_FEATURE (SSSE3),
__mempcpy_ssse3)
- IFUNC_IMPL_ADD (array, i, mempcpy, HAS_SSE2,
+ IFUNC_IMPL_ADD (array, i, mempcpy, HAS_CPU_FEATURE (SSE2),
__mempcpy_sse2_unaligned)
IFUNC_IMPL_ADD (array, i, mempcpy, 1, __mempcpy_ia32))
/* Support sysdeps/i386/i686/multiarch/strlen.S. */
IFUNC_IMPL (i, name, strlen,
- IFUNC_IMPL_ADD (array, i, strlen, HAS_SSE2,
+ IFUNC_IMPL_ADD (array, i, strlen, HAS_CPU_FEATURE (SSE2),
__strlen_sse2_bsf)
- IFUNC_IMPL_ADD (array, i, strlen, HAS_SSE2, __strlen_sse2)
+ IFUNC_IMPL_ADD (array, i, strlen, HAS_CPU_FEATURE (SSE2),
+ __strlen_sse2)
IFUNC_IMPL_ADD (array, i, strlen, 1, __strlen_ia32))
/* Support sysdeps/i386/i686/multiarch/strncmp.S. */
IFUNC_IMPL (i, name, strncmp,
- IFUNC_IMPL_ADD (array, i, strncmp, HAS_SSE4_2,
+ IFUNC_IMPL_ADD (array, i, strncmp, HAS_CPU_FEATURE (SSE4_2),
__strncmp_sse4_2)
- IFUNC_IMPL_ADD (array, i, strncmp, HAS_SSSE3,
+ IFUNC_IMPL_ADD (array, i, strncmp, HAS_CPU_FEATURE (SSSE3),
__strncmp_ssse3)
IFUNC_IMPL_ADD (array, i, strncmp, 1, __strncmp_ia32))
#endif
diff --git a/sysdeps/i386/i686/multiarch/memchr.S b/sysdeps/i386/i686/multiarch/memchr.S
index e444dd6..65e6b96 100644
--- a/sysdeps/i386/i686/multiarch/memchr.S
+++ b/sysdeps/i386/i686/multiarch/memchr.S
@@ -26,9 +26,9 @@
ENTRY(__memchr)
.type __memchr, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
- HAS_SSE2
+ HAS_CPU_FEATURE (SSE2)
jz 2f
- HAS_SLOW_BSF
+ HAS_ARCH_FEATURE (Slow_BSF)
jz 3f
LOAD_FUNC_GOT_EAX ( __memchr_sse2)
diff --git a/sysdeps/i386/i686/multiarch/memcmp.S b/sysdeps/i386/i686/multiarch/memcmp.S
index aa08900..d4d7d2e 100644
--- a/sysdeps/i386/i686/multiarch/memcmp.S
+++ b/sysdeps/i386/i686/multiarch/memcmp.S
@@ -28,10 +28,10 @@ ENTRY(memcmp)
.type memcmp, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
LOAD_FUNC_GOT_EAX (__memcmp_ia32)
- HAS_SSSE3
+ HAS_CPU_FEATURE (SSSE3)
jz 2f
LOAD_FUNC_GOT_EAX (__memcmp_ssse3)
- HAS_SSE4_2
+ HAS_CPU_FEATURE (SSE4_2)
jz 2f
LOAD_FUNC_GOT_EAX (__memcmp_sse4_2)
2: ret
diff --git a/sysdeps/i386/i686/multiarch/memcpy.S b/sysdeps/i386/i686/multiarch/memcpy.S
index d92f691..9a4d183 100644
--- a/sysdeps/i386/i686/multiarch/memcpy.S
+++ b/sysdeps/i386/i686/multiarch/memcpy.S
@@ -30,15 +30,15 @@ ENTRY(memcpy)
.type memcpy, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
LOAD_FUNC_GOT_EAX (__memcpy_ia32)
- HAS_SSE2
+ HAS_CPU_FEATURE (SSE2)
jz 2f
LOAD_FUNC_GOT_EAX (__memcpy_sse2_unaligned)
- HAS_FAST_UNALIGNED_LOAD
+ HAS_ARCH_FEATURE (Fast_Unaligned_Load)
jnz 2f
- HAS_SSSE3
+ HAS_CPU_FEATURE (SSSE3)
jz 2f
LOAD_FUNC_GOT_EAX (__memcpy_ssse3)
- HAS_FAST_REP_STRING
+ HAS_CPU_FEATURE (Fast_Rep_String)
jz 2f
LOAD_FUNC_GOT_EAX (__memcpy_ssse3_rep)
2: ret
diff --git a/sysdeps/i386/i686/multiarch/memcpy_chk.S b/sysdeps/i386/i686/multiarch/memcpy_chk.S
index ba99478..3bbd921 100644
--- a/sysdeps/i386/i686/multiarch/memcpy_chk.S
+++ b/sysdeps/i386/i686/multiarch/memcpy_chk.S
@@ -31,15 +31,15 @@ ENTRY(__memcpy_chk)
.type __memcpy_chk, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
LOAD_FUNC_GOT_EAX (__memcpy_chk_ia32)
- HAS_SSE2
+ HAS_CPU_FEATURE (SSE2)
jz 2f
LOAD_FUNC_GOT_EAX (__memcpy_chk_sse2_unaligned)
- HAS_FAST_UNALIGNED_LOAD
+ HAS_ARCH_FEATURE (Fast_Unaligned_Load)
jnz 2f
- HAS_SSSE3
+ HAS_CPU_FEATURE (SSSE3)
jz 2f
LOAD_FUNC_GOT_EAX (__memcpy_chk_ssse3)
- HAS_FAST_REP_STRING
+ HAS_CPU_FEATURE (Fast_Rep_String)
jz 2f
LOAD_FUNC_GOT_EAX (__memcpy_chk_ssse3_rep)
2: ret
diff --git a/sysdeps/i386/i686/multiarch/memmove.S b/sysdeps/i386/i686/multiarch/memmove.S
index 6a4a5de..2bf427f 100644
--- a/sysdeps/i386/i686/multiarch/memmove.S
+++ b/sysdeps/i386/i686/multiarch/memmove.S
@@ -28,15 +28,15 @@ ENTRY(memmove)
.type memmove, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
LOAD_FUNC_GOT_EAX (__memmove_ia32)
- HAS_SSE2
+ HAS_CPU_FEATURE (SSE2)
jz 2f
LOAD_FUNC_GOT_EAX (__memmove_sse2_unaligned)
- HAS_FAST_UNALIGNED_LOAD
+ HAS_ARCH_FEATURE (Fast_Unaligned_Load)
jnz 2f
- HAS_SSSE3
+ HAS_CPU_FEATURE (SSSE3)
jz 2f
LOAD_FUNC_GOT_EAX (__memmove_ssse3)
- HAS_FAST_REP_STRING
+ HAS_ARCH_FEATURE (Fast_Rep_String)
jz 2f
LOAD_FUNC_GOT_EAX (__memmove_ssse3_rep)
2: ret
diff --git a/sysdeps/i386/i686/multiarch/memmove_chk.S b/sysdeps/i386/i686/multiarch/memmove_chk.S
index 83a4402..b17f6ed 100644
--- a/sysdeps/i386/i686/multiarch/memmove_chk.S
+++ b/sysdeps/i386/i686/multiarch/memmove_chk.S
@@ -28,15 +28,15 @@ ENTRY(__memmove_chk)
.type __memmove_chk, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
LOAD_FUNC_GOT_EAX (__memmove_chk_ia32)
- HAS_SSE2
+ HAS_CPU_FEATURE (SSE2)
jz 2f
LOAD_FUNC_GOT_EAX (__memmove_chk_sse2_unaligned)
- HAS_FAST_UNALIGNED_LOAD
+ HAS_ARCH_FEATURE (Fast_Unaligned_Load)
jnz 2f
- HAS_SSSE3
+ HAS_CPU_FEATURE (SSSE3)
jz 2f
LOAD_FUNC_GOT_EAX (__memmove_chk_ssse3)
- HAS_FAST_REP_STRING
+ HAS_CPU_FEATURE (Fast_Rep_String)
jz 2f
LOAD_FUNC_GOT_EAX (__memmove_chk_ssse3_rep)
2: ret
diff --git a/sysdeps/i386/i686/multiarch/mempcpy.S b/sysdeps/i386/i686/multiarch/mempcpy.S
index 810d4c2..021558a 100644
--- a/sysdeps/i386/i686/multiarch/mempcpy.S
+++ b/sysdeps/i386/i686/multiarch/mempcpy.S
@@ -30,15 +30,15 @@ ENTRY(__mempcpy)
.type __mempcpy, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
LOAD_FUNC_GOT_EAX (__mempcpy_ia32)
- HAS_SSE2
+ HAS_CPU_FEATURE (SSE2)
jz 2f
LOAD_FUNC_GOT_EAX (__mempcpy_sse2_unaligned)
- HAS_FAST_UNALIGNED_LOAD
+ HAS_ARCH_FEATURE (Fast_Unaligned_Load)
jnz 2f
- HAS_SSSE3
+ HAS_CPU_FEATURE (SSSE3)
jz 2f
LOAD_FUNC_GOT_EAX (__mempcpy_ssse3)
- HAS_FAST_REP_STRING
+ HAS_CPU_FEATURE (Fast_Rep_String)
jz 2f
LOAD_FUNC_GOT_EAX (__mempcpy_ssse3_rep)
2: ret
diff --git a/sysdeps/i386/i686/multiarch/mempcpy_chk.S b/sysdeps/i386/i686/multiarch/mempcpy_chk.S
index a770bc9..1bea6ea 100644
--- a/sysdeps/i386/i686/multiarch/mempcpy_chk.S
+++ b/sysdeps/i386/i686/multiarch/mempcpy_chk.S
@@ -31,15 +31,15 @@ ENTRY(__mempcpy_chk)
.type __mempcpy_chk, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
LOAD_FUNC_GOT_EAX (__mempcpy_chk_ia32)
- HAS_SSE2
+ HAS_CPU_FEATURE (SSE2)
jz 2f
LOAD_FUNC_GOT_EAX (__mempcpy_chk_sse2_unaligned)
- HAS_FAST_UNALIGNED_LOAD
+ HAS_ARCH_FEATURE (Fast_Unaligned_Load)
jnz 2f
- HAS_SSSE3
+ HAS_CPU_FEATURE (SSSE3)
jz 2f
LOAD_FUNC_GOT_EAX (__mempcpy_chk_ssse3)
- HAS_FAST_REP_STRING
+ HAS_CPU_FEATURE (Fast_Rep_String)
jz 2f
LOAD_FUNC_GOT_EAX (__mempcpy_chk_ssse3_rep)
2: ret
diff --git a/sysdeps/i386/i686/multiarch/memrchr.S b/sysdeps/i386/i686/multiarch/memrchr.S
index 5121a7c..32fb1a6 100644
--- a/sysdeps/i386/i686/multiarch/memrchr.S
+++ b/sysdeps/i386/i686/multiarch/memrchr.S
@@ -26,9 +26,9 @@
ENTRY(__memrchr)
.type __memrchr, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
- HAS_SSE2
+ HAS_CPU_FEATURE (SSE2)
jz 2f
- HAS_SLOW_BSF
+ HAS_ARCH_FEATURE (Slow_BSF)
jz 3f
LOAD_FUNC_GOT_EAX (__memrchr_sse2)
diff --git a/sysdeps/i386/i686/multiarch/memset.S b/sysdeps/i386/i686/multiarch/memset.S
index 1cf40c2..8015d57 100644
--- a/sysdeps/i386/i686/multiarch/memset.S
+++ b/sysdeps/i386/i686/multiarch/memset.S
@@ -28,10 +28,10 @@ ENTRY(memset)
.type memset, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
LOAD_FUNC_GOT_EAX (__memset_ia32)
- HAS_SSE2
+ HAS_CPU_FEATURE (SSE2)
jz 2f
LOAD_FUNC_GOT_EAX (__memset_sse2)
- HAS_FAST_REP_STRING
+ HAS_CPU_FEATURE (Fast_Rep_String)
jz 2f
LOAD_FUNC_GOT_EAX (__memset_sse2_rep)
2: ret
diff --git a/sysdeps/i386/i686/multiarch/memset_chk.S b/sysdeps/i386/i686/multiarch/memset_chk.S
index 1418853..7be45e7 100644
--- a/sysdeps/i386/i686/multiarch/memset_chk.S
+++ b/sysdeps/i386/i686/multiarch/memset_chk.S
@@ -28,10 +28,10 @@ ENTRY(__memset_chk)
.type __memset_chk, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
LOAD_FUNC_GOT_EAX (__memset_chk_ia32)
- HAS_SSE2
+ HAS_CPU_FEATURE (SSE2)
jz 2f
LOAD_FUNC_GOT_EAX (__memset_chk_sse2)
- HAS_FAST_REP_STRING
+ HAS_CPU_FEATURE (Fast_Rep_String)
jz 2f
LOAD_FUNC_GOT_EAX (__memset_chk_sse2_rep)
2: ret
diff --git a/sysdeps/i386/i686/multiarch/rawmemchr.S b/sysdeps/i386/i686/multiarch/rawmemchr.S
index 7616460..2cfbe1b 100644
--- a/sysdeps/i386/i686/multiarch/rawmemchr.S
+++ b/sysdeps/i386/i686/multiarch/rawmemchr.S
@@ -26,9 +26,9 @@
ENTRY(__rawmemchr)
.type __rawmemchr, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
- HAS_SSE2
+ HAS_CPU_FEATURE (SSE2)
jz 2f
- HAS_SLOW_BSF
+ HAS_ARCH_FEATURE (Slow_BSF)
jz 3f
LOAD_FUNC_GOT_EAX (__rawmemchr_sse2)
diff --git a/sysdeps/i386/i686/multiarch/s_fma.c b/sysdeps/i386/i686/multiarch/s_fma.c
index dd70f78..cf2ede5 100644
--- a/sysdeps/i386/i686/multiarch/s_fma.c
+++ b/sysdeps/i386/i686/multiarch/s_fma.c
@@ -26,7 +26,8 @@
extern double __fma_ia32 (double x, double y, double z) attribute_hidden;
extern double __fma_fma (double x, double y, double z) attribute_hidden;
-libm_ifunc (__fma, HAS_FMA ? __fma_fma : __fma_ia32);
+libm_ifunc (__fma,
+ HAS_ARCH_FEATURE (FMA_Usable) ? __fma_fma : __fma_ia32);
weak_alias (__fma, fma)
# define __fma __fma_ia32
diff --git a/sysdeps/i386/i686/multiarch/s_fmaf.c b/sysdeps/i386/i686/multiarch/s_fmaf.c
index 9ffa4f1..526cdf1 100644
--- a/sysdeps/i386/i686/multiarch/s_fmaf.c
+++ b/sysdeps/i386/i686/multiarch/s_fmaf.c
@@ -26,7 +26,8 @@
extern float __fmaf_ia32 (float x, float y, float z) attribute_hidden;
extern float __fmaf_fma (float x, float y, float z) attribute_hidden;
-libm_ifunc (__fmaf, HAS_FMA ? __fmaf_fma : __fmaf_ia32);
+libm_ifunc (__fmaf,
+ HAS_ARCH_FEATURE (FMA_Usable) ? __fmaf_fma : __fmaf_ia32);
weak_alias (__fmaf, fmaf)
# define __fmaf __fmaf_ia32
diff --git a/sysdeps/i386/i686/multiarch/strcasecmp.S b/sysdeps/i386/i686/multiarch/strcasecmp.S
index 7ace685..e4b3cf5 100644
--- a/sysdeps/i386/i686/multiarch/strcasecmp.S
+++ b/sysdeps/i386/i686/multiarch/strcasecmp.S
@@ -25,12 +25,12 @@ ENTRY(__strcasecmp)
.type __strcasecmp, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
LOAD_FUNC_GOT_EAX (__strcasecmp_ia32)
- HAS_SSSE3
+ HAS_CPU_FEATURE (SSSE3)
jz 2f
LOAD_FUNC_GOT_EAX (__strcasecmp_ssse3)
- HAS_SSE4_2
+ HAS_CPU_FEATURE (SSE4_2)
jz 2f
- HAS_SLOW_SSE4_2
+ HAS_ARCH_FEATURE (Slow_SSE4_2)
jnz 2f
LOAD_FUNC_GOT_EAX (__strcasecmp_sse4_2)
2: ret
diff --git a/sysdeps/i386/i686/multiarch/strcat.S b/sysdeps/i386/i686/multiarch/strcat.S
index e8e8f29..45d84cd 100644
--- a/sysdeps/i386/i686/multiarch/strcat.S
+++ b/sysdeps/i386/i686/multiarch/strcat.S
@@ -50,12 +50,12 @@ ENTRY(STRCAT)
.type STRCAT, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
LOAD_FUNC_GOT_EAX (STRCAT_IA32)
- HAS_SSE2
+ HAS_CPU_FEATURE (SSE2)
jz 2f
LOAD_FUNC_GOT_EAX (STRCAT_SSE2)
- HAS_FAST_UNALIGNED_LOAD
+ HAS_ARCH_FEATURE (Fast_Unaligned_Load)
jnz 2f
- HAS_SSSE3
+ HAS_CPU_FEATURE (SSSE3)
jz 2f
LOAD_FUNC_GOT_EAX (STRCAT_SSSE3)
2: ret
diff --git a/sysdeps/i386/i686/multiarch/strchr.S b/sysdeps/i386/i686/multiarch/strchr.S
index 83d2b84..6b46565 100644
--- a/sysdeps/i386/i686/multiarch/strchr.S
+++ b/sysdeps/i386/i686/multiarch/strchr.S
@@ -27,10 +27,10 @@ ENTRY(strchr)
.type strchr, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
LOAD_FUNC_GOT_EAX (__strchr_ia32)
- HAS_SSE2
+ HAS_CPU_FEATURE (SSE2)
jz 2f
LOAD_FUNC_GOT_EAX (__strchr_sse2_bsf)
- HAS_SLOW_BSF
+ HAS_ARCH_FEATURE (Slow_BSF)
jz 2f
LOAD_FUNC_GOT_EAX (__strchr_sse2)
2: ret
diff --git a/sysdeps/i386/i686/multiarch/strcmp.S b/sysdeps/i386/i686/multiarch/strcmp.S
index 274c7b3..cad179d 100644
--- a/sysdeps/i386/i686/multiarch/strcmp.S
+++ b/sysdeps/i386/i686/multiarch/strcmp.S
@@ -56,12 +56,12 @@ ENTRY(STRCMP)
.type STRCMP, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
LOAD_FUNC_GOT_EAX (__STRCMP_IA32)
- HAS_SSSE3
+ HAS_CPU_FEATURE (SSSE3)
jz 2f
LOAD_FUNC_GOT_EAX (__STRCMP_SSSE3)
- HAS_SSE4_2
+ HAS_CPU_FEATURE (SSE4_2)
jz 2f
- HAS_SLOW_SSE4_2
+ HAS_ARCH_FEATURE (Slow_SSE4_2)
jnz 2f
LOAD_FUNC_GOT_EAX (__STRCMP_SSE4_2)
2: ret
diff --git a/sysdeps/i386/i686/multiarch/strcpy.S b/sysdeps/i386/i686/multiarch/strcpy.S
index c3844a8..e9db766 100644
--- a/sysdeps/i386/i686/multiarch/strcpy.S
+++ b/sysdeps/i386/i686/multiarch/strcpy.S
@@ -66,12 +66,12 @@ ENTRY(STRCPY)
.type STRCPY, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
LOAD_FUNC_GOT_EAX (STRCPY_IA32)
- HAS_SSE2
+ HAS_CPU_FEATURE (SSE2)
jz 2f
LOAD_FUNC_GOT_EAX (STRCPY_SSE2)
- HAS_FAST_UNALIGNED_LOAD
+ HAS_ARCH_FEATURE (Fast_Unaligned_Load)
jnz 2f
- HAS_SSSE3
+ HAS_CPU_FEATURE (SSSE3)
jz 2f
LOAD_FUNC_GOT_EAX (STRCPY_SSSE3)
2: ret
diff --git a/sysdeps/i386/i686/multiarch/strcspn.S b/sysdeps/i386/i686/multiarch/strcspn.S
index 7e67f78..b669b97 100644
--- a/sysdeps/i386/i686/multiarch/strcspn.S
+++ b/sysdeps/i386/i686/multiarch/strcspn.S
@@ -47,7 +47,7 @@ ENTRY(STRCSPN)
.type STRCSPN, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
LOAD_FUNC_GOT_EAX (STRCSPN_IA32)
- HAS_SSE4_2
+ HAS_CPU_FEATURE (SSE4_2)
jz 2f
LOAD_FUNC_GOT_EAX (STRCSPN_SSE42)
2: ret
diff --git a/sysdeps/i386/i686/multiarch/strlen.S b/sysdeps/i386/i686/multiarch/strlen.S
index 8a2fbf2..613559c 100644
--- a/sysdeps/i386/i686/multiarch/strlen.S
+++ b/sysdeps/i386/i686/multiarch/strlen.S
@@ -30,10 +30,10 @@ ENTRY(strlen)
.type strlen, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
LOAD_FUNC_GOT_EAX (__strlen_ia32)
- HAS_SSE2
+ HAS_CPU_FEATURE (SSE2)
jz 2f
LOAD_FUNC_GOT_EAX (__strlen_sse2_bsf)
- HAS_SLOW_BSF
+ HAS_ARCH_FEATURE (Slow_BSF)
jz 2f
LOAD_FUNC_GOT_EAX (__strlen_sse2)
2: ret
diff --git a/sysdeps/i386/i686/multiarch/strncase.S b/sysdeps/i386/i686/multiarch/strncase.S
index 5025477..0cdbeff 100644
--- a/sysdeps/i386/i686/multiarch/strncase.S
+++ b/sysdeps/i386/i686/multiarch/strncase.S
@@ -25,12 +25,12 @@ ENTRY(__strncasecmp)
.type __strncasecmp, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
LOAD_FUNC_GOT_EAX (__strncasecmp_ia32)
- HAS_SSSE3
+ HAS_CPU_FEATURE (SSSE3)
jz 2f
LOAD_FUNC_GOT_EAX (__strncasecmp_ssse3)
- HAS_SSE4_2
+ HAS_CPU_FEATURE (SSE4_2)
jz 2f
- HAS_SLOW_SSE4_2
+ HAS_ARCH_FEATURE (Slow_SSE4_2)
jnz 2f
LOAD_FUNC_GOT_EAX (__strncasecmp_sse4_2)
2: ret
diff --git a/sysdeps/i386/i686/multiarch/strnlen.S b/sysdeps/i386/i686/multiarch/strnlen.S
index 166c81e..baf21fc 100644
--- a/sysdeps/i386/i686/multiarch/strnlen.S
+++ b/sysdeps/i386/i686/multiarch/strnlen.S
@@ -27,7 +27,7 @@ ENTRY(__strnlen)
.type __strnlen, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
LOAD_FUNC_GOT_EAX (__strnlen_ia32)
- HAS_SSE2
+ HAS_CPU_FEATURE (SSE2)
jz 2f
LOAD_FUNC_GOT_EAX (__strnlen_sse2)
2: ret
diff --git a/sysdeps/i386/i686/multiarch/strrchr.S b/sysdeps/i386/i686/multiarch/strrchr.S
index 984694b..6aa3321 100644
--- a/sysdeps/i386/i686/multiarch/strrchr.S
+++ b/sysdeps/i386/i686/multiarch/strrchr.S
@@ -27,10 +27,10 @@ ENTRY(strrchr)
.type strrchr, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
LOAD_FUNC_GOT_EAX (__strrchr_ia32)
- HAS_SSE2
+ HAS_CPU_FEATURE (SSE2)
jz 2f
LOAD_FUNC_GOT_EAX (__strrchr_sse2_bsf)
- HAS_SLOW_BSF
+ HAS_ARCH_FEATURE (Slow_BSF)
jz 2f
LOAD_FUNC_GOT_EAX (__strrchr_sse2)
2: ret
diff --git a/sysdeps/i386/i686/multiarch/strspn.S b/sysdeps/i386/i686/multiarch/strspn.S
index b9e2a74..4ba87be 100644
--- a/sysdeps/i386/i686/multiarch/strspn.S
+++ b/sysdeps/i386/i686/multiarch/strspn.S
@@ -32,7 +32,7 @@ ENTRY(strspn)
.type strspn, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
LOAD_FUNC_GOT_EAX (__strspn_ia32)
- HAS_SSE4_2
+ HAS_CPU_FEATURE (SSE4_2)
jz 2f
LOAD_FUNC_GOT_EAX (__strspn_sse42)
2: ret
diff --git a/sysdeps/i386/i686/multiarch/wcschr.S b/sysdeps/i386/i686/multiarch/wcschr.S
index 0c4ad2f..5918b12 100644
--- a/sysdeps/i386/i686/multiarch/wcschr.S
+++ b/sysdeps/i386/i686/multiarch/wcschr.S
@@ -27,7 +27,7 @@ ENTRY(__wcschr)
.type wcschr, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
LOAD_FUNC_GOT_EAX (__wcschr_ia32)
- HAS_SSE2
+ HAS_CPU_FEATURE (SSE2)
jz 2f
LOAD_FUNC_GOT_EAX (__wcschr_sse2)
2: ret
diff --git a/sysdeps/i386/i686/multiarch/wcscmp.S b/sysdeps/i386/i686/multiarch/wcscmp.S
index 445e034..db9c05a 100644
--- a/sysdeps/i386/i686/multiarch/wcscmp.S
+++ b/sysdeps/i386/i686/multiarch/wcscmp.S
@@ -30,7 +30,7 @@ ENTRY(__wcscmp)
.type __wcscmp, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
LOAD_FUNC_GOT_EAX (__wcscmp_ia32)
- HAS_SSE2
+ HAS_CPU_FEATURE (SSE2)
jz 2f
LOAD_FUNC_GOT_EAX (__wcscmp_sse2)
2: ret
diff --git a/sysdeps/i386/i686/multiarch/wcscpy.S b/sysdeps/i386/i686/multiarch/wcscpy.S
index 5f9f9f4..5f14970 100644
--- a/sysdeps/i386/i686/multiarch/wcscpy.S
+++ b/sysdeps/i386/i686/multiarch/wcscpy.S
@@ -28,7 +28,7 @@ ENTRY(wcscpy)
.type wcscpy, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
LOAD_FUNC_GOT_EAX (__wcscpy_ia32)
- HAS_SSSE3
+ HAS_CPU_FEATURE (SSSE3)
jz 2f
LOAD_FUNC_GOT_EAX (__wcscpy_ssse3)
2: ret
diff --git a/sysdeps/i386/i686/multiarch/wcslen.S b/sysdeps/i386/i686/multiarch/wcslen.S
index aabacda..7740404 100644
--- a/sysdeps/i386/i686/multiarch/wcslen.S
+++ b/sysdeps/i386/i686/multiarch/wcslen.S
@@ -27,7 +27,7 @@ ENTRY(__wcslen)
.type __wcslen, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
LOAD_FUNC_GOT_EAX (__wcslen_ia32)
- HAS_SSE2
+ HAS_CPU_FEATURE (SSE2)
jz 2f
LOAD_FUNC_GOT_EAX (__wcslen_sse2)
2: ret
diff --git a/sysdeps/i386/i686/multiarch/wcsrchr.S b/sysdeps/i386/i686/multiarch/wcsrchr.S
index 24f8313..9ed6810 100644
--- a/sysdeps/i386/i686/multiarch/wcsrchr.S
+++ b/sysdeps/i386/i686/multiarch/wcsrchr.S
@@ -27,7 +27,7 @@ ENTRY(wcsrchr)
.type wcsrchr, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
LOAD_FUNC_GOT_EAX (__wcsrchr_ia32)
- HAS_SSE2
+ HAS_CPU_FEATURE (SSE2)
jz 2f
LOAD_FUNC_GOT_EAX (__wcsrchr_sse2)
2: ret
diff --git a/sysdeps/i386/i686/multiarch/wmemcmp.S b/sysdeps/i386/i686/multiarch/wmemcmp.S
index dcf0fc0..6025942 100644
--- a/sysdeps/i386/i686/multiarch/wmemcmp.S
+++ b/sysdeps/i386/i686/multiarch/wmemcmp.S
@@ -29,10 +29,10 @@ ENTRY(wmemcmp)
.type wmemcmp, @gnu_indirect_function
LOAD_GOT_AND_RTLD_GLOBAL_RO
LOAD_FUNC_GOT_EAX (__wmemcmp_ia32)
- HAS_SSSE3
+ HAS_CPU_FEATURE (SSSE3)
jz 2f
LOAD_FUNC_GOT_EAX (__wmemcmp_ssse3)
- HAS_SSE4_2
+ HAS_CPU_FEATURE (SSE4_2)
jz 2f
LOAD_FUNC_GOT_EAX (__wmemcmp_sse4_2)
2: ret
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=bceb0e7ce16a3917ea36b49477ff98cf61dd70bd
commit bceb0e7ce16a3917ea36b49477ff98cf61dd70bd
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Sat Aug 1 06:52:53 2015 -0700
Remove HAS_XXX from cpu-features.h
diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
index 2ea4bec..587080c 100644
--- a/sysdeps/x86/cpu-features.c
+++ b/sysdeps/x86/cpu-features.c
@@ -150,7 +150,7 @@ init_cpu_features (struct cpu_features *cpu_features)
cpu_features->cpuid[COMMON_CPUID_INDEX_7].edx);
/* Can we call xgetbv? */
- if (CPU_FEATURE (OSXSAVE))
+ if (HAS_CPU_FEATURE (OSXSAVE))
{
unsigned int xcrlow;
unsigned int xcrhigh;
@@ -160,14 +160,14 @@ init_cpu_features (struct cpu_features *cpu_features)
(bit_YMM_state | bit_XMM_state))
{
/* Determine if AVX is usable. */
- if (CPU_FEATURE (AVX))
+ if (HAS_CPU_FEATURE (AVX))
cpu_features->feature[index_AVX_Usable] |= bit_AVX_Usable;
#if index_AVX2_Usable != index_AVX_Fast_Unaligned_Load
# error index_AVX2_Usable != index_AVX_Fast_Unaligned_Load
#endif
/* Determine if AVX2 is usable. Unaligned load with 256-bit
AVX registers are faster on processors with AVX2. */
- if (CPU_FEATURE (AVX2))
+ if (HAS_CPU_FEATURE (AVX2))
cpu_features->feature[index_AVX2_Usable]
|= bit_AVX2_Usable | bit_AVX_Fast_Unaligned_Load;
/* Check if OPMASK state, upper 256-bit of ZMM0-ZMM15 and
@@ -177,21 +177,21 @@ init_cpu_features (struct cpu_features *cpu_features)
(bit_Opmask_state | bit_ZMM0_15_state | bit_ZMM16_31_state))
{
/* Determine if AVX512F is usable. */
- if (CPU_FEATURE (AVX512F))
+ if (HAS_CPU_FEATURE (AVX512F))
{
cpu_features->feature[index_AVX512F_Usable]
|= bit_AVX512F_Usable;
/* Determine if AVX512DQ is usable. */
- if (CPU_FEATURE (AVX512DQ))
+ if (HAS_CPU_FEATURE (AVX512DQ))
cpu_features->feature[index_AVX512DQ_Usable]
|= bit_AVX512DQ_Usable;
}
}
/* Determine if FMA is usable. */
- if (CPU_FEATURE (FMA))
+ if (HAS_CPU_FEATURE (FMA))
cpu_features->feature[index_FMA_Usable] |= bit_FMA_Usable;
/* Determine if FMA4 is usable. */
- if (CPU_FEATURE (FMA4))
+ if (HAS_CPU_FEATURE (FMA4))
cpu_features->feature[index_FMA4_Usable] |= bit_FMA4_Usable;
}
}
diff --git a/sysdeps/x86/cpu-features.h b/sysdeps/x86/cpu-features.h
index 2c31169..9478e48 100644
--- a/sysdeps/x86/cpu-features.h
+++ b/sysdeps/x86/cpu-features.h
@@ -134,6 +134,7 @@
# endif /* !SHARED */
# endif /* !__x86_64__ */
+/* HAS_* evaluates to true if we may use the feature at runtime. */
# define HAS_CPU_FEATURE(name) HAS_FEATURE (CPUID_OFFSET, name)
# define HAS_ARCH_FEATURE(name) HAS_FEATURE (FEATURE_OFFSET, name)
@@ -183,8 +184,7 @@ extern const struct cpu_features *__get_cpu_features (void)
# endif
-/* Following are the feature tests used throughout libc. */
-
+/* HAS_* evaluates to true if we may use the feature at runtime. */
# define HAS_CPU_FEATURE(name) \
((__get_cpu_features ()->cpuid[index_##name].reg_##name & (bit_##name)) != 0)
# define HAS_ARCH_FEATURE(name) \
@@ -234,27 +234,4 @@ extern const struct cpu_features *__get_cpu_features (void)
#endif /* !__ASSEMBLER__ */
-/* HAS_* evaluates to true if we may use the feature at runtime. */
-#define CPU_FEATURE(feature) HAS_CPU_FEATURE (feature)
-
-#define HAS_SSE2 HAS_CPU_FEATURE (SSE2)
-#define HAS_POPCOUNT HAS_CPU_FEATURE (POPCOUNT)
-#define HAS_SSSE3 HAS_CPU_FEATURE (SSSE3)
-#define HAS_SSE4_1 HAS_CPU_FEATURE (SSE4_1)
-#define HAS_SSE4_2 HAS_CPU_FEATURE (SSE4_2)
-#define HAS_RTM HAS_CPU_FEATURE (RTM)
-
-#define HAS_FAST_REP_STRING HAS_ARCH_FEATURE (Fast_Rep_String)
-#define HAS_FAST_COPY_BACKWARD HAS_ARCH_FEATURE (Fast_Copy_Backward)
-#define HAS_SLOW_BSF HAS_ARCH_FEATURE (Slow_BSF)
-#define HAS_FAST_UNALIGNED_LOAD HAS_ARCH_FEATURE (Fast_Unaligned_Load)
-#define HAS_SLOW_SSE4_2 HAS_ARCH_FEATURE (Slow_SSE4_2)
-#define HAS_AVX HAS_ARCH_FEATURE (AVX_Usable)
-#define HAS_AVX2 HAS_ARCH_FEATURE (AVX2_Usable)
-#define HAS_AVX512F HAS_ARCH_FEATURE (AVX512F_Usable)
-#define HAS_AVX512DQ HAS_ARCH_FEATURE (AVX512DQ_Usable)
-#define HAS_FMA HAS_ARCH_FEATURE (FMA_Usable)
-#define HAS_FMA4 HAS_ARCH_FEATURE (FMA4_Usable)
-#define HAS_AVX_FAST_UNALIGNED_LOAD HAS_ARCH_FEATURE (AVX_Fast_Unaligned_Load)
-
#endif /* cpu_features_h */
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=bcbfce0a79fd8a31e14093339c6a58bd254bfaf6
commit bcbfce0a79fd8a31e14093339c6a58bd254bfaf6
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Sat Aug 1 05:30:27 2015 -0700
Add CPU_FEATURE
diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
index 9bf3788..2ea4bec 100644
--- a/sysdeps/x86/cpu-features.c
+++ b/sysdeps/x86/cpu-features.c
@@ -150,7 +150,7 @@ init_cpu_features (struct cpu_features *cpu_features)
cpu_features->cpuid[COMMON_CPUID_INDEX_7].edx);
/* Can we call xgetbv? */
- if (CPUID_OSXSAVE)
+ if (CPU_FEATURE (OSXSAVE))
{
unsigned int xcrlow;
unsigned int xcrhigh;
@@ -160,14 +160,14 @@ init_cpu_features (struct cpu_features *cpu_features)
(bit_YMM_state | bit_XMM_state))
{
/* Determine if AVX is usable. */
- if (CPUID_AVX)
+ if (CPU_FEATURE (AVX))
cpu_features->feature[index_AVX_Usable] |= bit_AVX_Usable;
#if index_AVX2_Usable != index_AVX_Fast_Unaligned_Load
# error index_AVX2_Usable != index_AVX_Fast_Unaligned_Load
#endif
/* Determine if AVX2 is usable. Unaligned load with 256-bit
AVX registers are faster on processors with AVX2. */
- if (CPUID_AVX2)
+ if (CPU_FEATURE (AVX2))
cpu_features->feature[index_AVX2_Usable]
|= bit_AVX2_Usable | bit_AVX_Fast_Unaligned_Load;
/* Check if OPMASK state, upper 256-bit of ZMM0-ZMM15 and
@@ -177,21 +177,21 @@ init_cpu_features (struct cpu_features *cpu_features)
(bit_Opmask_state | bit_ZMM0_15_state | bit_ZMM16_31_state))
{
/* Determine if AVX512F is usable. */
- if (CPUID_AVX512F)
+ if (CPU_FEATURE (AVX512F))
{
cpu_features->feature[index_AVX512F_Usable]
|= bit_AVX512F_Usable;
/* Determine if AVX512DQ is usable. */
- if (CPUID_AVX512DQ)
+ if (CPU_FEATURE (AVX512DQ))
cpu_features->feature[index_AVX512DQ_Usable]
|= bit_AVX512DQ_Usable;
}
}
/* Determine if FMA is usable. */
- if (CPUID_FMA)
+ if (CPU_FEATURE (FMA))
cpu_features->feature[index_FMA_Usable] |= bit_FMA_Usable;
/* Determine if FMA4 is usable. */
- if (CPUID_FMA4)
+ if (CPU_FEATURE (FMA4))
cpu_features->feature[index_FMA4_Usable] |= bit_FMA4_Usable;
}
}
diff --git a/sysdeps/x86/cpu-features.h b/sysdeps/x86/cpu-features.h
index 01118cf..2c31169 100644
--- a/sysdeps/x86/cpu-features.h
+++ b/sysdeps/x86/cpu-features.h
@@ -218,15 +218,6 @@ extern const struct cpu_features *__get_cpu_features (void)
# define reg_POPCOUNT ecx
# define reg_OSXSAVE ecx
-# define CPUID_OSXSAVE HAS_CPU_FEATURE (OSXSAVE)
-# define CPUID_AVX HAS_CPU_FEATURE (AVX)
-# define CPUID_AVX512F HAS_CPU_FEATURE (AVX512F)
-# define CPUID_AVX512DQ HAS_CPU_FEATURE (AVX512DQ)
-# define CPUID_RTM HAS_CPU_FEATURE (RTM)
-# define CPUID_FMA HAS_CPU_FEATURE (FMA)
-# define CPUID_FMA4 HAS_CPU_FEATURE (FMA4)
-# define CPUID_AVX2 HAS_CPU_FEATURE (AVX2)
-
# define index_Fast_Rep_String FEATURE_INDEX_1
# define index_Fast_Copy_Backward FEATURE_INDEX_1
# define index_Slow_BSF FEATURE_INDEX_1
@@ -244,6 +235,8 @@ extern const struct cpu_features *__get_cpu_features (void)
#endif /* !__ASSEMBLER__ */
/* HAS_* evaluates to true if we may use the feature at runtime. */
+#define CPU_FEATURE(feature) HAS_CPU_FEATURE (feature)
+
#define HAS_SSE2 HAS_CPU_FEATURE (SSE2)
#define HAS_POPCOUNT HAS_CPU_FEATURE (POPCOUNT)
#define HAS_SSSE3 HAS_CPU_FEATURE (SSSE3)
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=d56c9d73023c8f13c7a6ed120b10f33093d7d612
commit d56c9d73023c8f13c7a6ed120b10f33093d7d612
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Sat Aug 1 05:23:03 2015 -0700
Update cpu-features.h
diff --git a/sysdeps/x86/cpu-features.c b/sysdeps/x86/cpu-features.c
index cbdf4af..9bf3788 100644
--- a/sysdeps/x86/cpu-features.c
+++ b/sysdeps/x86/cpu-features.c
@@ -1,5 +1,6 @@
-/* Copyright (C) 2015 Free Software Foundation, Inc.
+/* Initialize CPU feature data.
This file is part of the GNU C Library.
+ Copyright (C) 2008-2015 Free Software Foundation, Inc.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
diff --git a/sysdeps/x86/cpu-features.h b/sysdeps/x86/cpu-features.h
index c8ff30e..01118cf 100644
--- a/sysdeps/x86/cpu-features.h
+++ b/sysdeps/x86/cpu-features.h
@@ -90,7 +90,6 @@
# define index_AVX512F_Usable FEATURE_INDEX_1*FEATURE_SIZE
# define index_AVX512DQ_Usable FEATURE_INDEX_1*FEATURE_SIZE
-/* HAS_* evaluates to true if we may use the feature at runtime. */
# ifdef __x86_64__
# ifdef SHARED
# if IS_IN (rtld)
@@ -135,16 +134,9 @@
# endif /* !SHARED */
# endif /* !__x86_64__ */
-# define HAS_CPU_FEATURE(name) HAS_FEATURE (CPUID_OFFSET, name)
+# define HAS_CPU_FEATURE(name) HAS_FEATURE (CPUID_OFFSET, name)
# define HAS_ARCH_FEATURE(name) HAS_FEATURE (FEATURE_OFFSET, name)
-# define HAS_SSE2 HAS_CPU_FEATURE (SSE2)
-# define HAS_POPCOUNT HAS_CPU_FEATURE (POPCOUNT)
-# define HAS_SSSE3 HAS_CPU_FEATURE (SSSE3)
-# define HAS_SSE4_1 HAS_CPU_FEATURE (SSE4_1)
-# define HAS_SSE4_2 HAS_CPU_FEATURE (SSE4_2)
-# define HAS_RTM HAS_CPU_FEATURE (RTM)
-
#else /* __ASSEMBLER__ */
enum
@@ -190,38 +182,50 @@ extern const struct cpu_features *__get_cpu_features (void)
# define __get_cpu_features() (&GLRO(dl_x86_cpu_features))
# endif
-# define HAS_CPU_FEATURE(idx, reg, bit) \
- ((__get_cpu_features ()->cpuid[idx].reg & (bit)) != 0)
/* Following are the feature tests used throughout libc. */
-# define HAS_CPUID_FLAG(idx, reg, bit) \
- ((__get_cpu_features ()->cpuid[idx].reg & (bit)) != 0)
-
-# define CPUID_OSXSAVE \
- HAS_CPUID_FLAG (COMMON_CPUID_INDEX_1, ecx, bit_OSXSAVE)
-# define CPUID_AVX \
- HAS_CPUID_FLAG (COMMON_CPUID_INDEX_1, ecx, bit_AVX)
-# define CPUID_FMA \
- HAS_CPUID_FLAG (COMMON_CPUID_INDEX_1, ecx, bit_FMA)
-# define CPUID_FMA4 \
- HAS_CPUID_FLAG (COMMON_CPUID_INDEX_80000001, ecx, bit_FMA4)
-# define CPUID_RTM \
- HAS_CPUID_FLAG (COMMON_CPUID_INDEX_7, ebx, bit_RTM)
-# define CPUID_AVX2 \
- HAS_CPUID_FLAG (COMMON_CPUID_INDEX_7, ebx, bit_AVX2)
-# define CPUID_AVX512F \
- HAS_CPUID_FLAG (COMMON_CPUID_INDEX_7, ebx, bit_AVX512F)
-# define CPUID_AVX512DQ \
- HAS_CPUID_FLAG (COMMON_CPUID_INDEX_7, ebx, bit_AVX512DQ)
+# define HAS_CPU_FEATURE(name) \
+ ((__get_cpu_features ()->cpuid[index_##name].reg_##name & (bit_##name)) != 0)
+# define HAS_ARCH_FEATURE(name) \
+ ((__get_cpu_features ()->feature[index_##name] & (bit_##name)) != 0)
-/* HAS_* evaluates to true if we may use the feature at runtime. */
-# define HAS_SSE2 HAS_CPU_FEATURE (COMMON_CPUID_INDEX_1, edx, bit_SSE2)
-# define HAS_POPCOUNT HAS_CPU_FEATURE (COMMON_CPUID_INDEX_1, ecx, bit_POPCOUNT)
-# define HAS_SSSE3 HAS_CPU_FEATURE (COMMON_CPUID_INDEX_1, ecx, bit_SSSE3)
-# define HAS_SSE4_1 HAS_CPU_FEATURE (COMMON_CPUID_INDEX_1, ecx, bit_SSE4_1)
-# define HAS_SSE4_2 HAS_CPU_FEATURE (COMMON_CPUID_INDEX_1, ecx, bit_SSE4_2)
-# define HAS_RTM HAS_CPU_FEATURE (COMMON_CPUID_INDEX_7, ebx, bit_RTM)
+# define index_SSE2 COMMON_CPUID_INDEX_1
+# define index_SSSE3 COMMON_CPUID_INDEX_1
+# define index_SSE4_1 COMMON_CPUID_INDEX_1
+# define index_SSE4_2 COMMON_CPUID_INDEX_1
+# define index_AVX COMMON_CPUID_INDEX_1
+# define index_AVX2 COMMON_CPUID_INDEX_7
+# define index_AVX512F COMMON_CPUID_INDEX_7
+# define index_AVX512DQ COMMON_CPUID_INDEX_7
+# define index_RTM COMMON_CPUID_INDEX_7
+# define index_FMA COMMON_CPUID_INDEX_1
+# define index_FMA4 COMMON_CPUID_INDEX_80000001
+# define index_POPCOUNT COMMON_CPUID_INDEX_1
+# define index_OSXSAVE COMMON_CPUID_INDEX_1
+
+# define reg_SSE2 edx
+# define reg_SSSE3 ecx
+# define reg_SSE4_1 ecx
+# define reg_SSE4_2 ecx
+# define reg_AVX ecx
+# define reg_AVX2 ebx
+# define reg_AVX512F ebx
+# define reg_AVX512DQ ebx
+# define reg_RTM ebx
+# define reg_FMA ecx
+# define reg_FMA4 ecx
+# define reg_POPCOUNT ecx
+# define reg_OSXSAVE ecx
+
+# define CPUID_OSXSAVE HAS_CPU_FEATURE (OSXSAVE)
+# define CPUID_AVX HAS_CPU_FEATURE (AVX)
+# define CPUID_AVX512F HAS_CPU_FEATURE (AVX512F)
+# define CPUID_AVX512DQ HAS_CPU_FEATURE (AVX512DQ)
+# define CPUID_RTM HAS_CPU_FEATURE (RTM)
+# define CPUID_FMA HAS_CPU_FEATURE (FMA)
+# define CPUID_FMA4 HAS_CPU_FEATURE (FMA4)
+# define CPUID_AVX2 HAS_CPU_FEATURE (AVX2)
# define index_Fast_Rep_String FEATURE_INDEX_1
# define index_Fast_Copy_Backward FEATURE_INDEX_1
@@ -237,10 +241,15 @@ extern const struct cpu_features *__get_cpu_features (void)
# define index_AVX512F_Usable FEATURE_INDEX_1
# define index_AVX512DQ_Usable FEATURE_INDEX_1
-# define HAS_ARCH_FEATURE(name) \
- ((__get_cpu_features ()->feature[index_##name] & (bit_##name)) != 0)
+#endif /* !__ASSEMBLER__ */
-#endif /* __ASSEMBLER__ */
+/* HAS_* evaluates to true if we may use the feature at runtime. */
+#define HAS_SSE2 HAS_CPU_FEATURE (SSE2)
+#define HAS_POPCOUNT HAS_CPU_FEATURE (POPCOUNT)
+#define HAS_SSSE3 HAS_CPU_FEATURE (SSSE3)
+#define HAS_SSE4_1 HAS_CPU_FEATURE (SSE4_1)
+#define HAS_SSE4_2 HAS_CPU_FEATURE (SSE4_2)
+#define HAS_RTM HAS_CPU_FEATURE (RTM)
#define HAS_FAST_REP_STRING HAS_ARCH_FEATURE (Fast_Rep_String)
#define HAS_FAST_COPY_BACKWARD HAS_ARCH_FEATURE (Fast_Copy_Backward)
-----------------------------------------------------------------------
Summary of changes:
sysdeps/i386/i686/fpu/multiarch/e_expf.c | 8 +-
sysdeps/i386/i686/fpu/multiarch/s_cosf.c | 2 +-
sysdeps/i386/i686/fpu/multiarch/s_sincosf.c | 3 +-
sysdeps/i386/i686/fpu/multiarch/s_sinf.c | 2 +-
sysdeps/i386/i686/multiarch/bcopy.S | 8 +-
sysdeps/i386/i686/multiarch/bzero.S | 4 +-
sysdeps/i386/i686/multiarch/ifunc-impl-list.c | 199 ++++++++++++--------
sysdeps/i386/i686/multiarch/memchr.S | 4 +-
sysdeps/i386/i686/multiarch/memcmp.S | 4 +-
sysdeps/i386/i686/multiarch/memcpy.S | 8 +-
sysdeps/i386/i686/multiarch/memcpy_chk.S | 8 +-
sysdeps/i386/i686/multiarch/memmove.S | 8 +-
sysdeps/i386/i686/multiarch/memmove_chk.S | 8 +-
sysdeps/i386/i686/multiarch/mempcpy.S | 8 +-
sysdeps/i386/i686/multiarch/mempcpy_chk.S | 8 +-
sysdeps/i386/i686/multiarch/memrchr.S | 4 +-
sysdeps/i386/i686/multiarch/memset.S | 4 +-
sysdeps/i386/i686/multiarch/memset_chk.S | 4 +-
sysdeps/i386/i686/multiarch/rawmemchr.S | 4 +-
sysdeps/i386/i686/multiarch/s_fma.c | 3 +-
sysdeps/i386/i686/multiarch/s_fmaf.c | 3 +-
sysdeps/i386/i686/multiarch/strcasecmp.S | 6 +-
sysdeps/i386/i686/multiarch/strcat.S | 6 +-
sysdeps/i386/i686/multiarch/strchr.S | 4 +-
sysdeps/i386/i686/multiarch/strcmp.S | 6 +-
sysdeps/i386/i686/multiarch/strcpy.S | 6 +-
sysdeps/i386/i686/multiarch/strcspn.S | 2 +-
sysdeps/i386/i686/multiarch/strlen.S | 4 +-
sysdeps/i386/i686/multiarch/strncase.S | 6 +-
sysdeps/i386/i686/multiarch/strnlen.S | 2 +-
sysdeps/i386/i686/multiarch/strrchr.S | 4 +-
sysdeps/i386/i686/multiarch/strspn.S | 2 +-
sysdeps/i386/i686/multiarch/wcschr.S | 2 +-
sysdeps/i386/i686/multiarch/wcscmp.S | 2 +-
sysdeps/i386/i686/multiarch/wcscpy.S | 2 +-
sysdeps/i386/i686/multiarch/wcslen.S | 2 +-
sysdeps/i386/i686/multiarch/wcsrchr.S | 2 +-
sysdeps/i386/i686/multiarch/wmemcmp.S | 4 +-
sysdeps/unix/sysv/linux/x86/elision-conf.c | 4 +-
sysdeps/x86/cpu-features.c | 17 +-
sysdeps/x86/cpu-features.h | 91 ++++------
sysdeps/x86_64/fpu/math-tests-arch.h | 6 +-
sysdeps/x86_64/fpu/multiarch/e_asin.c | 8 +-
sysdeps/x86_64/fpu/multiarch/e_atan2.c | 9 +-
sysdeps/x86_64/fpu/multiarch/e_exp.c | 9 +-
sysdeps/x86_64/fpu/multiarch/e_log.c | 9 +-
sysdeps/x86_64/fpu/multiarch/e_pow.c | 5 +-
sysdeps/x86_64/fpu/multiarch/s_atan.c | 9 +-
sysdeps/x86_64/fpu/multiarch/s_fma.c | 9 +-
sysdeps/x86_64/fpu/multiarch/s_fmaf.c | 9 +-
sysdeps/x86_64/fpu/multiarch/s_sin.c | 14 +-
sysdeps/x86_64/fpu/multiarch/s_tan.c | 9 +-
sysdeps/x86_64/fpu/multiarch/svml_d_cos2_core.S | 2 +-
sysdeps/x86_64/fpu/multiarch/svml_d_cos4_core.S | 2 +-
sysdeps/x86_64/fpu/multiarch/svml_d_cos8_core.S | 4 +-
sysdeps/x86_64/fpu/multiarch/svml_d_exp2_core.S | 2 +-
sysdeps/x86_64/fpu/multiarch/svml_d_exp4_core.S | 2 +-
sysdeps/x86_64/fpu/multiarch/svml_d_exp8_core.S | 4 +-
sysdeps/x86_64/fpu/multiarch/svml_d_log2_core.S | 2 +-
sysdeps/x86_64/fpu/multiarch/svml_d_log4_core.S | 2 +-
sysdeps/x86_64/fpu/multiarch/svml_d_log8_core.S | 4 +-
sysdeps/x86_64/fpu/multiarch/svml_d_pow2_core.S | 2 +-
sysdeps/x86_64/fpu/multiarch/svml_d_pow4_core.S | 2 +-
sysdeps/x86_64/fpu/multiarch/svml_d_pow8_core.S | 4 +-
sysdeps/x86_64/fpu/multiarch/svml_d_sin2_core.S | 2 +-
sysdeps/x86_64/fpu/multiarch/svml_d_sin4_core.S | 2 +-
sysdeps/x86_64/fpu/multiarch/svml_d_sin8_core.S | 4 +-
sysdeps/x86_64/fpu/multiarch/svml_d_sincos2_core.S | 2 +-
sysdeps/x86_64/fpu/multiarch/svml_d_sincos4_core.S | 2 +-
sysdeps/x86_64/fpu/multiarch/svml_d_sincos8_core.S | 4 +-
sysdeps/x86_64/fpu/multiarch/svml_s_cosf16_core.S | 4 +-
sysdeps/x86_64/fpu/multiarch/svml_s_cosf4_core.S | 2 +-
sysdeps/x86_64/fpu/multiarch/svml_s_cosf8_core.S | 2 +-
sysdeps/x86_64/fpu/multiarch/svml_s_expf16_core.S | 4 +-
sysdeps/x86_64/fpu/multiarch/svml_s_expf4_core.S | 2 +-
sysdeps/x86_64/fpu/multiarch/svml_s_expf8_core.S | 2 +-
sysdeps/x86_64/fpu/multiarch/svml_s_logf16_core.S | 4 +-
sysdeps/x86_64/fpu/multiarch/svml_s_logf4_core.S | 2 +-
sysdeps/x86_64/fpu/multiarch/svml_s_logf8_core.S | 2 +-
sysdeps/x86_64/fpu/multiarch/svml_s_powf16_core.S | 4 +-
sysdeps/x86_64/fpu/multiarch/svml_s_powf4_core.S | 2 +-
sysdeps/x86_64/fpu/multiarch/svml_s_powf8_core.S | 2 +-
.../x86_64/fpu/multiarch/svml_s_sincosf16_core.S | 4 +-
.../x86_64/fpu/multiarch/svml_s_sincosf4_core.S | 2 +-
.../x86_64/fpu/multiarch/svml_s_sincosf8_core.S | 2 +-
sysdeps/x86_64/fpu/multiarch/svml_s_sinf16_core.S | 4 +-
sysdeps/x86_64/fpu/multiarch/svml_s_sinf4_core.S | 2 +-
sysdeps/x86_64/fpu/multiarch/svml_s_sinf8_core.S | 2 +-
sysdeps/x86_64/multiarch/ifunc-impl-list.c | 139 +++++++++-----
sysdeps/x86_64/multiarch/memcmp.S | 4 +-
sysdeps/x86_64/multiarch/memcpy.S | 6 +-
sysdeps/x86_64/multiarch/memcpy_chk.S | 6 +-
sysdeps/x86_64/multiarch/memmove.c | 6 +-
sysdeps/x86_64/multiarch/memmove_chk.c | 6 +-
sysdeps/x86_64/multiarch/mempcpy.S | 6 +-
sysdeps/x86_64/multiarch/mempcpy_chk.S | 6 +-
sysdeps/x86_64/multiarch/memset.S | 2 +-
sysdeps/x86_64/multiarch/memset_chk.S | 2 +-
sysdeps/x86_64/multiarch/sched_cpucount.c | 2 +-
sysdeps/x86_64/multiarch/strcat.S | 4 +-
sysdeps/x86_64/multiarch/strchr.S | 2 +-
sysdeps/x86_64/multiarch/strcmp.S | 24 ++--
sysdeps/x86_64/multiarch/strcpy.S | 4 +-
sysdeps/x86_64/multiarch/strcspn.S | 2 +-
sysdeps/x86_64/multiarch/strspn.S | 2 +-
sysdeps/x86_64/multiarch/strstr.c | 5 +-
sysdeps/x86_64/multiarch/test-multiarch.c | 18 ++-
sysdeps/x86_64/multiarch/wcscpy.S | 2 +-
sysdeps/x86_64/multiarch/wmemcmp.S | 4 +-
109 files changed, 509 insertions(+), 413 deletions(-)
hooks/post-receive
--
GNU C Library master sources