This is the mail archive of the
glibc-cvs@sourceware.org
mailing list for the glibc project.
GNU C Library master sources branch master updated. glibc-2.20-479-g61695fb
- From: sje at sourceware dot org
- To: glibc-cvs at sourceware dot org
- Date: 5 Jan 2015 23:07:34 -0000
- Subject: GNU C Library master sources branch master updated. glibc-2.20-479-g61695fb
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "GNU C Library master sources".
The branch, master has been updated
via 61695fb2bab724ed69057c3eff03253708f96517 (commit)
via 295a453e2179b8e4e2b578e0176e76b9b574d7fc (commit)
from ef9faf138578dc7e559a9fd58080825962ce0339 (commit)
Those revisions listed above that are new to this repository have
not appeared on any other notification email; so we list those
revisions in full, below.
- Log -----------------------------------------------------------------
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=61695fb2bab724ed69057c3eff03253708f96517
commit 61695fb2bab724ed69057c3eff03253708f96517
Merge: 295a453 ef9faf1
Author: Steve Ellcey <sellcey@mips.com>
Date: Mon Jan 5 15:07:26 2015 -0800
Merge branch 'master' of ssh://sourceware.org/git/glibc
diff --cc ChangeLog
index 122d582,ecb3b44..13448df
--- a/ChangeLog
+++ b/ChangeLog
@@@ -1,10 -1,32 +1,37 @@@
+ 2015-01-05 Joseph Myers <joseph@codesourcery.com>
+
+ [BZ #17748]
+ * include/fenv.h (__feholdexcept): Declare. Use
+ libm_hidden_proto.
+ * math/feholdexcpt.c (feholdexcept): Rename to __feholdexcept and
+ define as weak alias of __feholdexcept. Use libm_hidden_weak.
+ * sysdeps/aarch64/fpu/feholdexcpt.c (feholdexcept): Likewise.
+ * sysdeps/alpha/fpu/feholdexcpt.c (feholdexcept): Likewise.
+ * sysdeps/arm/feholdexcpt.c (feholdexcept): Likewise.
+ * sysdeps/hppa/fpu/feholdexcpt.c (feholdexcept): Likewise.
+ * sysdeps/i386/fpu/feholdexcpt.c (feholdexcept): Likewise.
+ * sysdeps/ia64/fpu/feholdexcpt.c (feholdexcept): Likewise.
+ * sysdeps/m68k/fpu/feholdexcpt.c (feholdexcept): Likewise.
+ * sysdeps/mips/fpu/feholdexcpt.c (feholdexcept): Likewise.
+ * sysdeps/powerpc/fpu/feholdexcpt.c (feholdexcept): Likewise.
+ * sysdeps/powerpc/nofpu/feholdexcpt.c (feholdexcept): Likewise.
+ * sysdeps/powerpc/powerpc32/e500/nofpu/feholdexcpt.c
+ (feholdexcept): Likewise.
+ * sysdeps/s390/fpu/feholdexcpt.c (feholdexcept): Likewise.
+ * sysdeps/sh/sh4/fpu/feholdexcpt.c (feholdexcept): Likewise.
+ * sysdeps/sparc/fpu/feholdexcpt.c (feholdexcept): Likewise.
+ * sysdeps/x86_64/fpu/feholdexcpt.c (feholdexcept): Likewise.
+ * sysdeps/generic/math_private.h (default_libc_feholdexcept): Use
+ __feholdexcept instead of feholdexcept.
+ (default_libc_feholdexcept_setround): Likewise.
+
2015-01-05 Steve Ellcey <sellcey@imgtec.com>
+ * sysdeps/mips/memset.S (memset): Modify for mips32r6/mips64r6
+ to avoid using stl/str to align destination.
+
+2015-01-05 Steve Ellcey <sellcey@imgtec.com>
+
* sysdeps/mips/memcpy.S: Add support for mips32r6/mips64r6.
2015-01-05 Joseph Myers <joseph@codesourcery.com>
http://sourceware.org/git/gitweb.cgi?p=glibc.git;a=commitdiff;h=295a453e2179b8e4e2b578e0176e76b9b574d7fc
commit 295a453e2179b8e4e2b578e0176e76b9b574d7fc
Author: Steve Ellcey <sellcey@mips.com>
Date: Mon Jan 5 15:06:42 2015 -0800
2015-01-05 Steve Ellcey <sellcey@imgtec.com>
* sysdeps/mips/memset.S (memset): Modify for mips32r6/mips64r6
to avoid using stl/str to align destination.
diff --git a/ChangeLog b/ChangeLog
index 2afd2b2..122d582 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,10 @@
2015-01-05 Steve Ellcey <sellcey@imgtec.com>
+ * sysdeps/mips/memset.S (memset): Modify for mips32r6/mips64r6
+ to avoid using stl/str to align destination.
+
+2015-01-05 Steve Ellcey <sellcey@imgtec.com>
+
* sysdeps/mips/memcpy.S: Add support for mips32r6/mips64r6.
2015-01-05 Joseph Myers <joseph@codesourcery.com>
diff --git a/sysdeps/mips/memset.S b/sysdeps/mips/memset.S
index abd73c2..0a9b5ca 100644
--- a/sysdeps/mips/memset.S
+++ b/sysdeps/mips/memset.S
@@ -54,6 +54,14 @@
# endif
#endif
+#if __mips_isa_rev > 5
+# if (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
+# undef PREFETCH_STORE_HINT
+# define PREFETCH_STORE_HINT PREFETCH_HINT_STORE_STREAMED
+# endif
+# define R6_CODE
+#endif
+
/* Some asm.h files do not have the L macro definition. */
#ifndef L
# if _MIPS_SIM == _ABIO32
@@ -72,6 +80,15 @@
# endif
#endif
+/* New R6 instructions that may not be in asm.h. */
+#ifndef PTR_LSA
+# if _MIPS_SIM == _ABI64
+# define PTR_LSA dlsa
+# else
+# define PTR_LSA lsa
+# endif
+#endif
+
/* Using PREFETCH_HINT_PREPAREFORSTORE instead of PREFETCH_STORE
or PREFETCH_STORE_STREAMED offers a large performance advantage
but PREPAREFORSTORE has some special restrictions to consider.
@@ -231,11 +248,48 @@ LEAF(MEMSET_NAME)
/* If the destination address is not aligned do a partial store to get it
aligned. If it is already aligned just jump to L(aligned). */
L(set0):
+#ifndef R6_CODE
andi t2,a3,(NSIZE-1) /* word-unaligned address? */
beq t2,zero,L(aligned) /* t2 is the unalignment count */
PTR_SUBU a2,a2,t2
C_STHI a1,0(a0)
PTR_ADDU a0,a0,t2
+#else /* R6_CODE */
+ andi t2,a0,(NSIZE-1)
+ lapc t9,L(atable)
+ PTR_LSA t9,t2,t9,2
+ jrc t9
+L(atable):
+ bc L(aligned)
+# ifdef USE_DOUBLE
+ bc L(lb7)
+ bc L(lb6)
+ bc L(lb5)
+ bc L(lb4)
+# endif
+ bc L(lb3)
+ bc L(lb2)
+ bc L(lb1)
+L(lb7):
+ sb a1,6(a0)
+L(lb6):
+ sb a1,5(a0)
+L(lb5):
+ sb a1,4(a0)
+L(lb4):
+ sb a1,3(a0)
+L(lb3):
+ sb a1,2(a0)
+L(lb2):
+ sb a1,1(a0)
+L(lb1):
+ sb a1,0(a0)
+
+ li t9,NSIZE
+ subu t2,t9,t2
+ PTR_SUBU a2,a2,t2
+ PTR_ADDU a0,a0,t2
+#endif /* R6_CODE */
L(aligned):
/* If USE_DOUBLE is not set we may still want to align the data on a 16
@@ -286,8 +340,12 @@ L(loop16w):
bgtz v1,L(skip_pref)
nop
#endif
+#ifdef R6_CODE
+ PREFETCH_FOR_STORE (2, a0)
+#else
PREFETCH_FOR_STORE (4, a0)
PREFETCH_FOR_STORE (5, a0)
+#endif
L(skip_pref):
C_ST a1,UNIT(0)(a0)
C_ST a1,UNIT(1)(a0)
-----------------------------------------------------------------------
Summary of changes:
ChangeLog | 5 ++++
sysdeps/mips/memset.S | 58 +++++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 63 insertions(+), 0 deletions(-)
hooks/post-receive
--
GNU C Library master sources