This is the mail archive of the mailing list for the glibc project.

Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

[Bug string/25131] memcpy perfomance problem with ARM 32 A9be due to high cache-misses

--- Comment #9 from Adhemerval Zanella <adhemerval.zanella at linaro dot org> ---
On 25/11/2019 09:33, helugang at huawei dot com wrote:
> --- Comment #8 from helugang <helugang at huawei dot com> ---
> (In reply to Adhemerval Zanella from comment #7)
>> (In reply to Florian Weimer from comment #6)
>>> The usual way we deal with this is to use some mechanism to probe for the
>>> platform in question and use an IFUNC handler to switch to the optimized
>>> version for this platform only.
>>> I'm not sure if 32-bit Arm platform variants can be identified easily at the
>>> CPU level or from the auxiliary vector. It may be necessary to do some
>>> kernel work first.
>> Another option is to try to improve the generic armv7 implementation, the
>> main challenge is to create a strategy that does not regress on other chip
>> implementation.
>> One option is to check if !USE_VFP code path (that does use PLD instruction)
>> yields any performance gain and check against at least some different chip
>> implementations.
> First,than you for your reply.
> We have tried to use th

I think your message was truncated somehow.

You are receiving this mail because:
You are on the CC list for the bug.

Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]