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[Bug string/19907] Incorrect memcpy tests
- From: "cvs-commit at gcc dot gnu.org" <sourceware-bugzilla at sourceware dot org>
- To: glibc-bugs at sourceware dot org
- Date: Tue, 05 Apr 2016 15:20:37 +0000
- Subject: [Bug string/19907] Incorrect memcpy tests
- Auto-submitted: auto-generated
- References: <bug-19907-131 at http dot sourceware dot org/bugzilla/>
https://sourceware.org/bugzilla/show_bug.cgi?id=19907
--- Comment #4 from cvs-commit at gcc dot gnu.org <cvs-commit at gcc dot gnu.org> ---
This is an automated email from the git hooks/post-receive script. It was
generated because a ref change was pushed to the repository containing
the project "GNU C Library master sources".
The branch, hjl/benchtests/master has been created
at bf21eebd94019f333f6001ac304bf9907462a3fc (commit)
- Log -----------------------------------------------------------------
https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=bf21eebd94019f333f6001ac304bf9907462a3fc
commit bf21eebd94019f333f6001ac304bf9907462a3fc
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Sun Apr 3 17:21:45 2016 -0700
X86-64: Use non-temporal store in memmove on large data
memcpy/memmove benchmarks with large data shows that there is a
regression with large data on Haswell machine. non-temporal store
in memmove on large data can improve performance significantly. This
patch adds a threshold to use non temporal store which is 4 times of
shared cache size. When size is above the threshold, non temporal
store will be used.
For size below 8 vector register width, we load all data into registers
and store them together. Only forward and backward loops, which move 4
vector registers at a time, are used to support overlapping addresses.
For forward loop, we load the last 4 vector register width of data and
the first vector register width of data into vector registers before the
loop and store them after the loop. For backward loop, we load the first
4 vector register width of data and the last vector register width of
data into vector registers before the loop and store them after the loop.
* sysdeps/x86_64/cacheinfo.c (__x86_shared_non_temporal_threshold):
New.
(init_cacheinfo): Set __x86_shared_non_temporal_threshold to
4 times of shared cache size.
* sysdeps/x86_64/multiarch/memmove-avx-unaligned-erms.S
(PREFETCHNT): New.
(VMOVNT): Likewise.
* sysdeps/x86_64/multiarch/memmove-avx512-unaligned-erms.S
(PREFETCHNT): Likewise.
(VMOVNT): Likewise.
* sysdeps/x86_64/multiarch/memmove-sse2-unaligned-erms.S
(PREFETCHNT): Likewise.
(VMOVNT): Likewise.
(VMOVU): Changed to movups for smaller code sizes.
(VMOVA): Changed to movaps for smaller code sizes.
* sysdeps/x86_64/multiarch/memmove-vec-unaligned-erms.S: Update
comments. Rewrite to use forward and backward loops, which move
4 vector registers at a time, to support overlapping addresses
and use non temporal store if size is above the threshold.
https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=2c90c17c112396b1ff51584ebef1f3005292fbc3
commit 2c90c17c112396b1ff51584ebef1f3005292fbc3
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Mon Apr 4 09:38:30 2016 -0700
Clear destination buffer set by the previous run
Clear the destination buffer set by the previous run in test-memcpy.c
and test-memmove.c to catch the error when the following implementations
do copy anything.
PR string/19907
* string/test-memcpy.c (do_one_test): Clear the destination
buffer set by the previous run.
* string/test-memmove.c (do_one_test): Likewise.
https://sourceware.org/git/gitweb.cgi?p=glibc.git;h=410d4ffe105eefab7248d9e8f9840936393b6837
commit 410d4ffe105eefab7248d9e8f9840936393b6837
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Wed Mar 30 09:18:27 2016 -0700
Add memcpy/memmove/memset benchmarks with large data
Add memcpy, memmove and memset benchmarks with large data sizes.
* benchtests/Makefile (string-benchset): Add memcpy-large,
memmove-large and memset-large.
* benchtests/bench-memcpy-large.c: New file.
* benchtests/bench-memmove-large.c: Likewise.
* benchtests/bench-memmove-large.c: Likewise.
* benchtests/bench-string.h (TIMEOUT): Don't redefine.
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