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[Bug nptl/2505] New: lock optimisations for 32bit powerpc


The currently PPC32 still uses (full) sync for atomic.h and
lowlevellock.h to insure backward compatibility with older 32-bit PPC
chips. This is penalizing the performance of 32-bit applications on the
newer 64-bit processors like 970, POWER4, and POWER5 which do implement
lwsync.

With gcc-4.1, gcc will define _ARCH_PWR4 when -mcpu=[970, power4,
power5,power5+]  is specified. This works with the --with-cpu= configure
option  allowing builds targeted for 64-bit hardware to include new
instructions available on power4 and newer architecture levels.

-- 
           Summary: lock optimisations for 32bit powerpc
           Product: glibc
           Version: 2.4
            Status: NEW
          Severity: normal
          Priority: P2
         Component: nptl
        AssignedTo: drepper at redhat dot com
        ReportedBy: sjmunroe at us dot ibm dot com
                CC: glibc-bugs at sources dot redhat dot com
 GCC build triplet: powerpc--linux
  GCC host triplet: powerpc--linux
GCC target triplet: powerpc--linux


http://sourceware.org/bugzilla/show_bug.cgi?id=2505

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