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On 08/16/2016 05:11 PM, Sterling Augustine wrote:
On Tue, Aug 16, 2016 at 5:01 PM, Ben Greear <greearb@candelatech.com> wrote:Hello! I'm working on a closed source (not my decision) project that uses an xtensa cpu. I have no jtag access to this board, but I can pass messages, including grabbing 'logs' and stack traces on crash, and so forth.Can the Cadence people not help you? If you have a copy of the ISA book or the programmer's book, then I believe they have explanations on how to set the registers as well. Failing all that, then your best bet it to look at the gdb sources and see how it is done.
Cadence probably could, but I don't think I rate high enough for them to care. I have the ISA book, and you can find it online, and I think I am close, but I must be missing something. I suspect it is the exception vector...trying to figure out how to set that now. Thanks, Ben -- Ben Greear <greearb@candelatech.com> Candela Technologies Inc http://www.candelatech.com
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