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On Wednesday 22 August 2012 19:41:42 DJ Delorie wrote: > I've read through the comments and README. Mostly what's missing is > some guide to help tell people where to begin, what parts to worry > about, and WHY you'd use any given piece. yes, some of the fundamental pieces explaining how it all comes together is missing > Example: how do I set up the chip's RAM/ROM regions? you use sim_core_attach to attach memory regions. the mapmask allows you to set different permissions on it. be aware that the sim currently has an issue when used in conjunction with gdb -- the read/write bits not only lock out the simulated code from accessing the region, but gdb too :(. so you can't setup something like executable-only memory by specifying access_exec as then when you try to use `x` or `dis` from gdb, you'd get back an error -- the memory may not be read. similarly, if you were to try to use `load` to load an executable with custom contents into that region you'd again get denied -- gdb is not allowed to write to it. i mentioned this a while ago seeking ideas, but didn't get any response. > Do I want them to be user-configurable? yes. the idea of the sim is two fold: provide simulation of the ISA with no SoC related details (peripherals/memory regions/etc...), and then t optionally provide support for common SoCs. > If so, what's the best way to manage them? check out sim-model.c. this lets you specify --model on the command line to select different SoCs. this sets up CPU_MODEL (cpu) which you can then parse in the early init phases of the sim (sim_open) to attach an appropriate set of memory regions based on the model. you can also use SIM_AC_OPTION_DEFAULT_MODEL() in your configure.ac to select the default model for the sim if you want one. if you have different ISAs to select between, you probably want to use -- architecture for that. HTH -mike
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