MIPS does. There is however an important difference in that MIPS will
actually generate a trap on the branch instruction and set a flag in a
register to indicate that the trap actually occured in the delay slot.
My solution would be to emulate what MIPS does. So in the exception
handler for the illegal slot exception, check whether you've hit a
breakpoint. If so report SIGTRAP back to GDB and make sure that if
you get a continue from GDB, you back up the instruction pointer to
the branch instruction preceding the delay slot. This will require
you to implement sh_single_step_through_delay().