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[binutils-gdb] MIPS16/opcodes: Correct 64-bit macros' ISA membership
- From: sergiodj+buildbot at sergiodj dot net
- To: gdb-testers at sourceware dot org
- Date: Tue, 20 Dec 2016 08:19:17 -0500
- Subject: [binutils-gdb] MIPS16/opcodes: Correct 64-bit macros' ISA membership
- Authentication-results: sourceware.org; auth=none
*** TEST RESULTS FOR COMMIT 4ebce1a0a5911e71aa2d00932ffb2126ff1f3633 ***
Author: Maciej W. Rozycki <macro@imgtec.com>
Branch: master
Commit: 4ebce1a0a5911e71aa2d00932ffb2126ff1f3633
MIPS16/opcodes: Correct 64-bit macros' ISA membership
Limit the DDIV, DDIVU, DREM, DREMU and DSUBU macros to the MIPS III
rather than MIPS I ISA. These macros expand to machine code sequences
including 64-bit instructions which require a 64-bit ISA. Entries for
those instructions are already correctly marked, however the marking is
ignored if entries are used in the process of macro expansion rather
than directly, making it possible to indirectly produce 64-bit machine
code even when output requested has been limited to a 32-bit ISA.
opcodes/
* mips16-opc.c (mips16_opcodes): Set membership to I3 rather
than I1 for the "ddiv", "ddivu", "drem", "dremu" and "dsubu"
INSN_MACRO entries.
gas/
* testsuite/gas/mips/mips16-macro.l: New list test.
* testsuite/gas/mips/mips.exp: Run the new test.