In the manual, however, in table "Table A5-20 Load byte, memory
hints", some encodings with
Rt == 0b1111 decode to "UNPREDICTABLE". Should the record fail for
those? I think currently
with your patch we will accept them. I am thinking it would be good
to fail, because since
we can't know the side effects of such instruction, we risk showing
some false information if
we just assume nothing has changed.
I'm not sure what document this is from, but in https://static.docs.arm
.com/ddi0406/c/DDI0406C_C_arm_architecture_reference_manual.pdf
Table A6-20 is titled as above.
Rather than this, I used the thumb2 supplement I found here: http://her
mes.wings.cs.wisc.edu/files/Thumb-2SupplementReferenceManual.pdf
Section 3.3.3 had the most useful table and exhaustive list of possible
encodings for this type of thumb2 instruction.
I see now that not every possible addressing mode is supported for
PLD/PLI, and there are ways to encode a reserved addressing mode for
all instructions of this type.
I've prepared a follow on patch that should provide an exhaustive check
for PLD and PLI instructions. It also enhances the check for other
instructions of this general format, but I've not verified that the
code is exhaustive there. It is at least better than it was.
If you are motivated, it would be nice to add a test for this
instruction in arm_record_test,
but I won't require it, since the current state is that this test
isn't meant to test all
possible instruction, and I don't want to impose that burden on you.
I might that be THAT motivated, since I've never even used that test
feature.