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Re: [PATCH 17/17] [PowerPC] Add gdbserver support for EBB and PMU registers


Ulrich Weigand <uweigand@de.ibm.com> writes:

> Pedro Franco de Carvalho wrote:
>
>> +ppc_store_ebbregset (struct regcache *regcache, const void *buf)
>> +{
>> +  int base;
>> +  char *regset = (char *) buf;
>> +
>> +  base = find_regno (regcache->tdesc, "bescr");
>> +
>> +  /* The order in the kernel regset is: EBBRR, EBBHR, BESCR, in our
>> +     .dat file it is BESCR, EBBHR, EBBRR.  */
>> +  supply_register (regcache, base, &regset[16]);
>> +  supply_register (regcache, base + 1, &regset[8]);
>> +  supply_register (regcache, base + 2, &regset[0]);
>
> Why do this?  Can't we recorder the XML file to make the order
> the same, and simplify this routine?
>
>> +  /* The order in the kernel regset is SIAR, SDAR, SIER, MMCR2, MMCR0.
>> +     In the .dat file is MMCR0, MMCR2, SIAR, SDAR, SIER.  */
>> +  supply_register (regcache, base, &regset[32]);
>> +  supply_register (regcache, base + 1, &regset[24]);
>> +  supply_register (regcache, base + 2, &regset[0]);
>> +  supply_register (regcache, base + 3, &regset[8]);
>> +  supply_register (regcache, base + 4, &regset[16]);
>
> Same here?

I wanted to keep the registers in the tdescs in the order they were
defined in the isa, since the tdescs are used in common powerpc code (in
rs6000_gdbarch_init), and so are the fixed register numbers (in
ppc-tdep.h), and the order they appear in the ptrace buffer is specific
to Linux. But if this isn't a big deal I can change that to simplify
this code.

Thanks!

--
Pedro Franco de Carvalho


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