This is the mail archive of the
gdb-patches@sourceware.org
mailing list for the GDB project.
[PATCH 17/17] [PowerPC] Add gdbserver support for EBB and PMU registers
- From: Pedro Franco de Carvalho <pedromfc at linux dot ibm dot com>
- To: gdb-patches at sourceware dot org
- Cc: uweigand at de dot ibm dot com, edjunior at gmail dot com
- Date: Fri, 13 Jul 2018 10:52:26 -0300
- Subject: [PATCH 17/17] [PowerPC] Add gdbserver support for EBB and PMU registers
- References: <20180713135226.2321-1-pedromfc@linux.ibm.com>
This patch extends support for EBB and PMU registers to the powerpc
linux gdbserver stub.
gdb/gdbserver/ChangeLog:
YYYY-MM-DD Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* linux-ppc-low.c (ppc_store_ebbregset, ppc_store_pmuregset): New
functions.
(ppc_regsets): Add entries for ebb and pmu regsets.
(ppc_arch_setup): Set isa207 in features struct if the ebb and pmu
regsets are available. Set sizes for these regsets.
---
gdb/gdbserver/linux-ppc-low.c | 50 ++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 49 insertions(+), 1 deletion(-)
diff --git a/gdb/gdbserver/linux-ppc-low.c b/gdb/gdbserver/linux-ppc-low.c
index 2c830d638a..9d1845088b 100644
--- a/gdb/gdbserver/linux-ppc-low.c
+++ b/gdb/gdbserver/linux-ppc-low.c
@@ -526,6 +526,38 @@ ppc_store_tarregset (struct regcache *regcache, const void *buf)
}
static void
+ppc_store_ebbregset (struct regcache *regcache, const void *buf)
+{
+ int base;
+ char *regset = (char *) buf;
+
+ base = find_regno (regcache->tdesc, "bescr");
+
+ /* The order in the kernel regset is: EBBRR, EBBHR, BESCR, in our
+ .dat file it is BESCR, EBBHR, EBBRR. */
+ supply_register (regcache, base, ®set[16]);
+ supply_register (regcache, base + 1, ®set[8]);
+ supply_register (regcache, base + 2, ®set[0]);
+}
+
+static void
+ppc_store_pmuregset (struct regcache *regcache, const void *buf)
+{
+ int base;
+ char *regset = (char *) buf;
+
+ base = find_regno (regcache->tdesc, "mmcr0");
+
+ /* The order in the kernel regset is SIAR, SDAR, SIER, MMCR2, MMCR0.
+ In the .dat file is MMCR0, MMCR2, SIAR, SDAR, SIER. */
+ supply_register (regcache, base, ®set[32]);
+ supply_register (regcache, base + 1, ®set[24]);
+ supply_register (regcache, base + 2, ®set[0]);
+ supply_register (regcache, base + 3, ®set[8]);
+ supply_register (regcache, base + 4, ®set[16]);
+}
+
+static void
ppc_fill_tm_sprregset (struct regcache *regcache, void *buf)
{
int i, base;
@@ -775,6 +807,10 @@ static struct regset_info ppc_regsets[] = {
NULL, ppc_store_tm_cgprregset },
{ PTRACE_GETREGSET, PTRACE_SETREGSET, NT_PPC_TM_SPR, 0, EXTENDED_REGS,
ppc_fill_tm_sprregset, ppc_store_tm_sprregset },
+ { PTRACE_GETREGSET, PTRACE_SETREGSET, NT_PPC_EBB, 0, EXTENDED_REGS,
+ NULL, ppc_store_ebbregset },
+ { PTRACE_GETREGSET, PTRACE_SETREGSET, NT_PPC_PMU, 0, EXTENDED_REGS,
+ NULL, ppc_store_pmuregset },
{ PTRACE_GETREGSET, PTRACE_SETREGSET, NT_PPC_TAR, 0, EXTENDED_REGS,
ppc_fill_tarregset, ppc_store_tarregset },
{ PTRACE_GETREGSET, PTRACE_SETREGSET, NT_PPC_PPR, 0, EXTENDED_REGS,
@@ -856,7 +892,11 @@ ppc_arch_setup (void)
if ((ppc_hwcap2 & PPC_FEATURE2_ARCH_2_07)
&& (ppc_hwcap2 & PPC_FEATURE2_TAR)
&& ppc_check_regset (tid, NT_PPC_TAR,
- PPC_LINUX_SIZEOF_TARREGSET))
+ PPC_LINUX_SIZEOF_TARREGSET)
+ && ppc_check_regset (tid, NT_PPC_EBB,
+ PPC_LINUX_SIZEOF_EBBREGSET)
+ && ppc_check_regset (tid, NT_PPC_PMU,
+ PPC_LINUX_SIZEOF_PMUREGSET))
{
features.isa207 = true;
if ((ppc_hwcap2 & PPC_FEATURE2_HTM)
@@ -925,6 +965,14 @@ ppc_arch_setup (void)
regset->size = (features.isa207 ?
PPC_LINUX_SIZEOF_TARREGSET : 0);
break;
+ case NT_PPC_EBB:
+ regset->size = (features.isa207 ?
+ PPC_LINUX_SIZEOF_EBBREGSET : 0);
+ break;
+ case NT_PPC_PMU:
+ regset->size = (features.isa207 ?
+ PPC_LINUX_SIZEOF_PMUREGSET : 0);
+ break;
case NT_PPC_TM_SPR:
regset->size = (features.htm ?
PPC_LINUX_SIZEOF_TM_SPRREGSET : 0);
--
2.13.6