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Re: [PATCH 8/8] AARCH64 SVE: Enable AARCH64 SVE in gdbserver
- From: Yao Qi <qiyaoltc at gmail dot com>
- To: Alan Hayward <alan dot hayward at arm dot com>
- Cc: gdb-patches at sourceware dot org
- Date: Wed, 14 Dec 2016 16:51:24 +0000
- Subject: Re: [PATCH 8/8] AARCH64 SVE: Enable AARCH64 SVE in gdbserver
- Authentication-results: sourceware.org; auth=none
- References: <D46B0E8C.15503%alan.hayward@arm.com>
On 16-12-05 12:31:08, Alan Hayward wrote:
>
> VG is included in the SVE register set and is marked as an expediated
> register
> (added in a previous patch).
>
> In the gdb remote side, on receipt on a stop-reply the VG value in the stop
> reply is compared against the currently known VG value. If there is a
> difference, then the current target description and register cache is
> cleared
> and a new target description is found (using the new VG value).
This only works when target descriptions change among different VG
values (VG != 0). If the program starts with VG = 0, the target
description is still the normal aarch64 one, which doesn't
understand register number of VG.
(gdb) c
Continuing.
Remote sent bad register number 0x55: 55:0000000000000000;thread:p2ad9.2ad9;core:5;
Packet: 'T0b1d:0000000000000000;1f:0000000000000000;20:0000000000000000;55:0000000000000000;thread:p2ad9.2ad9;core:5;'
I applied your patches, hack aarch64_read_vg a little bit, let it
return some random even number, like 0, 2, 4, 8.
Looks adding a new expedite register doesn't help detecting architecture
change. We may need to add a new stop reason "tdesc:id", "id" is an
integer, the id of a known target description.
> int aarch64_validate_tdesc (struct thread_info *thread)
> {
> - return 1;
> + int tid = ptid_get_lwp (thread_to_gdb_id (thread));
> + long vg = aarch64_read_vg (tid);
> + struct regcache *regcache = inferior_regcache_data (thread);
> + struct process_info *proc;
> +
> + /* Non SVE targets always validate as true. */
> + if (vg == 0)
> + return 1;
This function doesn't handle the case VG = 2 changed to VG = 0. What
we need to do is to compare tdesc, like this,
return (proc->tdesc == aarch64_get_tdesc(vg));
which is simpler.
> +
> + if (regcache)
> + return (register_size (regcache->tdesc, AARCH64_SVE_Z0_REGNO)
> + == sve_vl_from_vg (vg));
> +
> + proc = get_thread_process (thread);
> + return (register_size (proc->tdesc, AARCH64_SVE_Z0_REGNO)
> + == sve_vl_from_vg (vg));
> }
>
--
Yao (齐尧)