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Re: [RFA/commit] arm-tdep.c: Do not single-step after hitting a watchpoint.
- From: Will Deacon <will dot deacon at arm dot com>
- To: Pedro Alves <palves at redhat dot com>
- Cc: Joel Brobecker <brobecker at adacore dot com>, Marcus Shawcroft <marcus dot shawcroft at gmail dot com>, Terry Guo <Terry dot Guo at arm dot com>, Marcus Shawcroft <Marcus dot Shawcroft at arm dot com>, "lgustavo at codesourcery dot com" <lgustavo at codesourcery dot com>, Yao Qi <yao at codesourcery dot com>, "gdb-patches at sourceware dot org" <gdb-patches at sourceware dot org>, Peter Maydell <Peter dot Maydell at arm dot com>, "gareth at blacksphere dot co dot nz >> Gareth McMullin" <gareth at blacksphere dot co dot nz>
- Date: Tue, 30 Sep 2014 09:53:59 +0100
- Subject: Re: [RFA/commit] arm-tdep.c: Do not single-step after hitting a watchpoint.
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On Mon, Sep 29, 2014 at 10:04:11PM +0100, Pedro Alves wrote:
> On 09/29/2014 06:51 PM, Joel Brobecker wrote:
> > Hello all,
> >
> >> Hmm. So when the data abort triggers at fault+8, the instruction
> >> that triggered the abort hasn't actually completed, right? No memory
> >> has changed yet.
> >>
> >> So if nothing does the adjustment, like Gareth found out happens with
> >> the Black Magic Probe, then we'll resume execution from the
> >> wrong address/instruction (with the effects of the skipped instructions
> >> missing, including the memory write...). Did I understand that
> >> right? (Gareth, is that what you see?)
> >
> > I have been trying to understand the various contributions, and
> > I admit I am still not quite sure...
> >
> > Does it look like the patch I proposed is correct? It seems to be
> > supported by Terry Guo's experiments as well...
>
> Nope, Terry's experiments supported the current code.
>
> The experiments (which were on Linux) showed that the watchpoint was
> reported to GDB first with the PC pointing at the instruction that
> accessed memory, and then GDB single-stepped once, and the PC ends up
> pointing at one instruction after the instruction that changed memory.
FWIW, that also matches the intention of the kernel-side code. The same
logic applies to arm64, despite the availability of hardware single-step
there (the PTRACE_SINGLESTEP request can be used to access that feature).
Furthermore, this also matches the ARMv7/8 debug architectures; a
watchpoint data abort will be taken before the faulting instruction has
executed.
Will