[PATCH] aarch64/gdbserver: fix floating point registers display

[Catalin Udma <catalin dot udma at freescale dot com>]

When using aarch64 gdb with gdbserver, floating point registers are
not correctly displayed, as below:
  (gdb) info registers fpsr fpcr
  fpsr           <unavailable>
  fpcr           <unavailable>
Also, the offset for floating point v0-v31 registers in gdbserver
is wrong because it is computed based on 32-bit size of CPSR register
as defined in the  regformat/aarch64.dat file

To fix these problems, the missing fpsr and fpcr registers are added
when floating point registers are read/write and the aarch64.dat file
is updated to use the correct CPSR size of 64-bits accordingly to the
definition in aarch64-core.xml

gdb/
2014-08-12  Catalin Udma  <catalin.udma@freescale.com>

        * regformats/aarch64.dat (cpsr): Change to be 64bit.

gdb/gdbserver/
2014-08-12  Catalin Udma  <catalin.udma@freescale.com>

        * linux-aarch64-low.c (AARCH64_FPSR_REGNO): New define.
        (AARCH64_FPCR_REGNO): Likewise.
        (AARCH64_NUM_REGS): Update to include fpsr/fpcr registers.
        (aarch64_fill_fpregset): Add missing fpsp/fpcr registers.
        (aarch64_store_fpregset): Likewise.
---
 gdb/gdbserver/linux-aarch64-low.c |    8 +++++++-
 gdb/regformats/aarch64.dat        |    2 +-
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/gdb/gdbserver/linux-aarch64-low.c b/gdb/gdbserver/linux-aarch64-low.c
index 6066e15..3453b2e 100644
--- a/gdb/gdbserver/linux-aarch64-low.c
+++ b/gdb/gdbserver/linux-aarch64-low.c
@@ -46,8 +46,10 @@ extern const struct target_desc *tdesc_aarch64;
 #define AARCH64_PC_REGNO   32
 #define AARCH64_CPSR_REGNO 33
 #define AARCH64_V0_REGNO   34
+#define AARCH64_FPSR_REGNO (AARCH64_V0_REGNO + AARCH64_V_REGS_NUM)
+#define AARCH64_FPCR_REGNO (AARCH64_V0_REGNO + AARCH64_V_REGS_NUM + 1)
 
-#define AARCH64_NUM_REGS (AARCH64_V0_REGNO + AARCH64_V_REGS_NUM)
+#define AARCH64_NUM_REGS (AARCH64_V0_REGNO + AARCH64_V_REGS_NUM + 2)
 
 static int
 aarch64_regmap [] =
@@ -255,6 +257,8 @@ aarch64_fill_fpregset (struct regcache *regcache, void *buf)
 
   for (i = 0; i < AARCH64_V_REGS_NUM; i++)
     collect_register (regcache, AARCH64_V0_REGNO + i, &regset->vregs[i]);
+  collect_register (regcache, AARCH64_FPSR_REGNO, &regset->fpsr);
+  collect_register (regcache, AARCH64_FPCR_REGNO, &regset->fpcr);
 }
 
 static void
@@ -265,6 +269,8 @@ aarch64_store_fpregset (struct regcache *regcache, const void *buf)
 
   for (i = 0; i < AARCH64_V_REGS_NUM; i++)
     supply_register (regcache, AARCH64_V0_REGNO + i, &regset->vregs[i]);
+  supply_register (regcache, AARCH64_FPSR_REGNO, &regset->fpsr);
+  supply_register (regcache, AARCH64_FPCR_REGNO, &regset->fpcr);
 }
 
 /* Debugging of hardware breakpoint/watchpoint support.  */
diff --git a/gdb/regformats/aarch64.dat b/gdb/regformats/aarch64.dat
index afe1028..0d32183 100644
--- a/gdb/regformats/aarch64.dat
+++ b/gdb/regformats/aarch64.dat
@@ -35,7 +35,7 @@ expedite:x29,sp,pc
 64:x30
 64:sp
 64:pc
-32:cpsr
+64:cpsr
 128:v0
 128:v1
 128:v2
-- 
1.7.8