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[PATCH 5/5] testsuite for nds32 simulator

From: Wei-cheng Wang <cole945 at gmail dot com>
To: gdb-patches at sourceware dot org
Date: Mon, 8 Jul 2013 17:33:08 +0800
Subject: [PATCH 5/5] testsuite for nds32 simulator
2013-07-08  Wei-Cheng Wang  <cole945@gmail.com>

	* 000-sanity.s: New file.
	* 010-lmwzb.s: New file.
	* 010-smwzb.s: New file.
	* 010-unaligned.s: New file.
	* 020-beqc.s: New file.
	* 020-ffbi.s: New file.
	* 020-ffb.s: New file.
	* 020-ffmism.s: New file.
	* 020-ffzmism.s: New file.
	* 020-flmism.s: New file.
	* 020-signext-load.s: New file.
	* 020-signext.s: New file.
	* 030-setend.s: New file.
	* 040-ifcall.s: New file.
	* 040-ifret.s: New file.
	* 041-ifcall-chaining.s: New file.
	* 041-ifcall-jal.s: New file.
	* 041-ifcall-j.s: New file.
	* 050-ex5.it.s: New file.
	* 050-ex9.it.s: New file.
	* 100-bse.s: New file.
	* 100-bsp.s: New file.
	* allinsn.exp: New file.
	* smwzb.s: New file.
	* utils.inc: New file.

---

diff --git a/sim/testsuite/configure b/sim/testsuite/configure
index 6a582ab..7c07aab 100755
--- a/sim/testsuite/configure
+++ b/sim/testsuite/configure
@@ -1893,6 +1893,10 @@ case "${target}" in
        sim_arch=moxie
        sim_testsuite=yes
        ;;
+   nds32*)
+       sim_arch=nds32
+       sim_testsuite=yes
+       ;;
    rl78-*-*)
        sim_arch=rl78
        ;;
diff --git a/sim/testsuite/sim/nds32/000-sanity.s
b/sim/testsuite/sim/nds32/000-sanity.s
new file mode 100644
index 0000000..2ea5663
--- /dev/null
+++ b/sim/testsuite/sim/nds32/000-sanity.s
@@ -0,0 +1,22 @@
+# nds32 test sanity, expected to pass.
+# mach:		all
+# as:		-mbaseline=V3
+# ld:		--defsym=_stack=0x3000000
+# output:	pass\n
+
+	.include "utils.inc"
+
+	.text
+	.global main
+main:
+	smw.adm $sp, [$sp], $sp, 10
+
+	la	$r0, .Lstring
+	bal	puts
+	movi	$r0, 0
+
+	lmw.bim $sp, [$sp], $sp, 10
+	ret
+
+.Lstring:
+	.string "pass\n"
diff --git a/sim/testsuite/sim/nds32/010-lmwzb.s
b/sim/testsuite/sim/nds32/010-lmwzb.s
new file mode 100644
index 0000000..afe3d60
--- /dev/null
+++ b/sim/testsuite/sim/nds32/010-lmwzb.s
@@ -0,0 +1,68 @@
+# nds32 test LMWZB, expected to pass.
+# mach:		all
+# as:		-mbaseline=V3
+# ld:		--defsym=_stack=0x3000000
+# output:	pass\n
+
+	.include "utils.inc"
+
+.data
+	.align 2
+BASE:
+	.word	0x11222211 ! $r6
+	.word	0x55666655 ! $r7
+	.word	0x77000077 ! $r8
+	.word	0xaabbbbaa ! $r9
+	.word	0xaabbbbaa ! $fp
+
+.text
+	.global	main
+main:
+	la	$r10, BASE	! load base
+	addi	$r11, $r10, #20	! 5 words
+	li	$fp, 0
+	li	$r9, 0
+
+	! expect:
+	!	$r6 = 0x11222211
+	!	$r7 = 0x55666655
+	!	$r8 = 0x77000077
+	!	$r9 = 0 (untouched)
+	!	$fp = 0 (untouched)
+	!	$r10 = BASE + 20
+	lmwzb.bm	$r6,[$r10],$r9,0x8
+
+	beq	$r11, $r10, 1f
+	PUTS	.Lfstr0
+
+1:	l.w	$r0, BASE
+	beq	$r6, $r0, 1f
+	PUTS	.Lfstr1
+
+1:	l.w	$r0, BASE + 4
+	beq	$r7, $r0, 1f
+	PUTS	.Lfstr2
+
+1:	l.w	$r0, BASE + 8
+	beq	$r8, $r0, 1f
+	PUTS	.Lfstr3
+
+1:	li	$r0, 0
+	beq	$r9, $r0, 1f
+	PUTS	.Lfstr4
+
+1:	li	$r0, 0
+	beq	$fp, $r0, 1f
+	PUTS	.Lfstr5
+
+1:	PASS
+	EXIT	0
+
+.section	.rodata
+.Lpstr:  .string "pass\n"
+.Lfstr0: .string "fail: adjust $Ra + 20\n"
+.Lfstr1: .string "fail: $r6 == 0x11222211\n"
+.Lfstr2: .string "fail: $r7 == 0x55666655\n"
+.Lfstr3: .string "fail: $r8 == 0x77000077\n"
+.Lfstr4: .string "fail: $r9 == 0 != 0xaabbbbaa\n"
+.Lfstr5: .string "fail: $fp == 0 != 0xaabbbbaa\n"
diff --git a/sim/testsuite/sim/nds32/010-smwzb.s
b/sim/testsuite/sim/nds32/010-smwzb.s
new file mode 100644
index 0000000..2e00109
--- /dev/null
+++ b/sim/testsuite/sim/nds32/010-smwzb.s
@@ -0,0 +1,76 @@
+# nds32 test SMWZB, expected to pass.
+# mach:	 	all
+# as:		-mbaseline=V3
+# ld:		--defsym=_stack=0x3000000
+# output:	pass\n
+
+	.include "utils.inc"
+
+.data
+	.align 2
+BASE:
+	.word	0xffffffff ! $r6
+	.word	0xffffffff ! $r7
+	.word	0xffffffff ! $r8
+	.word	0xffffffff ! $r9
+	.word	0xffffffff ! $fp
+WORD:
+	.byte	0x77,0x00,0xff,0xff
+
+.text
+	.global	main
+main:
+	la	$r10, BASE	! load base
+	addi	$r11, $r10, #20	! 5 words
+	li	$r6, 0x11222211
+	li	$r7, 0x55666655
+	li	$r8, 0x77000077
+	li	$r9, 0xaabbbbaa
+	li	$fp, 0xccddddcc
+
+	! expect:
+	!	$r6: 0x11222211
+	!	$r7: 0x55666655
+	!	$r8: 0x77000077
+	!	$r9: 0 (untouched)
+	!	$fp: 0 (untouched)
+	!	$r10 = BASE + 20
+	smwzb.bm	$r6,[$r10],$r9,0x8
+
+	beq	$r11, $r10, 1f
+	PUTS	.Lfstr0
+
+1:	l.w	$r0, BASE
+	beq	$r6, $r0, 1f
+	PUTS	.Lfstr1
+
+1:	l.w	$r0, BASE + 4
+	beq	$r7, $r0, 1f
+	PUTS	.Lfstr2
+
+1:	l.w	$r0, BASE + 8
+	l.w	$r8, WORD
+	beq	$r8, $r0, 1f
+	PUTS	.Lfstr3
+
+1:	l.w	$r0, BASE + 12
+	li	$r9, 0xffffffff
+	beq	$r9, $r0, 1f
+	PUTS	.Lfstr4
+
+1:	l.w	$r0, BASE + 16
+	li	$fp, 0xffffffff
+	beq	$fp, $r0, 1f
+	PUTS	.Lfstr5
+
+1:	PASS
+	EXIT	0
+
+.section	.rodata
+.Lpstr:  .string "pass\n"
+.Lfstr0: .string "fail: adjust $Ra + 20\n"
+.Lfstr1: .string "fail: $r6 == 0x11222211\n"
+.Lfstr2: .string "fail: $r7 == 0x55666655\n"
+.Lfstr3: .string "fail: $r8 == 0x77000077\n"
+.Lfstr4: .string "fail: $r9 == 0xffffffff != 0xaabbbbaa\n"
+.Lfstr5: .string "fail: $fp == 0xffffffff != 0xaabbbbaa\n"
diff --git a/sim/testsuite/sim/nds32/010-unaligned.s
b/sim/testsuite/sim/nds32/010-unaligned.s
new file mode 100644
index 0000000..c723da5
--- /dev/null
+++ b/sim/testsuite/sim/nds32/010-unaligned.s
@@ -0,0 +1,76 @@
+# nds32 beqc/bnec, expected to pass.
+# mach:	 	all
+# as:		-mbaseline=V3
+# ld:		--defsym=_stack=0x3000000
+# output:	pass\n*lignment*MWA*\n
+# xerror:
+
+	.include "utils.inc"
+
+	.data
+	.align 2
+WORD:
+	.byte	0x80
+	.byte	0x81
+HALF:
+	.byte	0x82
+	.byte	0x83
+	.byte	0x84
+	.byte	0x85
+	.byte	0x86
+	.byte	0x87
+
+	.text
+	.global main
+main:
+	smw.adm $sp, [$sp], $sp, 10
+
+	! Set to big endian
+	setend.b
+
+	la	$r9, HALF
+	lmw.bi	$r0, [$r9], $r0, 0
+	li	$r1, 0x82838485
+	beq	$r0, $r1, 1f
+	PUTS	.Lfstr0
+
+1:
+	li	$r0, 0x12345678
+	smw.bi	$r0, [$r9], $r0, 0
+
+	! Set to little endian
+	setend.l
+
+	la	$r9, HALF
+	lmw.bi	$r0, [$r9], $r0, 0
+	li	$r1, 0x78563412
+	beq	$r0, $r1, 1f
+	FAIL	2
+	PUTS	.Lfstr1
+1:
+	li	$r0, 0xaabbccdd
+	smw.bi	$r0, [$r9], $r0, 0
+
+	la	$r9, WORD
+	lwi	$r0, [$r9 + 0]
+	li	$r1, 0xccdd8180
+	beq	$r0, $r1, 1f
+	FAIL	3
+	PUTS	.Lfstr2
+1:
+
+	la	$r0, LPASS_STR
+	bal	puts
+
+	la	$r9, HALF
+	lmwa.bi	$r0, [$r9], $r0, 0	! Expected to fail.
+
+	PUTS	.Lfstr3
+	EXIT	1
+
+
+.section	.rodata
+.Lfstr0: .string "fail: Unaligned LMW.bi (big-endian)\n"
+.Lfstr1: .string "fail: Unaligned LMW.bi (little-endian)\n"
+.Lfstr2: .string "fail: Aligned LWI\n"
+.Lfstr3: .string "fail: Unaligned LMWA.bi\n"
diff --git a/sim/testsuite/sim/nds32/020-beqc.s
b/sim/testsuite/sim/nds32/020-beqc.s
new file mode 100644
index 0000000..6163432
--- /dev/null
+++ b/sim/testsuite/sim/nds32/020-beqc.s
@@ -0,0 +1,43 @@
+# nds32 beqc/bnec, expected to pass.
+# mach:	 	all
+# as:		-mbaseline=V3
+# ld:		--defsym=_stack=0x3000000
+# output:	pass\n
+
+	.include "utils.inc"
+
+	.text
+	.global main
+main:
+	smw.adm $sp, [$sp], $sp, 10
+
+	movi    $r7, 13
+.L0:
+	beqc	$r7, 13, .L1
+	PUTS	.Lfstr0	! eq, but not take
+.L1:
+	beqc	$r7, 17, .L2
+	bnec	$r7, 17, .L3
+	PUTS	.Lfstr1	! ne, but not take
+
+.L2:
+	PUTS	.Lfstr2	! ne, but take
+
+.L3:
+	bnec	$r7, 13, .L4
+	PUTS	.Lpstr
+	EXIT	0
+
+.L4:
+	PUTS	.Lfstr3	! eq, but take
+
+	lmw.bim $sp, [$sp], $sp, 10
+	ret
+
+.data
+	.align 2
+.Lpstr:	 .string "pass\n"
+.Lfstr0: .string "fail: eq, but not take\n"
+.Lfstr1: .string "fail: ne, but not take\n"
+.Lfstr2: .string "fail: ne, but take\n"
+.Lfstr3: .string "fail: eq, but take\n"
diff --git a/sim/testsuite/sim/nds32/020-ffb.s
b/sim/testsuite/sim/nds32/020-ffb.s
new file mode 100644
index 0000000..c2d81e2
--- /dev/null
+++ b/sim/testsuite/sim/nds32/020-ffb.s
@@ -0,0 +1,55 @@
+# nds32 test FFB, expected to pass.
+# mach:		all
+# as:		-mbaseline=V3
+# ld:		--defsym=_stack=0x3000000
+# output:	test be\ntest le\npass\n
+
+	.include "utils.inc"
+
+.section	.rodata
+	.align	2
+DATA:
+	.byte	0x12,0x12,0x12,0x99
+
+.text
+	.global	main
+main:
+	movi	$r9, 0
+	! big
+	setend.b
+	PUTS	.Lbe
+
+.Lagain:
+	! $6 = 0x12121299 in be
+	! $6 = 0x99121212 in le
+
+	l.w	$r6, DATA
+
+	move	$r7, #0x00
+	ffb	$r0, $r6, $r7
+	beqz	$r0, 1f
+	PUTS	.Lfstr0
+1:
+	move 	$r7, #0x99
+	ffb	$r0, $r6, $r7
+	beqc	$r0, -1, 1f
+	PUTS	.Lfstr1
+1:
+
+
+	! test it again for little-endian
+	bnez	$r9, 1f
+	movi	$r9, 1
+	PUTS	.Lle
+	setend.l
+	j	.Lagain
+1:
+	PUTS	.Lpstr
+	EXIT	0
+
+.section	.rodata
+.Lbe:	 .string "test be\n"
+.Lle:	 .string "test le\n"
+.Lpstr:  .string "pass\n"
+.Lfstr0: .string "fail: ffb no matching byte is found\n"
+.Lfstr1: .string "fail: ffb should return -1\n"
diff --git a/sim/testsuite/sim/nds32/020-ffbi.s
b/sim/testsuite/sim/nds32/020-ffbi.s
new file mode 100644
index 0000000..b32c4b1
--- /dev/null
+++ b/sim/testsuite/sim/nds32/020-ffbi.s
@@ -0,0 +1,53 @@
+# nds32 test FFBI, expected to pass.
+# mach:		all
+# as:		-mbaseline=V3
+# ld:		--defsym=_stack=0x3000000
+# output:	test be\ntest le\npass\n
+
+	.include "utils.inc"
+
+.section	.rodata
+	.align	2
+DATA:
+	.byte	0x12,0x12,0x12,0x99
+
+.text
+	.global	main
+main:
+	movi	$r9, 0
+	! big
+	setend.b
+	PUTS	.Lbe
+
+.Lagain:
+	! $6 = 0x12121299 in be
+	! $6 = 0x99121212 in le
+
+	l.w	$r6, DATA
+
+	ffbi	$r0, $r6, #0x00
+	beqz	$r0, 1f
+	PUTS	.Lfstr0
+1:
+	ffbi	$r0, $r6, #0x99
+	beqc	$r0, -1, 1f
+	PUTS	.Lfstr1
+1:
+
+
+	! test it again for little-endian
+	bnez	$r9, 1f
+	movi	$r9, 1
+	PUTS	.Lle
+	setend.l
+	j	.Lagain
+1:
+	PUTS	.Lpstr
+	EXIT	0
+
+.section	.rodata
+.Lbe:	 .string "test be\n"
+.Lle:	 .string "test le\n"
+.Lpstr:  .string "pass\n"
+.Lfstr0: .string "fail: ffbi no matching byte is found\n"
+.Lfstr1: .string "fail: ffbi should return -1\n"
diff --git a/sim/testsuite/sim/nds32/020-ffmism.s
b/sim/testsuite/sim/nds32/020-ffmism.s
new file mode 100644
index 0000000..18216e3
--- /dev/null
+++ b/sim/testsuite/sim/nds32/020-ffmism.s
@@ -0,0 +1,111 @@
+# nds32 test FFMISM, expected to pass.
+# mach:	 all
+# as:
+# ld:		--defsym=_stack=0x3000000
+# output:	test be\ntest le\npass\n
+
+	.include "utils.inc"
+
+.section	.rodata
+	.align	2
+DATA:
+	.byte	0x11,0x22,0x33,0x44
+	.byte	0x11,0x22,0x33,0x00
+	.byte	0x11,0x22,0x00,0x00
+	.byte	0x11,0x00,0x00,0x00
+	.byte	0x00,0x00,0x00,0x00
+
+.text
+	.global	main
+main:
+	movi	$r9, 0
+	! big
+	setend.b
+	PUTS	.Lbe
+
+.Lagain:
+	! match against 0x11223344
+	l.w	$r6, DATA
+
+	move	$r7, $r6
+	ffmism	$r0, $r6, $r7
+	beqz	$r0, 1f
+	PUTS	.Lfstr0
+1:
+	l.w	$r7, DATA + 4
+	ffmism	$r0, $r6, $r7
+	beqc	$r0, -1, 1f
+	PUTS	.Lfstr1
+1:
+	l.w	$r7, DATA + 8
+	ffmism	$r0, $r6, $r7
+	beqc	$r0, -2, 1f
+	PUTS	.Lfstr2
+1:
+	l.w	$r7, DATA + 12
+	ffmism	$r0, $r6, $r7
+	beqc	$r0, -3, 1f
+	PUTS	.Lfstr3
+1:
+	l.w	$r7, DATA + 16
+	ffmism  $r0, $r6, $r7
+	beqc	$r0, -4, 1f
+	PUTS	.Lfstr4
+1:
+
+
+	! match against 0x11220000
+	l.w	$r6, DATA + 8
+
+	l.w	$r7, DATA
+	ffmism	$r0, $r6, $r7
+	beqc	$r0, -2, 1f
+	PUTS	.Lfstr5
+1:
+	l.w	$r7, DATA + 4
+	ffmism $r0, $r6, $r7
+	beqc	$r0, -2, 1f
+	PUTS	.Lfstr6
+1:
+	l.w	$r7, DATA + 8
+	ffmism $r0, $r6, $r7
+	beqc	$r0, 0, 1f
+	PUTS	.Lfstr7
+1:
+	l.w	$r7, DATA + 12
+	ffmism $r0, $r6, $r7
+	beqc	$r0, -3, 1f
+	PUTS	.Lfstr8
+1:
+	l.w	$r7, DATA + 16
+	ffmism $r0, $r6, $r7
+	beqc	$r0, -4, 1f
+	PUTS	.Lfstr9
+1:
+
+
+	!! test it again for little-endian
+	bnez	$r9, 1f
+	movi	$r9, 1
+	PUTS	.Lle
+	setend.l
+	j	.Lagain
+1:
+	PUTS	.Lpstr
+	EXIT	0
+
+.section	.rodata
+.Lbe:    .string "test be\n"
+.Lle:    .string "test le\n"
+.Lpstr:  .string "pass\n"
+.Lfstr0: .string "fail: ffmism 11,22,33,44 11,22,33,44\n"
+.Lfstr1: .string "fail: ffmism 11,22,33,44 11,22,33,00\n"
+.Lfstr2: .string "fail: ffmism 11,22,33,44 11,22,00,00\n"
+.Lfstr3: .string "fail: ffmism 11,22,33,44 11,00,00,00\n"
+.Lfstr4: .string "fail: ffmism 11,22,33,44 00,00,00,00\n"
+
+.Lfstr5: .string "fail: ffmism 11,22,00,00 11,22,33,44\n"
+.Lfstr6: .string "fail: ffmism 11,22,00,00 11,22,33,00\n"
+.Lfstr7: .string "fail: ffmism 11,22,00,00 11,22,00,00\n"
+.Lfstr8: .string "fail: ffmism 11,22,00,00 11,00,00,00\n"
+.Lfstr9: .string "fail: ffmism 11,22,00,00 00,00,00,00\n"
diff --git a/sim/testsuite/sim/nds32/020-ffzmism.s
b/sim/testsuite/sim/nds32/020-ffzmism.s
new file mode 100644
index 0000000..b2c249e
--- /dev/null
+++ b/sim/testsuite/sim/nds32/020-ffzmism.s
@@ -0,0 +1,111 @@
+# nds32 test FFZMISM, expected to pass.
+# mach:	 all
+# as:
+# ld:		--defsym=_stack=0x3000000
+# output:	test be\ntest le\npass\n
+
+	.include "utils.inc"
+
+.section	.rodata
+	.align	2
+DATA:
+	.byte	0x11,0x22,0x33,0x44
+	.byte	0x11,0x22,0x33,0x00
+	.byte	0x11,0x22,0x00,0x00
+	.byte	0x11,0x00,0x00,0x00
+	.byte	0x00,0x00,0x00,0x00
+
+.text
+	.global	main
+main:
+	movi	$r9, 0
+	! big
+	setend.b
+	PUTS	.Lbe
+
+.Lagain:
+	! match against 0x11223344
+	l.w	$r6, DATA
+
+	move	$r7, $r6
+	ffzmism	$r0, $r6, $r7
+	beqz	$r0, 1f
+	PUTS	.Lfstr0
+1:
+	l.w	$r7, DATA + 4
+	ffzmism $r0, $r6, $r7
+	beqc	$r0, -1, 1f
+	PUTS	.Lfstr1
+1:
+	l.w	$r7, DATA + 8
+	ffzmism $r0, $r6, $r7
+	beqc	$r0, -2, 1f
+	PUTS	.Lfstr2
+1:
+	l.w	$r7, DATA + 12
+	ffzmism $r0, $r6, $r7
+	beqc	$r0, -3, 1f
+	PUTS	.Lfstr3
+1:
+	l.w	$r7, DATA + 16
+	ffzmism $r0, $r6, $r7
+	beqc	$r0, -4, 1f
+	PUTS	.Lfstr4
+1:
+
+
+	! match against 0x11220000
+	l.w	$r6, DATA + 8
+
+	move	$r7, $r6
+	ffzmism	$r0, $r6, $r7
+	beqc	$r0, -2, 1f
+	PUTS	.Lfstr5
+1:
+	l.w	$r7, DATA + 4
+	ffzmism $r0, $r6, $r7
+	beqc	$r0, -2, 1f
+	PUTS	.Lfstr6
+1:
+	l.w	$r7, DATA + 8
+	ffzmism $r0, $r6, $r7
+	beqc	$r0, -2, 1f
+	PUTS	.Lfstr7
+1:
+	l.w	$r7, DATA + 12
+	ffzmism $r0, $r6, $r7
+	beqc	$r0, -3, 1f
+	PUTS	.Lfstr8
+1:
+	l.w	$r7, DATA + 16
+	ffzmism $r0, $r6, $r7
+	beqc	$r0, -4, 1f
+	PUTS	.Lfstr9
+1:
+
+
+	!! test it again for little-endian
+	bnez	$r9, 1f
+	movi	$r9, 1
+	PUTS	.Lle
+	setend.l
+	j	.Lagain
+1:
+	PUTS	.Lpstr
+	EXIT	0
+
+.section	.rodata
+.Lbe:    .string "test be\n"
+.Lle:    .string "test le\n"
+.Lpstr:  .string "pass\n"
+.Lfstr0: .string "fail: ffzmism 11,22,33,44 11,22,33,44\n"
+.Lfstr1: .string "fail: ffzmism 11,22,33,44 11,22,33,00\n"
+.Lfstr2: .string "fail: ffzmism 11,22,33,44 11,22,00,00\n"
+.Lfstr3: .string "fail: ffzmism 11,22,33,44 11,00,00,00\n"
+.Lfstr4: .string "fail: ffzmism 11,22,33,44 00,00,00,00\n"
+
+.Lfstr5: .string "fail: ffzmism 11,22,00,00 11,22,33,44\n"
+.Lfstr6: .string "fail: ffzmism 11,22,00,00 11,22,33,00\n"
+.Lfstr7: .string "fail: ffzmism 11,22,00,00 11,22,00,00\n"
+.Lfstr8: .string "fail: ffzmism 11,22,00,00 11,00,00,00\n"
+.Lfstr9: .string "fail: ffzmism 11,22,00,00 00,00,00,00\n"
diff --git a/sim/testsuite/sim/nds32/020-flmism.s
b/sim/testsuite/sim/nds32/020-flmism.s
new file mode 100644
index 0000000..bb85563
--- /dev/null
+++ b/sim/testsuite/sim/nds32/020-flmism.s
@@ -0,0 +1,111 @@
+# nds32 test FLMISM, expected to pass.
+# mach:	 all
+# as:
+# ld:		--defsym=_stack=0x3000000
+# output:	test be\ntest le\npass\n
+
+	.include "utils.inc"
+
+.section	.rodata
+	.align	2
+DATA:
+	.byte	0x11,0x22,0x33,0x44
+	.byte	0x00,0x22,0x33,0x44
+	.byte	0x00,0x00,0x33,0x44
+	.byte	0x00,0x00,0x00,0x44
+	.byte	0x00,0x00,0x00,0x00
+
+.text
+	.global	main
+main:
+	movi	$r9, 0
+	! big
+	setend.b
+	PUTS	.Lbe
+
+.Lagain:
+	! match against 0x11223344
+	l.w	$r6, DATA
+
+	move	$r7, $r6
+	flmism	$r0, $r6, $r7
+	beqz	$r0, 1f
+	PUTS	.Lfstr0
+1:
+	l.w	$r7, DATA + 4
+	flmism	$r0, $r6, $r7
+	beqc	$r0, -4, 1f
+	PUTS	.Lfstr1
+1:
+	l.w	$r7, DATA + 8
+	flmism	$r0, $r6, $r7
+	beqc	$r0, -3, 1f
+	PUTS	.Lfstr2
+1:
+	l.w	$r7, DATA + 12
+	flmism	$r0, $r6, $r7
+	beqc	$r0, -2, 1f
+	PUTS	.Lfstr3
+1:
+	l.w	$r7, DATA + 16
+	flmism  $r0, $r6, $r7
+	beqc	$r0, -1, 1f
+	PUTS	.Lfstr4
+1:
+
+
+	! match against 0x00003344
+	l.w	$r6, DATA + 8
+
+	l.w	$r7, DATA
+	flmism	$r0, $r6, $r7
+	beqc	$r0, -3, 1f
+	PUTS	.Lfstr5
+1:
+	l.w	$r7, DATA + 4
+	flmism $r0, $r6, $r7
+	beqc	$r0, -3, 1f
+	PUTS	.Lfstr6
+1:
+	l.w	$r7, DATA + 8
+	flmism $r0, $r6, $r7
+	beqc	$r0, 0, 1f
+	PUTS	.Lfstr7
+1:
+	l.w	$r7, DATA + 12
+	flmism $r0, $r6, $r7
+	beqc	$r0, -2, 1f
+	PUTS	.Lfstr8
+1:
+	l.w	$r7, DATA + 16
+	flmism $r0, $r6, $r7
+	beqc	$r0, -1, 1f
+	PUTS	.Lfstr9
+1:
+
+
+	!! test it again for little-endian
+	bnez	$r9, 1f
+	movi	$r9, 1
+	PUTS	.Lle
+	setend.l
+	j	.Lagain
+1:
+	PUTS	.Lpstr
+	EXIT	0
+
+.section	.rodata
+.Lbe:    .string "test be\n"
+.Lle:    .string "test le\n"
+.Lpstr:  .string "pass\n"
+.Lfstr0: .string "fail: flmism 11,22,33,44 11,22,33,44\n"
+.Lfstr1: .string "fail: flmism 11,22,33,44 00,22,33,44\n"
+.Lfstr2: .string "fail: flmism 11,22,33,44 00,00,33,44\n"
+.Lfstr3: .string "fail: flmism 11,22,33,44 00,00,00,44\n"
+.Lfstr4: .string "fail: flmism 11,22,33,44 00,00,00,00\n"
+
+.Lfstr5: .string "fail: flmism 00,00,33,44 11,22,33,44\n"
+.Lfstr6: .string "fail: flmism 00,00,33,44 00,22,33,44\n"
+.Lfstr7: .string "fail: flmism 00,00,33,44 00,00,33,44\n"
+.Lfstr8: .string "fail: flmism 00,00,33,44 00,00,00,44\n"
+.Lfstr9: .string "fail: flmism 00,00,33,44 00,00,00,00\n"
diff --git a/sim/testsuite/sim/nds32/020-signext-load.s
b/sim/testsuite/sim/nds32/020-signext-load.s
new file mode 100644
index 0000000..5cb7788
--- /dev/null
+++ b/sim/testsuite/sim/nds32/020-signext-load.s
@@ -0,0 +1,172 @@
+# nds32 test J/JAL in ex9, expected to pass.
+# mach:	 	all
+# as:		-mbaseline=V3
+# ld:		--defsym=_stack=0x3000000
+# output:	pass\n
+
+	.include "utils.inc"
+
+.data
+	.align 2
+WORD:
+	.byte	0x81
+	.byte	0x82
+HALF:
+	.byte	0x83
+BYTE:
+	.byte	0x84
+
+	.text
+	.global	main
+main:
+
+.Ldone:
+	! $r5 is case counter for sanity check (current 20)
+	movi	$r5, 0
+
+	! Set to big endian
+	mfsr	$r3, $psw
+	ori	$r3, $r3, 32	!psw.be
+	mtsr	$r3, $psw
+
+	movi	$r4, 0
+
+	! HALF
+	la	$r3, HALF
+	move	$r2, 0x8384
+	addi	$r5, $r5, 1
+	lhi	$r1, [$r3 + 0]
+	beq	$r1, $r2, 1f
+	FAIL	1
+1:
+	addi	$r5, $r5, 1
+	lhi333	$r1, [$r3 + 0]
+	beq	$r1, $r2, 1f
+	FAIL	2
+1:
+	addi	$r5, $r5, 1
+	lh	$r1, [$r3 + $r4]
+	beq	$r1, $r2, 1f
+	FAIL	3
+1:
+
+	move	$r2, 0xffff8384
+	addi	$r5, $r5, 1
+	lhsi	$r1, [$r3 + 0]
+	beq	$r1, $r2, 1f
+	FAIL	4
+1:
+	addi	$r5, $r5, 1
+	lhs	$r1, [$r3 + $r4]
+	beq	$r1, $r2, 1f
+	FAIL	5
+1:
+
+
+	! BYTE
+	move	$r2, 0x84
+	la	$r3, BYTE
+	addi	$r5, $r5, 1
+	lbi	$r1, [$r3 + 0]
+	beq	$r1, $r2, 1f
+	FAIL	6
+1:
+	addi	$r5, $r5, 1
+	lbi333	$r1, [$r3 + 0]
+	beq	$r1, $r2, 1f
+	FAIL	7
+1:
+	addi	$r5, $r5, 1
+	lb	$r1, [$r3 + $r4]
+	beq	$r1, $r2, 1f
+	FAIL	8
+1:
+
+	move	$r2, 0xffffff84
+	addi	$r5, $r5, 1
+	lbsi	$r1, [$r3 + 0]
+	beq	$r1, $r2, 1f
+	FAIL	9
+1:
+	addi	$r5, $r5, 1
+	lbs	$r1, [$r3 + $r4]
+	beq	$r1, $r2, 1f
+	FAIL	0xa
+1:
+
+	! Set to little endian
+	mfsr	$r3, $psw
+	li	$r2, ~32
+	and	$r3, $r3, $r2	!psw.be
+	mtsr	$r3, $psw
+
+	! HALF
+	move	$r2, 0x8483
+	la	$r3, HALF
+	addi	$r5, $r5, 1
+	lhi	$r1, [$r3 + 0]
+	beq	$r1, $r2, 1f
+	FAIL	0xb
+1:
+	addi	$r5, $r5, 1
+	lhi333	$r1, [$r3 + 0]
+	beq	$r1, $r2, 1f
+	FAIL	0xc
+1:
+	addi	$r5, $r5, 1
+	lh	$r1, [$r3 + $r4]
+	beq	$r1, $r2, 1f
+	FAIL	0xd
+1:
+
+	move	$r2, 0xffff8483
+	addi	$r5, $r5, 1
+	lhsi	$r1, [$r3 + 0]
+	beq	$r1, $r2, 1f
+	FAIL	0xe
+1:
+	addi	$r5, $r5, 1
+	lhs	$r1, [$r3 + $r4]
+	beq	$r1, $r2, 1f
+	FAIL	0xf
+1:
+
+	! BYTE
+	move	$r2, 0x84
+	la	$r3, BYTE
+	addi	$r5, $r5, 1
+	lbi	$r1, [$r3 + 0]
+	beq	$r1, $r2, 1f
+	FAIL	0x10
+1:
+	addi	$r5, $r5, 1
+	lbi333	$r1, [$r3 + 0]
+	beq	$r1, $r2, 1f
+	FAIL	0x11
+1:
+	addi	$r5, $r5, 1
+	lb	$r1, [$r3 + $r4]
+	beq	$r1, $r2, 1f
+	FAIL	0x12
+1:
+
+	move	$r2, 0xffffff84
+	addi	$r5, $r5, 1
+	lbsi	$r1, [$r3 + 0]
+	beq	$r1, $r2, 1f
+	FAIL	0x13
+1:
+	addi	$r5, $r5, 1
+	lbs	$r1, [$r3 + $r4]
+	beq	$r1, $r2, 1f
+	FAIL	0x14
+1:
+
+
+
+	addi	$r5, $r5, -20
+	beqz	$r5, 1f
+	FAIL	0x15
+1:
+	PASS
+	EXIT	0
diff --git a/sim/testsuite/sim/nds32/020-signext.s
b/sim/testsuite/sim/nds32/020-signext.s
new file mode 100644
index 0000000..325d37b
--- /dev/null
+++ b/sim/testsuite/sim/nds32/020-signext.s
@@ -0,0 +1,73 @@
+# nds32 test J/JAL in ex9, expected to pass.
+# mach:	 	all
+# as:		-mbaseline=V3
+# ld:		--defsym=_stack=0x3000000
+# output:	pass\n
+
+	.include "utils.inc"
+
+	.text
+	.global	main
+main:
+
+.Ldone:
+	# 0000 1111 1100 0011 1010 0101 1XXX XXXX
+	li	$r8, 0x0fc3a580
+	# 0000 1111 1100 0011 0101 1010 01XX XXXX
+	li	$r9, 0x0fc35a70
+
+	#
+	# byte
+	#
+	seb	$r0, $r8
+	li	$r1, 0xffffff80
+	beq	$r0, $r1, 1f
+	FAIL	1
+
+1:
+	zeb	$r0, $r8
+	li	$r1, 0x00000080
+	beq	$r0, $r1, 1f
+	FAIL	2
+
+1:
+	seb	$r0, $r9
+	li	$r1, 0x00000070
+	beq	$r0, $r1, 1f
+	FAIL	3
+
+1:
+	zeb	$r0, $r9
+	li	$r1, 0x00000070
+	beq	$r0, $r1, 1f
+	FAIL	4
+
+	#
+	# half
+	#
+	seh	$r0, $r8
+	li	$r1, 0xffffa580
+	beq	$r0, $r1, 1f
+	FAIL	1
+
+1:
+	zeh	$r0, $r8
+	li	$r1, 0x0000a580
+	beq	$r0, $r1, 1f
+	FAIL	2
+
+1:
+	seh	$r0, $r9
+	li	$r1, 0x00005a70
+	beq	$r0, $r1, 1f
+	FAIL	3
+
+1:
+	zeh	$r0, $r9
+	li	$r1, 0x00005a70
+	beq	$r0, $r1, 1f
+	FAIL	4
+
+1:
+	PASS
+	EXIT	0
diff --git a/sim/testsuite/sim/nds32/030-setend.s
b/sim/testsuite/sim/nds32/030-setend.s
new file mode 100644
index 0000000..78c62e0
--- /dev/null
+++ b/sim/testsuite/sim/nds32/030-setend.s
@@ -0,0 +1,45 @@
+# nds32 setend, expected to pass.
+# mach:	 	all
+# as:		-mbaseline=V3
+# ld:		--defsym=_stack=0x3000000
+# output:	pass\n
+
+	.include "utils.inc"
+
+.data
+	.align 2
+WORD:	.byte	0x11,0x22,0x33,0x44
+
+	.text
+	.global main
+main:
+	smw.adm $r6, [$sp], $r13, 10
+
+	li	$r6, 0x11223344
+	li	$r7, 0x44332211
+
+	setend.b
+	l.w	$r0, WORD
+	beq	$r0, $r6, 1f
+	PUTS	.Lfstr0		! setend.b fail
+	beq	$r0, $r7, 1f
+	PUTS	.Lfstr2		! $r0 is neither little-endian
+1:
+	setend.l
+	l.w	$r0, WORD
+	beq	$r0, $r7, 1f
+	PUTS	.Lfstr1		! setend.b fail
+	beq	$r0, $r6, 1f
+	PUTS	.Lfstr2		! $r0 is neither big-endian
+1:
+	PUTS	.Lpstr
+	movi	$r0, 0
+	lmw.bim $r6, [$sp], $r13, 10
+	ret
+
+.section .rodata
+	.align 2
+.Lpstr:	 .string "pass\n"
+.Lfstr0: .string "fail: setend.b\n"
+.Lfstr1: .string "fail: setend.l\n"
+.Lfstr2: .string "fail: l.w\n"
diff --git a/sim/testsuite/sim/nds32/040-ifcall.s
b/sim/testsuite/sim/nds32/040-ifcall.s
new file mode 100644
index 0000000..b8bcfe1
--- /dev/null
+++ b/sim/testsuite/sim/nds32/040-ifcall.s
@@ -0,0 +1,55 @@
+# nds32 test basic ifcall and PSW.IFCON, expected to pass.
+# mach:	 	all
+# as:		-mbaseline=V3
+# ld:		--defsym=_stack=0x3000000
+# output:	pass\n
+
+	.include "utils.inc"
+
+	.text
+	.global main
+main:
+	smw.adm $r6, [$sp], $r9, 10
+
+	movi    $r8, 32768	! bit-15 for IFCON
+
+	movi    $r7, 0
+
+	ifcall  .Lcommon0
+
+	! Return from ifret. Make sure ifcall is really done.
+	addi    $r7, $r7, -1
+	! check $r7 == 0
+	beqz	$r7, .L2
+	PUTS	.Lfstr2
+.L2:
+	! check IFCON is off
+	mfsr	$r1, $psw
+	and	$r1, $r1, $r8
+	beqz	$r1, .L3
+	PUTS	.Lfstr1
+	EXIT	1
+.L3:
+	PUTS	.Lpstr
+	EXIT	0
+
+.Lcommon0:
+	! check IFCON is set
+	mfsr	$r1, $psw
+	and	$r1, $r1, $r8
+	beqz	$r1, .L1
+	addi	$r7, $r7, 1
+	ifret
+	PUTS	.Lfstr3	! fail to ifret
+	EXIT	1
+.L1:
+	PUTS	.Lfstr0	! FAIL: IFCON not set
+	EXIT	1
+
+.section	.rodata
+	.align 2
+.Lpstr:  .string "pass\n"
+.Lfstr0: .string "fail: IFCON is not set\n"
+.Lfstr1: .string "fail: IFCON is not off\n"
+.Lfstr2: .string "fail: fail to ifcall\n"
+.Lfstr3: .string "fail: fail to ifret\n"
diff --git a/sim/testsuite/sim/nds32/040-ifret.s
b/sim/testsuite/sim/nds32/040-ifret.s
new file mode 100644
index 0000000..9bb03dc
--- /dev/null
+++ b/sim/testsuite/sim/nds32/040-ifret.s
@@ -0,0 +1,36 @@
+# nds32 test sanity, expected to pass.
+# mach:		all
+# as:		-mbaseline=V3
+# ld:		--defsym=_stack=0x3000000
+# output:	pass\n
+
+	.include "utils.inc"
+
+	.text
+	.global main
+main:
+	smw.adm $sp, [$sp], $sp, 10
+
+	movi    $r7, 0
+.L0:
+	! test fall through
+	addi    $r7, $r7, 1
+	ifret
+	addi    $r7, $r7, -1
+
+	beqz	$r7, 1f
+	la	$r0, .Lfstr
+1:
+	la	$r0, .Lpstr
+	bal	puts
+
+	movi	$r0, 0
+	lmw.bim $sp, [$sp], $sp, 10
+	ret
+
+.data
+	.align 2
+.Lpstr:
+	.string "pass\n"
+.Lfstr:
+	.string "fail to tall-through ifret\n"
diff --git a/sim/testsuite/sim/nds32/041-ifcall-chaining.s
b/sim/testsuite/sim/nds32/041-ifcall-chaining.s
new file mode 100644
index 0000000..0262a2f
--- /dev/null
+++ b/sim/testsuite/sim/nds32/041-ifcall-chaining.s
@@ -0,0 +1,58 @@
+# nds32 test chaining ifcall, expected to pass.
+# mach:		all
+# as:		-mbaseline=V3
+# ld:		--defsym=_stack=0x3000000
+# output:	pass\n
+
+	.include "utils.inc"
+
+	.text
+
+!!! USE MACRO HERE, because jal may clear IFCON
+.macro	check_ifcon	str
+	! check IFCON
+	movi    $r0, 32768	! bit-15 for IFCON
+	mfsr	$r1, $psw
+	and	$r1, $r1, $r0
+	beqz	$r1, 1f
+	PUTS	\str		! PSW.IFCON is not cleared
+1:
+	nop
+.endm
+
+	.global	main
+main:
+	smw.adm $r6, [$sp], $r9, 10
+
+	! Check $lp after test.
+	move	$r9, $lp
+
+	ifcall	1f
+	! Should return to here from ifret.
+	beq	$lp, $r9, .LPASS
+	PUTS	.Lfstr_lp
+.LPASS:
+	PUTS	.Lpstr
+	EXIT	0
+
+1:
+	ifcall9	1f
+	PUTS	.Lfstr0
+	EXIT	1
+1:
+	ifcall	1f
+	PUTS	.Lfstr0
+	EXIT	1
+1:
+	ifcall9	1f
+	PUTS	.Lfstr0
+	EXIT	1
+1:
+	ifret
+	PUTS	.Lfstr0
+	EXIT	1
+
+.section	.rodata
+.Lpstr:    .string "pass\n"
+.Lfstr0:   .string "fail: chaining ifcall\n"
+.Lfstr_lp: .string "fail: $lp corrupted\n"
diff --git a/sim/testsuite/sim/nds32/041-ifcall-j.s
b/sim/testsuite/sim/nds32/041-ifcall-j.s
new file mode 100644
index 0000000..9acb237
--- /dev/null
+++ b/sim/testsuite/sim/nds32/041-ifcall-j.s
@@ -0,0 +1,91 @@
+# nds32 test J/J8/JR in ifcall, expected to pass.
+# mach:		all
+# as:		-mbaseline=V3
+# ld:		--defsym=_stack=0x3000000
+# output:	pass\n
+
+	.include "utils.inc"
+
+	.text
+
+!!! USE MACRO HERE, because jal may clear IFCON
+.macro	check_ifcon	str
+	! check IFCON
+	movi    $r0, 32768	! bit-15 for IFCON
+	mfsr	$r1, $psw
+	and	$r1, $r1, $r0
+	beqz	$r1, 1f
+	PUTS	\str		! PSW.IFCON is not cleared
+1:
+	nop
+.endm
+
+	.global	main
+main:
+	smw.adm $r6, [$sp], $r9, 10
+
+	! Check $lp after test.
+	move	$r9, $lp
+
+	! ---- test J ----
+	ifcall	2f
+	nop
+2:	j	3f
+	PUTS	.Lfstr_j	! not jump
+3:	check_ifcon	.Lfstr_ifcon_j
+
+
+	!---- test J8 ----
+	ifcall	2f
+	nop
+2:	j8	3f
+	PUTS	.Lfstr_j8	! not jump
+3:	check_ifcon	.Lfstr_ifcon_j8
+
+
+	!---- test JR ----
+	ifcall	2f
+	nop
+2:	la	$r0, 3f
+	jr	$r0
+	PUTS	.Lfstr_jr	! not jump
+3:	check_ifcon	.Lfstr_ifcon_jr
+
+
+	!---- test JR5 ----
+	ifcall	2f
+	nop
+2:	la	$r0, 3f
+	jr5	$r0
+	PUTS	.Lfstr_jr5	! not jump
+3:	check_ifcon	.Lfstr_ifcon_jr5
+
+
+	!---- test JRNEZ ----
+	ifcall	2f
+	nop
+2:	la	$r0, 3f
+	jrnez	$r0
+	PUTS	.Lfstr_jr5	! not jump
+3:	check_ifcon	.Lfstr_ifcon_jr5
+
+	beq	$lp, $r9, 3f
+	PUTS	.Lfstr_lp
+
+3:
+	PUTS	.Lpstr
+	EXIT	0
+
+.section	.rodata
+.Lpstr:       .string "pass\n"
+.Lfstr_j:     .string "fail: j after ifcall\n"
+.Lfstr_j8:    .string "fail: j8 after ifcall\n"
+.Lfstr_jr:    .string "fail: jr after ifcall\n"
+.Lfstr_jr5:   .string "fail: jr5 after ifcall\n"
+.Lfstr_jrnez: .string "fail: jrnez after ifcall\n"
+.Lfstr_ifcon_j:     .string "fail: PSW.IFCON is not cleared when j\n"
+.Lfstr_ifcon_j8:    .string "fail: PSW.IFCON is not cleared when j8\n"
+.Lfstr_ifcon_jr:    .string "fail: PSW.IFCON is not cleared when jr\n"
+.Lfstr_ifcon_jr5:   .string "fail: PSW.IFCON is not cleared when jr5\n"
+.Lfstr_ifcon_jrnez: .string "fail: PSW.IFCON is not cleared when jrnez\n"
+.Lfstr_lp:    .string "fail: $lp is corrupted by j in ifcall\n"
diff --git a/sim/testsuite/sim/nds32/041-ifcall-jal.s
b/sim/testsuite/sim/nds32/041-ifcall-jal.s
new file mode 100644
index 0000000..942f4ff
--- /dev/null
+++ b/sim/testsuite/sim/nds32/041-ifcall-jal.s
@@ -0,0 +1,81 @@
+# nds32 test J/J8/JR in ifcall, expected to pass.
+# mach:		all
+# as:		-mbaseline=V3
+# ld:		--defsym=_stack=0x3000000
+# output:	pass\n
+
+	.include "utils.inc"
+
+	.text
+
+	! $r0: address for fail message
+check_ifcon:
+	! check IFCON
+	movi    $r1, 32768	! bit-15 for IFCON
+	mfsr	$r2, $psw
+	and	$r2, $r2, $r1
+	beqz	$r2, 1f
+	jal	puts		! PSW.IFCON is not cleared
+1:
+	ret
+
+	.global	main
+main:
+	smw.adm $r6, [$sp], $r9, 10
+
+	! ---- test JAL ----
+	ifcall	2f
+	! should return from check_ifcon
+	j	3f
+2:	la	$r0, .Lfstr_ifcon_jal
+	jal	check_ifcon
+	PUTS	.Lfstr_jal		! return to the wrong address
+3:	nop
+
+
+	! ---- test JRAL ----
+	ifcall	2f
+	! should return from check_ifcon
+	j	3f
+2:	la	$r0, .Lfstr_ifcon_jral
+	la	$r1, check_ifcon
+	jral	$r1
+	PUTS	.Lfstr_jral		! return to the wrong address
+3:	nop
+
+
+	! ---- test JRAL5 ----
+	ifcall	2f
+	! should return from check_ifcon
+	j	3f
+2:	la	$r0, .Lfstr_ifcon_jral5
+	la	$r1, check_ifcon
+	jral5	$r1
+	PUTS	.Lfstr_jral5		! return to the wrong address
+3:	nop
+
+
+	! ---- test JRALNEZ ----
+	ifcall	2f
+	! should return from check_ifcon
+	j	3f
+2:	la	$r0, .Lfstr_ifcon_jralnez
+	la	$r1, check_ifcon
+	jralnez	$r1
+	PUTS	.Lfstr_jralnez		! return to the wrong address
+3:	nop
+
+	PUTS	.Lpstr
+	EXIT	0
+
+
+.section	.rodata
+.Lpstr:		.string "pass\n"
+.Lfstr_jal:     .string "fail: return to wrong address (jal after ifcall)\n"
+.Lfstr_jral:    .string "fail: return to wrong address (jral after ifcall)\n"
+.Lfstr_jral5:   .string "fail: return to wrong address (jral5 after ifcall)\n"
+.Lfstr_jralnez: .string "fail: return to wrong address (jralnez after
ifcall)\n"
+.Lfstr_ifcon_jal:      .string "fail: PSW.IFCON is not cleared when jal\n"
+.Lfstr_ifcon_jral:     .string "fail: PSW.IFCON is not cleared when jral\n"
+.Lfstr_ifcon_jral5:    .string "fail: PSW.IFCON is not cleared when jral5\n"
+.Lfstr_ifcon_jralnez:  .string "fail: PSW.IFCON is not cleared when jralnez\n"
diff --git a/sim/testsuite/sim/nds32/050-ex5.it.s
b/sim/testsuite/sim/nds32/050-ex5.it.s
new file mode 100644
index 0000000..75b458c
--- /dev/null
+++ b/sim/testsuite/sim/nds32/050-ex5.it.s
@@ -0,0 +1,118 @@
+# nds32 test J/JAL in ex5.it (index < 32), expected to pass.
+# mach:		all
+# as:		-mbaseline=V3
+# ld:		--defsym=_stack=0x3000000
+# output:	pass\n
+
+	.include "utils.inc"
+
+.section	.ex9.itable, "a"
+	.align	2
+.LITB0:		addi	$r7, $r7, 13
+.LITB_J:	j	.LITB_J
+.LITB_JAL:	jal	.LITB_JAL
+.LITB_JR:	jr	$r8
+.LITB_BEQZ:	beqz	$r8, .LITB_BEQZ
+
+	.text
+test_jal_call:
+	addi	$r7, $r7, -1
+	ret
+
+	.global	main
+main:
+	smw.adm $r6, [$sp], $r9, 10
+
+	! Test big-endian only.
+	! The code for relocation is off topic.
+	setend.b
+
+	! Load ITB table
+	la	$r9, .LITB0	! address of ITB entry 0
+	mtusr	$r9, $ITB
+
+
+	!	normal instruction >= 32
+	movi	$r7, 17
+	ex9.it	0
+	addi	$r7, $r7, -30
+
+	beqz	$r7, .Ltest_j32
+	PUTS	.Lfstr_n32	! FAIL: addi in ex5.it
+
+.Ltest_j32:
+	! relocate the entry in table
+	l.w	$r7, .LITB_J
+	la	$r0, .Ltest_jal	! fix this address in
+	srli	$r0, $r0, 1
+	or	$r0, $r0, $r7
+	s.w	$r0, .LITB_J
+
+	ex9.it	0x1		! j  .Ltest_jal
+	PUTS	.Lfstr_j32	! FAIL: j in ex5.it
+
+
+.Ltest_jal:
+	! relocate the entry in table
+	l.w	$r7, .LITB_JAL
+	la	$r0, test_jal_call	! fix this address in
+	srli	$r0, $r0, 1
+	or	$r0, $r0, $r7
+	s.w	$r0, .LITB_JAL
+
+	movi	$r7, 1
+	ex9.it	0x2			! test_jal_call for $r7--
+	beqz	$r7, .Ltest_jr
+	PUTS	.Lfstr_jal		! jal .Ltest_jr
+
+.Ltest_jr:
+	la	$r8, .Ltest_beqz0
+	ex9.it	0x3			! jr $r8 (.Ldone)
+	PUTS	.Lfstr_jr
+	EXIT	1
+
+.Ltest_beqz0:
+	! test 32-bit instruction fall-through in ex9
+	movi	$r8, 13
+	ex9.it	0x4	! beqz  $r8, .LITB_BEQZ
+	addi45	$r8, 1	! If it fall-through incorrectly,
+			! this instruction will be skipped.
+			! ($pc + 4 instead of $pc + 2)
+	beqc	$r8, 14, .Ltest_beqz1
+	PUTS	.Lfstr_beq0
+
+.Ltest_beqz1:
+	! test 32-bit instruction branch in ex9
+
+	! relocate the entry in table
+	l.w	$r7, .LITB_BEQZ
+	l.w	$r0, BR			! fix this address in
+	srli	$r0, $r0, 1
+	or	$r0, $r0, $r7
+	s.w	$r0, .LITB_BEQZ
+
+	movi	$r8, 0
+.LBEQZ_S:
+	ex9.it	0x4	! beqz  $r8, .LITB_BEQZ
+	addi45	$r8, 1	! Padding for preventing incorrectly fall-through.
+	PUTS	.Lfstr_beq1
+.LBEQZ_D:
+	nop
+
+.Ldone:
+	PUTS	.Lpstr
+	EXIT	0	! Because endian is chagned,
+			! it cannot properly restore registers.
+
+	.size	main, .-main
+
+.section	.rodata
+            ! assume the range is very small and access as big-endian.
+BR:         .byte   0x00,0x00,0x00,.LBEQZ_D - .LBEQZ_S
+.Lpstr:     .string "pass\n"
+.Lfstr_n32: .string "fall: addi in ex9.it (<32)\n"
+.Lfstr_j32: .string "fail: j in ex9.it (<32)\n"
+.Lfstr_jal: .string "fail: jal in ex9.it (<32)\n"
+.Lfstr_jr:  .string "fail: jr in ex9.it (<32)\n"
+.Lfstr_beq0:.string "fail: beqz in ex9.it - fall-through (<32)\n"
+.Lfstr_beq1:.string "fail: beqz in ex9.it - branch (<32)\n"
diff --git a/sim/testsuite/sim/nds32/050-ex9.it.s
b/sim/testsuite/sim/nds32/050-ex9.it.s
new file mode 100644
index 0000000..fbe9d40
--- /dev/null
+++ b/sim/testsuite/sim/nds32/050-ex9.it.s
@@ -0,0 +1,94 @@
+# nds32 test J/JAL in ex9, expected to pass.
+# mach:		all
+# as:		-mbaseline=V3
+# ld:		--defsym=_stack=0x3000000
+# output:	pass\n
+
+	.include "utils.inc"
+
+.section	.ex9.itable, "a"
+	.align	2
+ITB:
+	.space	32 * 4, 0	! pad 32 entries
+.L32:
+	addi	$r7, $r7, 13
+.LITB_J:
+	j	.LITB_J
+.LITB_JAL:
+	jal	.LITB_JAL
+	jr	$r8
+
+
+	.text
+test_jal_call:
+	addi	$r7, $r7, -1
+	ret
+
+	.global	main
+main:
+	smw.adm $r6, [$sp], $r9, 10
+
+	! Test big-endian only.
+	! The code for relocation is off topic.
+	setend.b
+
+	la	$r9, ITB
+	mtusr	$r9, $ITB
+
+	la	$r9, .L32	! address of ITB entry 32
+
+	!	normal instruction >= 32
+	movi	$r7, 17
+	ex9.it	32
+	addi	$r7, $r7, -30
+
+	beqz	$r7, .Ltest_j32
+	PUTS	.Lfstr_n32
+
+
+.Ltest_j32:
+	!	j > 32
+	! fix the entry in table
+	lwi	$r7, [$r9 + 4]
+	la	$r0, .Ltest_jal	! fix this address in
+	srli	$r0, $r0, 1
+	or	$r0, $r0, $r7
+	swi	$r0, [$r9 + 4]
+
+	ex9.it	33
+	PUTS	.Lfstr_j32
+
+.Ltest_jal:
+	!	jal > 32
+	! fix the entry in table
+	lwi	$r7, [$r9 + 8]
+	la	$r0, test_jal_call	! fix this address in
+	srli	$r0, $r0, 1
+	or	$r0, $r0, $r7
+	swi	$r0, [$r9 + 8]
+
+	movi	$r7, 1
+	ex9.it	34
+	beqz	$r7, .Ltest_jr
+	PUTS	.Lfstr_jal
+
+.Ltest_jr:
+	!	jr > 32
+	la	$r8, .Ldone
+	ex9.it	35
+	PUTS	.Lfstr_jr
+
+	!	jral > 32
+
+.Ldone:
+	PUTS	.Lpstr
+	EXIT	0	! Because endian is chagned,
+			! it cannot properly restore registers.
+	.size	main, .-main
+
+.section	.rodata
+.Lpstr:     .string "pass\n"
+.Lfstr_n32: .string "fall: addi in ex9.it (>=32)\n"
+.Lfstr_j32: .string "fail: j in ex9.it (>=32)\n"
+.Lfstr_jal: .string "fail: jal in ex9.it (>=32)\n"
+.Lfstr_jr:  .string "fail: jr in ex9.it (>=32)\n"
diff --git a/sim/testsuite/sim/nds32/100-bse.s
b/sim/testsuite/sim/nds32/100-bse.s
new file mode 100644
index 0000000..d10eb03
--- /dev/null
+++ b/sim/testsuite/sim/nds32/100-bse.s
@@ -0,0 +1,115 @@
+# nds32 bit stream extraction
+# mach:	 	all
+# as:		-mbaseline=V3 -mext-perf2
+# ld:		--defsym=_stack=0x3000000
+# output:	pass\n
+
+	.include "utils.inc"
+
+.data
+	.align 2
+
+	.text
+	.global main
+main:
+	smw.adm $r6, [$sp], $r25, 10
+
+	movi	$r25, 0
+
+	! case 1 - extract 12 bits from 12 bits
+	! check rt and rb[4:0] (distance)
+	li	$r7, 0x1234567a	! input
+	li	$r8, 0xb0c	! rb
+	bse	$r6, $r7, $r8	! 456
+
+	li	$r9, 0x456
+	beq	$r6, $r9, 1f	! check rt
+	addi	$r25, $r25, 1
+	PUTS	.Lfstr0a
+1:
+	andi	$r9, $r8, 0x1f
+	beqc	$r9, 24, 1f	! check rb[4:0] updated distance
+	addi	$r25, $r25, 1
+	PUTS	.Lfstr0b
+1:
+
+	! case 2 - non-occupied untouched
+	! check rt
+	li	$r7, 0x87654321 ! input
+	li	$r8, 0x40000b0c	! rb
+	li	$r6, 0xabcdef12	! rt (non-occupied should be untouched)
+	bse	$r6, $r7, $r8	! abcde543
+
+	li	$r9, 0xabcde543
+	beq	$r6, $r9, 1f	! check rt
+	addi	$r25, $r25, 1
+	PUTS	.Lfstr1
+1:
+
+
+	! case 3 - empty condition
+	! check rt and refill-bit
+	li	$r7, 0xabcd1234	! input
+	li	$r8, 0x00000b14	! rb
+	bse	$r6, $r7, $r8	! 234
+
+	li	$r9, 0x234
+	beq	$r6, $r9, 1f	! check rt
+	addi	$r25, $r25, 1
+	PUTS	.Lfstr2a
+1:
+	srli	$r9, $r7, 30
+	beqc	$r9, 2, 1f	! check rb[31] refill-bit
+	addi	$r25, $r25, 1
+	PUTS	.Lfstr2b
+1:
+
+	! case 4 - underflow condition
+	! check rt and rb
+	li	$r7, 0x1a2b3c4d ! input
+	li	$r8, 0xb18	! rb
+	bse	$r6, $r7, $r8
+
+	li	$r9, 0x4d0
+	beq	$r6, $r9, 1f	! check rt
+	addi	$r25, $r25, 1
+	PUTS	.Lfstr3
+1:
+
+	! case 5 - underflow and refill
+	li	$r7, 0x8a7b6c5d	! input
+	li	$r8, 0xb18	! rb
+	bse	$r6, $r7, $r8	! 5d0
+	bse	$r6, $r7, $r8	! 5d8
+	bse	$r7, $r7, $r8	! a7b
+
+	li	$r9, 0x5d8
+	beq	$r6, $r9, 1f	! check refilled rt
+	addi	$r25, $r25, 1
+	PUTS	.Lfstr4a
+1:
+	li	$r9, 0xa7b
+	beq	$r7, $r9, 1f	! check next extract
+	addi	$r25, $r25, 1
+	PUTS	.Lfstr4b
+1:
+
+
+	bnez	$r25, 1f
+	PUTS	.Lpstr
+	movi	$r0, 0
+1:
+	lmw.bim $r6, [$sp], $r25, 10
+	ret
+
+.section .rodata
+	.align 2
+.Lpstr:	 .string "pass\n"
+.Lfstr0a: .string "fail: bse normal condition.\n"
+.Lfstr0b: .string "fail: bse normal condition. (update distance)\n"
+.Lfstr1:  .string "fail: bse normal condition. (non-occupied untouched)\n"
+.Lfstr2a: .string "fail: bse empty condition. \n"
+.Lfstr2b: .string "fail: bse empty condition. (refill-bit)\n"
+.Lfstr3:  .string "fail: bse underflow condition.\n"
+.Lfstr4a: .string "fail: bse underflow condition refilling.\n"
+.Lfstr4b: .string "fail: bse underflow condition next extraction.\n"
diff --git a/sim/testsuite/sim/nds32/100-bsp.s
b/sim/testsuite/sim/nds32/100-bsp.s
new file mode 100644
index 0000000..d23aa29
--- /dev/null
+++ b/sim/testsuite/sim/nds32/100-bsp.s
@@ -0,0 +1,98 @@
+# nds32 bit stream packing (normal)
+# mach:	 	all
+# as:		-mbaseline=V3 -mext-perf2
+# ld:		--defsym=_stack=0x3000000
+# output:	pass\n
+
+	.include "utils.inc"
+
+.data
+	.align 2
+
+	.text
+	.global main
+main:
+	smw.adm $r6, [$sp], $r25, 10
+
+	movi	$r25, 0
+
+	! case 1 - pack 12 bits from 12 bits
+	! check rt and rb[4:0] (distance)
+	li	$r6, 0x87654321	! rt
+	li	$r7, 0xabcdefab	! ra
+	li	$r8, 0xb0c	! rb
+	bsp	$r6, $r7, $r8	! 0x876fab21
+
+	li	$r9, 0x876fab21
+	beq	$r6, $r9, 1f	! check rt
+	addi	$r25, $r25, 1
+	PUTS	.Lfstr0a
+1:
+	andi	$r9, $r8, 0x1f
+	beqc	$r9, 24, 1f	! check rb[4:0] updated distance
+	addi	$r25, $r25, 1
+	PUTS	.Lfstr0b
+1:
+
+
+	! case 2 - empty condition
+	! check rt and refill-bit
+	li	$r6, 0x87654321 ! rt
+	li	$r7, 0xabcdefab	! ra
+	li	$r8, 0x00000b14	! rb
+	bsp	$r6, $r7, $r8	! 0x87654fab
+
+	li	$r9, 0x87654fab
+	beq	$r6, $r9, 1f	! check rt
+	addi	$r25, $r25, 1
+	PUTS	.Lfstr1a
+1:
+	srli	$r9, $r7, 30
+	beqc	$r9, 2, 1f	! check rb[31] refill-bit
+	addi	$r25, $r25, 1
+	PUTS	.Lfstr1b
+1:
+
+	! case 3 - underflow condition
+	! check rt and refilling
+	li	$r6, 0x87654321 ! rt
+	li	$r7, 0xa8b7c6d5	! ra
+	li	$r8, 0x00000b18	! rb
+
+	bsp	$r6, $r7, $r8	! 0x8765436d
+	li	$r9, 0x8765436d
+	beq	$r6, $r9, 1f	! check rt
+	addi	$r25, $r25, 1
+	PUTS	.Lfstr2a
+1:
+	bsp	$r6, $r7, $r8	! 0x5765436d
+	li	$r9, 0x5765436d
+	beq	$r6, $r9, 1f	! check next filling
+	addi	$r25, $r25, 1
+	PUTS	.Lfstr2b
+1:
+	bsp	$r6, $r7, $r8	! 0x56d5436d
+	li	$r9, 0x56d5436d
+	beq	$r6, $r9, 1f	! check next filling
+	addi	$r25, $r25, 1
+	PUTS	.Lfstr2c
+1:
+
+
+	bnez	$r25, 1f
+	PUTS	.Lpstr
+	movi	$r0, 0
+1:
+	lmw.bim $r6, [$sp], $r25, 10
+	ret
+
+.section .rodata
+	.align 2
+.Lpstr:	  .string "pass\n"
+.Lfstr0a: .string "fail: bsp normal condition.\n"
+.Lfstr0b: .string "fail: bsp normal condition. (update distance)\n"
+.Lfstr1a: .string "fail: bsp empty condition.\n"
+.Lfstr1b: .string "fail: bsp empty condition. (update distance)\n"
+.Lfstr2a: .string "fail: bsp underflow condition.\n"
+.Lfstr2b: .string "fail: bsp underflow condition. (refilling)\n"
+.Lfstr2c: .string "fail: bsp underflow condition. (next filling)\n"
diff --git a/sim/testsuite/sim/nds32/ChangeLog
b/sim/testsuite/sim/nds32/ChangeLog
new file mode 100644
index 0000000..dfe6af7
--- /dev/null
+++ b/sim/testsuite/sim/nds32/ChangeLog
@@ -0,0 +1,28 @@
+2013-07-08  Wei-cheng Wang  <cole945@gmail.com>
+	    Sabrina Ni <sabrinanitw@gmail.com>
+
+	* 000-sanity.s: New file.
+	* 010-lmwzb.s: New file.
+	* 010-smwzb.s: New file.
+	* 010-unaligned.s: New file.
+	* 020-beqc.s: New file.
+	* 020-ffbi.s: New file.
+	* 020-ffb.s: New file.
+	* 020-ffmism.s: New file.
+	* 020-ffzmism.s: New file.
+	* 020-flmism.s: New file.
+	* 020-signext-load.s: New file.
+	* 020-signext.s: New file.
+	* 030-setend.s: New file.
+	* 040-ifcall.s: New file.
+	* 040-ifret.s: New file.
+	* 041-ifcall-chaining.s: New file.
+	* 041-ifcall-jal.s: New file.
+	* 041-ifcall-j.s: New file.
+	* 050-ex5.it.s: New file.
+	* 050-ex9.it.s: New file.
+	* 100-bse.s: New file.
+	* 100-bsp.s: New file.
+	* allinsn.exp: New file.
+	* smwzb.s: New file.
+	* utils.inc: New file.
diff --git a/sim/testsuite/sim/nds32/allinsn.exp
b/sim/testsuite/sim/nds32/allinsn.exp
new file mode 100644
index 0000000..580a11b
--- /dev/null
+++ b/sim/testsuite/sim/nds32/allinsn.exp
@@ -0,0 +1,14 @@
+# NDS32 simulator instruction tests
+
+# unset_currtarget_info ldscript
+
+# Only test nds32*-*
+if {[istarget nds32*-*]} {
+
+    # all machines
+    set all_machs "all"
+
+    foreach src [lsort [glob -nocomplain $srcdir/$subdir/*.\[csS\]]] {
+	run_sim_test $src $all_machs
+    }
+}
diff --git a/sim/testsuite/sim/nds32/smwzb.s b/sim/testsuite/sim/nds32/smwzb.s
new file mode 100644
index 0000000..4936fc4
--- /dev/null
+++ b/sim/testsuite/sim/nds32/smwzb.s
@@ -0,0 +1,76 @@
+# nds32 test SMWZB, expected to pass.
+# mach:	 all
+# as:
+# ld:		--defsym=_stack=0x3000000
+# output:	pass\n
+
+	.include "utils.inc"
+
+.data
+	.align 2
+BASE:
+	.word	0xffffffff ! $r6
+	.word	0xffffffff ! $r7
+	.word	0xffffffff ! $r8
+	.word	0xffffffff ! $r9
+	.word	0xffffffff ! $fp
+WORD:
+	.byte	0x77,0x00,0xff,0xff
+
+.text
+	.global	main
+main:
+	la	$r10, BASE	! load base
+	addi	$r11, $r10, #20	! 5 words
+	li	$r6, 0x11222211
+	li	$r7, 0x55666655
+	li	$r8, 0x77000077
+	li	$r9, 0xaabbbbaa
+	li	$fp, 0xccddddcc
+
+	! expect:
+	!	$r6: 0x11222211
+	!	$r7: 0x55666655
+	!	$r8: 0x77000077
+	!	$r9: 0 (untouched)
+	!	$fp: 0 (untouched)
+	!	$r10 = BASE + 20
+	smwzb.bm	$r6,[$r10],$r9,0x8
+
+	beq	$r11, $r10, 1f
+	PUTS	.Lfstr0
+
+1:	l.w	$r0, BASE
+	beq	$r6, $r0, 1f
+	PUTS	.Lfstr1
+
+1:	l.w	$r0, BASE + 4
+	beq	$r7, $r0, 1f
+	PUTS	.Lfstr2
+
+1:	l.w	$r0, BASE + 8
+	l.w	$r8, WORD
+	beq	$r8, $r0, 1f
+	PUTS	.Lfstr3
+
+1:	l.w	$r0, BASE + 12
+	li	$r9, 0xffffffff
+	beq	$r9, $r0, 1f
+	PUTS	.Lfstr4
+
+1:	l.w	$r0, BASE + 16
+	li	$fp, 0xffffffff
+	beq	$fp, $r0, 1f
+	PUTS	.Lfstr5
+
+1:	PASS
+	EXIT	0
+
+.section	.rodata
+.Lpstr:  .string "pass\n"
+.Lfstr0: .string "fail: adjust $Ra + 20\n"
+.Lfstr1: .string "fail: $r6 == 0x11222211\n"
+.Lfstr2: .string "fail: $r7 == 0x55666655\n"
+.Lfstr3: .string "fail: $r8 == 0x77000077\n"
+.Lfstr4: .string "fail: $r9 == 0xffffffff != 0xaabbbbaa\n"
+.Lfstr5: .string "fail: $fp == 0xffffffff != 0xaabbbbaa\n"
diff --git a/sim/testsuite/sim/nds32/utils.inc
b/sim/testsuite/sim/nds32/utils.inc
new file mode 100644
index 0000000..f1bbc5b
--- /dev/null
+++ b/sim/testsuite/sim/nds32/utils.inc
@@ -0,0 +1,115 @@
+! _start: General entry potiner. It setups $sp.
+!   swap: Swap a word in $r0 and return in $r0.
+! result: Output "pass" if $r0 == 0; otherwise output "fail 0x##".
+
+.macro	FAIL	code
+	movi	$r0, \code
+	bal	result
+.endm
+
+.macro	PASS
+	movi	$r0, 0
+	bal	result
+.endm
+
+.macro	EXIT	code
+	li	$r0, \code
+	syscall	1
+.endm
+
+.macro PUTS	label
+	la	$r0, \label
+	bal	puts
+.endm
+
+.section	.rodata
+	.align 2
+LPASS_STR:
+	.string	"pass\n"
+
+	.align 2
+LFAIL_STR:
+	.string "fail: 0x##\n"
+
+.text
+	.align	2
+	.globl	swap
+	.type	swap, @function
+swap:
+	wsbh    $r0, $r0
+	rotri   $r0,$r0,#0x10
+	ret
+	.size	swap, .-swap
+
+	! if $r0 = 0
+	!     pass
+	! else
+	!     fail + id
+	.align 2
+	.global	result
+	.type	result, @function
+result:
+	smw.adm	$r6,[$sp],$r14,0xe
+	move	$r6, $r0
+	bnez	$r0, 1f
+	la	$r1, LPASS_STR
+	b	2f
+1:
+	la	$r1, LFAIL_STR
+
+	andi	$r2, $r0, 0xf
+	slti	$r3, $r2, 10
+	bnez	$r3, 3f
+	addi	$r2, $r2, 55
+	b	4f
+3:
+	addi	$r2, $r2, 48
+4:
+	sbi	$r2, [$r1 + 9]
+
+	andi	$r2, $r0, 0xf0
+	srli	$r2, $r2, 4
+	slti	$r3, $r2, 10
+	bnez	$r3, 3f
+	addi	$r2, $r2, 55
+	b	4f
+3:
+	addi	$r2, $r2, 48
+4:
+	sbi	$r2, [$r1 + 8]
+
+2:
+	move	$r0, $r1
+	bal	puts
+	move	$r0, $r6
+
+	lmw.bim	$r6,[$sp],$r14,0xe
+	ret
+
+	.size	result, .-result
+
+	.align 2
+	.global	puts
+	.type	puts, @function
+puts:
+	ori	$r1, $r0, 0
+	movi	$r2, 0
+1:
+	lbi.bi	$r3, [$r0], 1
+	beqz	$r3, 2f
+	addi	$r2, $r2, 1
+	b	1b
+2:
+	movi	$r0, 1
+	syscall 5
+	ret
+	.size	puts, .-puts
+
+	.align 2
+	.global	_start
+	.type	_start, @function
+_start:
+	la	$sp, _stack
+	bal	main
+	syscall	1
+	.size	_start, .-_start
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