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[committed] MIPS: Handle software-stepping of MIPS32 JALX
- From: "Maciej W. Rozycki" <macro at codesourcery dot com>
- To: <gdb-patches at sourceware dot org>
- Date: Tue, 10 Apr 2012 23:54:31 +0100
- Subject: [committed] MIPS: Handle software-stepping of MIPS32 JALX
Hi,
I have committed the change below, recycling some dead bits in software
single-stepping code to add support for the JALX instruction. This issue
was triggered by running the MIPS16 thunk test case on a Linux soft-float
target where GDB treated JALX as an ordinary instruction and therefore
kept placing the single-stepping breakpoint in the JALX's delay slot and
as a result looped indefinitely. The test case now passes on that target.
2011-04-10 Maciej W. Rozycki <macro@codesourcery.com>
gdb/
* mips-tdep.c (mips32_next_pc): Handle JALX.
Maciej
gdb-mips32-next-pc-jalx.diff
Index: gdb-fsf-trunk-quilt/gdb/mips-tdep.c
===================================================================
--- gdb-fsf-trunk-quilt.orig/gdb/mips-tdep.c 2012-04-05 14:18:05.000000000 +0100
+++ gdb-fsf-trunk-quilt/gdb/mips-tdep.c 2012-04-05 14:36:19.755597174 +0100
@@ -1258,6 +1258,16 @@ mips32_next_pc (struct frame_info *frame
&& (itype_rt (inst) & 2) == 0)
/* BC1ANY4F, BC1ANY4T: 010001 01010 xxx0x */
pc = mips32_bc1_pc (gdbarch, frame, inst, pc + 4, 4);
+ else if (itype_op (inst) == 29)
+ /* JALX: 011101 */
+ /* The new PC will be alternate mode. */
+ {
+ unsigned long reg;
+
+ reg = jtype_target (inst) << 2;
+ /* Add 1 to indicate 16-bit mode -- invert ISA mode. */
+ pc = ((pc + 4) & ~(CORE_ADDR) 0x0fffffff) + reg + 1;
+ }
else
pc += 4; /* Not a branch, next instruction is easy. */
}
@@ -1350,14 +1360,6 @@ mips32_next_pc (struct frame_info *frame
pc = reg + ((pc + 4) & ~(CORE_ADDR) 0x0fffffff);
}
break;
- /* FIXME case JALX : */
- {
- unsigned long reg;
- reg = jtype_target (inst) << 2;
- pc = reg + ((pc + 4) & ~(CORE_ADDR) 0x0fffffff) + 1; /* yes, +1 */
- /* Add 1 to indicate 16 bit mode - Invert ISA mode */
- }
- break; /* The new PC will be alternate mode */
case 4: /* BEQ, BEQL */
equal_branch:
if (get_frame_register_signed (frame, itype_rs (inst)) ==