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[PATCH] fix disassembly of E500 instructions

This patch addresses a usability nit: when debugging E500 binaries and
disassembling code containing E500-specific (SPE) instructions, one
sometimes sees AltiVec instructions instead.  The opcode spaces for SPE
instructions and AltiVec instructions overlap, and specifiying the "any"
cpu in gdb_print_insn_powerpc looks for AltiVec instructions first.  If
we know we're debugging an E500 binary, however, we can specify the
"e500x2" cpu and get much more sane disassembly output.

Tested manually with cross to powerpc-linux-gnu.  OK to commit?


	* rs6000-tdep.c (gdb_print_insn_powerpc): Disassemble e500
	instructions if debugging an e500 binary.
 gdb/rs6000-tdep.c |    7 ++++++-
 1 files changed, 6 insertions(+), 1 deletions(-)

diff --git a/gdb/rs6000-tdep.c b/gdb/rs6000-tdep.c
index 09c7f8f..ef049d9 100644
--- a/gdb/rs6000-tdep.c
+++ b/gdb/rs6000-tdep.c
@@ -3029,7 +3029,12 @@ static int
 gdb_print_insn_powerpc (bfd_vma memaddr, disassemble_info *info)
   if (!info->disassembler_options)
-    info->disassembler_options = "any";
+    {
+      if (info->mach == bfd_mach_ppc_e500)
+	info->disassembler_options = "e500x2";
+      else
+	info->disassembler_options = "any";
+    }
   if (info->endian == BFD_ENDIAN_BIG)
     return print_insn_big_powerpc (memaddr, info);

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