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[commit] beginnings of support for cgen sims with insn words > 32 bits
- From: Doug Evans <dje at sebabeach dot org>
- To: gdb-patches at sourceware dot org
- Date: Sun, 22 Nov 2009 20:13:51 -0800 (PST)
- Subject: [commit] beginnings of support for cgen sims with insn words > 32 bits
Hi.
fyi, I checked this in.
Tested: Built all cgen sims, ran all testsuites, no regressions.
2009-11-22 Doug Evans <dje@sebabeach.org>
sim/ChangeLog
* cris/cpuall.h: Regenerate.
* cris/cpuv10.h: Regenerate.
* cris/cpuv32.h: Regenerate.
* cris/decodev10.c: Regenerate.
* cris/decodev10.h: Regenerate.
* cris/decodev32.c: Regenerate.
* cris/decodev32.h: Regenerate.
sim/common/ChangeLog
* cgen-engine.h (EXTRACT_MSB0_LGSINT, EXTRACT_MSB0_LGUINT): Define.
(EXTRACT_LSB0_LGSINT, EXTRACT_LSB0_LGUINT): Define.
(EXTRACT_FN, SEMANTIC_FN): Use CGEN_INSN_WORD in prototype
instead of CGEN_INSN_INT.
sim/frv/ChangeLog
* cpu.h: Regenerate.
* cpuall.h: Regenerate.
* decode.c: Regenerate.
* decode.h: Regenerate.
sim/iq2000/ChangeLog
* cpu.h: Regenerate.
* cpuall.h: Regenerate.
* decode.c: Regenerate.
* decode.h: Regenerate.
sim/lm32/ChangeLog
* cpu.h: Regenerate.
* cpuall.h: Regenerate.
* decode.c: Regenerate.
* decode.h: Regenerate.
sim/m32r/ChangeLog
* cpu.h: Regenerate.
* cpu2.h: Regenerate.
* cpux.h: Regenerate.
* cpuall.h: Regenerate.
* decode.c: Regenerate.
* decode.h: Regenerate.
* decode2.c: Regenerate.
* decode2.h: Regenerate.
* decodex.c: Regenerate.
* decodex.h: Regenerate.
sim/sh64/ChangeLog
* cpu.h: Regenerate.
* cpuall.h: Regenerate.
* decode-compact.c: Regenerate.
* decode-compact.h: Regenerate.
* decode-media.c: Regenerate.
* decode-media.h: Regenerate.
Index: common/cgen-engine.h
===================================================================
RCS file: /cvs/src/src/sim/common/cgen-engine.h,v
retrieving revision 1.5
diff -u -p -d -u -r1.5 cgen-engine.h
--- common/cgen-engine.h 14 Jan 2009 10:53:05 -0000 1.5
+++ common/cgen-engine.h 23 Nov 2009 03:53:35 -0000
@@ -17,9 +17,11 @@ GNU General Public License for more deta
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. */
-/* This file must be included after eng.h and before ${cpu}.h.
+/* This file is included by ${cpu}.h.
+ It needs CGEN_INSN_WORD which is defined by ${cpu}.h.
??? A lot of this could be moved to genmloop.sh to be put in eng.h
- and thus remove some conditional compilation. Worth it? */
+ and thus remove some conditional compilation. We'd still need
+ CGEN_INSN_WORD though. */
/* Semantic functions come in six versions on two axes:
fast/full-featured, and using one of the simple/scache/compilation engines.
@@ -62,12 +64,26 @@ along with this program. If not, see <h
#define EXTRACT_LSB0_UINT(val, total, start, length) \
(((UINT) (val) << ((sizeof (UINT) * 8) - (start) - 1)) \
>> ((sizeof (UINT) * 8) - (length)))
+
+#define EXTRACT_MSB0_LGSINT(val, total, start, length) \
+(((CGEN_INSN_LGSINT) (val) << ((sizeof (CGEN_INSN_LGSINT) * 8) - (total) + (start))) \
+ >> ((sizeof (CGEN_INSN_LGSINT) * 8) - (length)))
+#define EXTRACT_MSB0_LGUINT(val, total, start, length) \
+(((CGEN_INSN_UINT) (val) << ((sizeof (CGEN_INSN_LGUINT) * 8) - (total) + (start))) \
+ >> ((sizeof (CGEN_INSN_LGUINT) * 8) - (length)))
+
+#define EXTRACT_LSB0_LGSINT(val, total, start, length) \
+(((CGEN_INSN_LGSINT) (val) << ((sizeof (CGEN_INSN_LGSINT) * 8) - (start) - 1)) \
+ >> ((sizeof (CGEN_INSN_LGSINT) * 8) - (length)))
+#define EXTRACT_LSB0_LGUINT(val, total, start, length) \
+(((CGEN_INSN_LGUINT) (val) << ((sizeof (CGEN_INSN_LGUINT) * 8) - (start) - 1)) \
+ >> ((sizeof (CGEN_INSN_LGUINT) * 8) - (length)))
/* Semantic routines. */
/* Type of the machine generated extraction fns. */
/* ??? No longer used. */
-typedef void (EXTRACT_FN) (SIM_CPU *, IADDR, CGEN_INSN_INT, ARGBUF *);
+typedef void (EXTRACT_FN) (SIM_CPU *, IADDR, CGEN_INSN_WORD, ARGBUF *);
/* Type of the machine generated semantic fns. */
@@ -89,9 +105,9 @@ typedef unsigned int SEM_STATUS;
/* Instruction fields are extracted by the semantic routine.
??? TODO: multi word insns. */
#if HAVE_PARALLEL_INSNS && ! WITH_PARALLEL_GENWRITE
-typedef SEM_STATUS (SEMANTIC_FN) (SIM_CPU *, SEM_ARG, PAREXEC *, CGEN_INSN_INT);
+typedef SEM_STATUS (SEMANTIC_FN) (SIM_CPU *, SEM_ARG, PAREXEC *, CGEN_INSN_WORD);
#else
-typedef SEM_STATUS (SEMANTIC_FN) (SIM_CPU *, SEM_ARG, CGEN_INSN_INT);
+typedef SEM_STATUS (SEMANTIC_FN) (SIM_CPU *, SEM_ARG, CGEN_INSN_WORD);
#endif
#endif