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Re: STEP_SKIPS_DELAY question, sort of
- From: Orjan Friberg <orjan dot friberg at axis dot com>
- To: Andrew Cagney <cagney at gnu dot org>
- Cc: gdb-patches at sources dot redhat dot com
- Date: Mon, 07 Jun 2004 14:12:05 +0200
- Subject: Re: STEP_SKIPS_DELAY question, sort of
- Organization: Axis Communications
- References: <40AE38D0.7010204@axis.com> <40AE659A.90207@gnu.org> <40B1BD1B.4090300@axis.com> <40B23BB2.6070001@gnu.org> <40B33399.3090803@axis.com> <40B3B742.50007@gnu.org> <40B465E7.7050702@axis.com>
Orjan Friberg wrote:
I'll go and have a closer look at STEP_SKIPS_DELAY.
Short recap: the MIPS checks if there's a breakpoint in the delay slot of the
instruction where GDB is about to resume execution. If so, GDB single-steps
that instruction before re-inserting the breakpoint.
For CRISv32, if there's a breakpoint on an instruction which has a delay slot,
we cannot re-insert the breakpoint when we're stopped in the delay slot (after
making one single-step), because the previous instruction will be re-executed
when returning from the delay slot.
I tried implementing a fix in handle_inferior_event (the MIPS fix is in
proceed). It seemed easier to step one more time when we find out that we need
to, rather than to determine beforehand that we're going to have to step twice
(and I couldn't determine how to pass that information).
The concept patch below illustrates what I'm trying to do; by setting
another_trap in the execution control state, by the time we get to keep_going we
won't insert the breakpoint and we'll instead continue single-stepping.
Comments? Is this the right approach at all?
Index: infrun.c
===================================================================
RCS file: /cvs/src/src/gdb/infrun.c,v
retrieving revision 1.156
diff -u -r1.156 infrun.c
--- infrun.c 11 May 2004 23:30:31 -0000 1.156
+++ infrun.c 7 Jun 2004 11:44:19 -0000
@@ -1975,7 +1975,17 @@
/* Don't even think about breakpoints if just proceeded over a
breakpoint. */
if (stop_signal == TARGET_SIGNAL_TRAP && trap_expected)
- bpstat_clear (&stop_bpstat);
+ {
+ bpstat_clear (&stop_bpstat);
+
+ /* If we stepped into a delay slot, and the preceding instruction
+ will be re-executed when resuming, step again before re-inserting
+ the breakpoint. */
+ if (STEP_SKIPS_IN_DELAY_P
+ && breakpoint_here_p (read_pc () - 2)
+ && STEP_SKIPS_IN_DELAY (read_pc ()))
+ ecs->another_trap = 1;
+ }
else
{
/* See if there is a breakpoint at the current PC. */
--
Orjan Friberg
Axis Communications