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Re: [patch/rfc] Rewrite decr-pc logic, eliminate step_sp


On Mon, May 10, 2004 at 12:00:10AM -0400, Andrew Cagney wrote:
> Hello,
> 
> The attached patch rewrites the logic (er, heuristic) used to decide 
> when to apply decr_pc_after_break.
> 
> The heuristic even included:
>   step_range_end && INNER_THAN (read_sp (), (step_sp - 16))
> yes, the 16 is for real!  From memory it has something to do with SPARC 
> signal trampolines (I see the comment has been lost).
> 
> The new logic, while based on the old code, isn't identical.  I've 
> tested it in i386 without regressions (which doesn't cover the s/w 
> single step case).
> 
> comments?
> Andrew

> +  if (currently_stepping (ecs))
> +    {
> +      if (SOFTWARE_SINGLE_STEP_P ())
> +	{
> +	  if (singlestep_breakpoints_inserted_p
> +	      && prev_pc == breakpoint_pc)
> +	    /* If we're software-single-stepping, assume we hit one of
> +	       the inserted software breakpoints.  */
> +	    write_pc_pid (breakpoint_pc, ecs->ptid);
> +	}

I'm pretty sure that won't work.  prev_pc is where we were stopped
before we decided to single step.  breakpoint_pc is where, if we have
hit a breakpoint, the breakpoint would be.  They won't be equal;
breakpoint_pc will be the following instruction, or the target of a
branch if *prev_pc was a taken branch.  The old code assumes we hit a
breakpoint if we stopped with SIGTRAP with singlestep_breakpoints_inserted_p
- any reason not to keep that behavior?

I think Alpha OSF/1 and Alpha NetBSD are the only current
software-single-step and decr-pc targets, which makes this case a
little hard to test - at least OSF/1 had dreadful test results already,
I'm not sure about NetBSD.  Might want to verify that it isn't
catastrophic, at least.

The rest of it looks right to me, though I had to stare at it for
the last twenty minutes or so.

-- 
Daniel Jacobowitz


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