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Re: [rfa/arm] Handle bx and blx
- From: Daniel Jacobowitz <drow at false dot org>
- To: Richard Earnshaw <rearnsha at arm dot com>
- Cc: gdb-patches at sources dot redhat dot com
- Date: Sun, 7 Mar 2004 15:15:40 -0500
- Subject: Re: [rfa/arm] Handle bx and blx
- References: <20040228183508.GA17481@nevyn.them.org> <200403031601.i23G1tY20936@pc960.cambridge.arm.com>
On Wed, Mar 03, 2004 at 04:01:55PM +0000, Richard Earnshaw wrote:
> > The software single-step implementation in GDB doesn't know either BX or
> > BLX. This results in losing control of the inferior when we single-step
> > over them. I based this on the ARM ARM, so I'm pretty sure I've got the
> > numbers correct.
> >
> > OK to check in?
> >
> > --
> > Daniel Jacobowitz
> > MontaVista Software Debian GNU/Linux Developer
> >
> > 2004-02-28 Daniel Jacobowitz <drow@mvista.com>
> >
> > * arm-tdep.c (thumb_get_next_pc): Handle BX.
> > (arm_get_next_pc): Handle BX and BLX.
>
> Yikes! Yes, this is OK. However, Thumb has BLX (2 variants) as well.
Right you are. I've checked in the above; if I'm reading
thumb_get_next_pc and the ARM correctly, then the below is all I need
for BLX. The first form is already handled since we don't check H.
The second form can be handled identically to BX by relaxing a test.
OK?
--
Daniel Jacobowitz
MontaVista Software Debian GNU/Linux Developer
2004-03-07 Daniel Jacobowitz <drow@mvista.com>
* arm-tdep.c (thumb_get_next_pc): Handle Thumb BLX.
Index: arm-tdep.c
===================================================================
RCS file: /cvs/src/src/gdb/arm-tdep.c,v
retrieving revision 1.165
diff -u -p -r1.165 arm-tdep.c
--- arm-tdep.c 7 Mar 2004 20:03:12 -0000 1.165
+++ arm-tdep.c 7 Mar 2004 20:13:34 -0000
@@ -1651,13 +1651,13 @@ thumb_get_next_pc (CORE_ADDR pc)
{
nextpc = pc_val + (sbits (inst1, 0, 10) << 1);
}
- else if ((inst1 & 0xf800) == 0xf000) /* long branch with link */
+ else if ((inst1 & 0xf800) == 0xf000) /* long branch with link, and blx */
{
unsigned short inst2 = read_memory_integer (pc + 2, 2);
offset = (sbits (inst1, 0, 10) << 12) + (bits (inst2, 0, 10) << 1);
nextpc = pc_val + offset;
}
- else if ((inst1 & 0xff80) == 0x4700) /* branch and exchange (bx) */
+ else if ((inst1 & 0xff00) == 0x4700) /* bx REG, blx REG */
{
if (bits (inst1, 3, 6) == 0x0f)
nextpc = pc_val;