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[patch] Correct FRV insn VLIW units and testcase movement
- From: Dave Brolley <brolley at redhat dot com>
- To: gdb-patches <gdb-patches at sources dot redhat dot com>
- Date: Tue, 09 Sep 2003 18:40:49 -0400
- Subject: [patch] Correct FRV insn VLIW units and testcase movement
- Organization: Red Hat Canada, Ltd
I've committed the attached patch which corrects the VLIW unit
assignments for a few insns. There is also a small change to frv.c to
use a switch in a place which was using an if. This allows for ease of
future expansion.
I've also moved three test cases to the fr400 subdirectory (see attached
ChangeLog) since they are fr400 specific.
Dave
Index: cpu/frv.cpu
===================================================================
RCS file: /cvs/src/src/cpu/frv.cpu,v
retrieving revision 1.8
diff -c -p -r1.8 frv.cpu
*** cpu/frv.cpu 4 Sep 2003 22:46:10 -0000 1.8
--- cpu/frv.cpu 9 Sep 2003 22:24:34 -0000
***************
*** 7639,7645 ****
name mode conv rhs1 rhs2 max min op ope comment)
(dni name
(comment)
! ((UNIT FM01) (FR500-MAJOR M-4) (FR400-MAJOR M-1))
(.str name "$pack $FRinti,$FRintj,$ACC40Sk")
(+ pack ACC40Sk op FRinti ope FRintj)
(media-dual-complex-semantics mode conv rhs1 rhs2 max min)
--- 7639,7645 ----
name mode conv rhs1 rhs2 max min op ope comment)
(dni name
(comment)
! ((UNIT FMALL) (FR500-MAJOR M-4) (FR400-MAJOR M-1))
(.str name "$pack $FRinti,$FRintj,$ACC40Sk")
(+ pack ACC40Sk op FRinti ope FRintj)
(media-dual-complex-semantics mode conv rhs1 rhs2 max min)
***************
*** 7685,7691 ****
name mode conv rhs1 rhs2 max min op ope comment)
(dni name
(comment)
! ((UNIT FM01) (FR500-MAJOR M-4) (FR400-MAJOR M-1) CONDITIONAL)
(.str name "$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond")
(+ pack ACC40Sk op FRinti CCi cond ope FRintj)
(if (eq CCi (or cond 2))
--- 7685,7691 ----
name mode conv rhs1 rhs2 max min op ope comment)
(dni name
(comment)
! ((UNIT FMALL) (FR500-MAJOR M-4) (FR400-MAJOR M-1) CONDITIONAL)
(.str name "$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond")
(+ pack ACC40Sk op FRinti CCi cond ope FRintj)
(if (eq CCi (or cond 2))
***************
*** 7733,7739 ****
name mode conv rhs1 rhs2 max min op ope comment)
(dni name
(comment)
! ((UNIT FM01) (FR500-MAJOR M-4) (FR400-MAJOR M-2))
(.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk")
(+ pack ACC40Sk op FRintieven ope FRintjeven)
(if (register-unaligned ACC40Sk 2)
--- 7733,7739 ----
name mode conv rhs1 rhs2 max min op ope comment)
(dni name
(comment)
! ((UNIT FMALL) (FR500-MAJOR M-4) (FR400-MAJOR M-2))
(.str name "$pack $FRintieven,$FRintjeven,$ACC40Sk")
(+ pack ACC40Sk op FRintieven ope FRintjeven)
(if (register-unaligned ACC40Sk 2)
Index: opcodes/frv-desc.c
===================================================================
RCS file: /cvs/src/src/opcodes/frv-desc.c,v
retrieving revision 1.7
diff -c -p -r1.7 frv-desc.c
*** opcodes/frv-desc.c 3 Sep 2003 23:09:56 -0000 1.7
--- opcodes/frv-desc.c 9 Sep 2003 22:24:53 -0000
*************** static const CGEN_IBASE frv_cgen_insn_ta
*** 5804,5815 ****
/* mcpxrs$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MCPXRS, "mcpxrs", "mcpxrs", 32,
! { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
},
/* mcpxru$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MCPXRU, "mcpxru", "mcpxru", 32,
! { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
},
/* mcpxis$pack $FRinti,$FRintj,$ACC40Sk */
{
--- 5804,5815 ----
/* mcpxrs$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MCPXRS, "mcpxrs", "mcpxrs", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
},
/* mcpxru$pack $FRinti,$FRintj,$ACC40Sk */
{
FRV_INSN_MCPXRU, "mcpxru", "mcpxru", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
},
/* mcpxis$pack $FRinti,$FRintj,$ACC40Sk */
{
*************** static const CGEN_IBASE frv_cgen_insn_ta
*** 5824,5835 ****
/* cmcpxrs$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMCPXRS, "cmcpxrs", "cmcpxrs", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
},
/* cmcpxru$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMCPXRU, "cmcpxru", "cmcpxru", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
},
/* cmcpxis$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
{
--- 5824,5835 ----
/* cmcpxrs$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMCPXRS, "cmcpxrs", "cmcpxrs", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
},
/* cmcpxru$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
{
FRV_INSN_CMCPXRU, "cmcpxru", "cmcpxru", 32,
! { 0|A(CONDITIONAL), { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_1, FR500_MAJOR_M_4 } }
},
/* cmcpxis$pack $FRinti,$FRintj,$ACC40Sk,$CCi,$cond */
{
*************** static const CGEN_IBASE frv_cgen_insn_ta
*** 5844,5855 ****
/* mqcpxrs$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQCPXRS, "mqcpxrs", "mqcpxrs", 32,
! { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
},
/* mqcpxru$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQCPXRU, "mqcpxru", "mqcpxru", 32,
! { 0, { (1<<MACH_BASE), UNIT_FM01, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
},
/* mqcpxis$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
--- 5844,5855 ----
/* mqcpxrs$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQCPXRS, "mqcpxrs", "mqcpxrs", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
},
/* mqcpxru$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
FRV_INSN_MQCPXRU, "mqcpxru", "mqcpxru", 32,
! { 0, { (1<<MACH_BASE), UNIT_FMALL, FR400_MAJOR_M_2, FR500_MAJOR_M_4 } }
},
/* mqcpxis$pack $FRintieven,$FRintjeven,$ACC40Sk */
{
Index: sim/frv/frv.c
===================================================================
RCS file: /cvs/src/src/sim/frv/frv.c,v
retrieving revision 1.1
diff -c -p -r1.1 frv.c
*** sim/frv/frv.c 29 Aug 2003 16:35:46 -0000 1.1
--- sim/frv/frv.c 9 Sep 2003 22:25:02 -0000
***************
*** 1,5 ****
/* frv simulator support code
! Copyright (C) 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
Contributed by Red Hat.
This file is part of the GNU simulators.
--- 1,5 ----
/* frv simulator support code
! Copyright (C) 1998, 1999, 2000, 2001, 2003 Free Software Foundation, Inc.
Contributed by Red Hat.
This file is part of the GNU simulators.
*************** do_media_average (SIM_CPU *current_cpu,
*** 1049,1062 ****
SIM_DESC sd = CPU_STATE (current_cpu);
SI sum = (arg1 + arg2);
HI result = sum >> 1;
/* On fr400, check the rounding mode. On other machines rounding is always
toward negative infinity and the result is already correctly rounded. */
! if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_fr400)
{
/* Check whether rounding will be required. Rounding will be required
if the sum is an odd number. */
! int rounding_value = sum & 1;
if (rounding_value)
{
USI msr0 = GET_MSR (0);
--- 1049,1065 ----
SIM_DESC sd = CPU_STATE (current_cpu);
SI sum = (arg1 + arg2);
HI result = sum >> 1;
+ int rounding_value;
/* On fr400, check the rounding mode. On other machines rounding is always
toward negative infinity and the result is already correctly rounded. */
! switch (STATE_ARCHITECTURE (sd)->mach)
{
+ /* Need to check rounding mode. */
+ case bfd_mach_fr400:
/* Check whether rounding will be required. Rounding will be required
if the sum is an odd number. */
! rounding_value = sum & 1;
if (rounding_value)
{
USI msr0 = GET_MSR (0);
*************** do_media_average (SIM_CPU *current_cpu,
*** 1098,1103 ****
--- 1101,1109 ----
++result;
}
}
+ break;
+ default:
+ break;
}
return result;
2003-09-09 Dave Brolley <brolley@redhat.com>
* frv.cpu (media-dual-complex): Change UNIT to FMALL.
(conditional-media-dual-complex, media-quad-complex): Likewise.
2003-09-09 Dave Brolley <brolley@redhat.com>
* frv.c (do_media_average): Select machine using a switch.
2003-09-09 Dave Brolley <brolley@redhat.com>
* frv-desc.c: Regenerated.
2003-09-09 Dave Brolley <brolley@redhat.com>
* sim/frv/maddaccs.cgs: move to fr400 subdirectory.
* sim/frv/msubaccs.cgs: move to fr400 subdirectory.
* sim/frv/masaccs.cgs: move to fr400 subdirectory.