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Re: [submit] Fujitsu FR-V simulator
- From: Dave Brolley <brolley at redhat dot com>
- To: Michael Snyder <msnyder at redhat dot com>
- Cc: binutils at sources dot redhat dot com, gdb-patches at sources dot redhat dot com,nickc at redhat dot com, dje at transmeta dot com
- Date: Fri, 29 Aug 2003 13:11:07 -0400
- Subject: Re: [submit] Fujitsu FR-V simulator
- References: <3F441C03.3070503@redhat.com>
This submission was approved a long time ago by Andrew Cagney pending
changes to use /src/cpu/frv.cpu and /src/cpu/frv.opc. I have committed
this in addition to the following changes (see attached ChangeLogs and
patch) which were part of the original approved submission.
o Generalize the target specific fields in CGEN_WRITE_QUEUE_ELEMENT and
add frv specific accessor macro in sim/frv/frv-sim.h
o Change references to Cygnus Solutions to be rederences to Red Hat.
o Change references to "venus" to be references to "frv"
o Add some test cases which Michael missed (sim/testsuite/sim/frv/*.pcgs)
The following additional changes are also committed:
o Add code to opcodes/Makefile.am and sim/frv/Makefile.in to temporarily
copy frv.cpu and frv.opc from src/cpu to src/cgen/cpu when regenerating
files. The CGEN applications currently have no way of specifying the
location of these files.
o Remove cgen/cpu/frv.{cpu,opc} from the repository.
o Fix some of the tests cases.
I will be maintaining the FRV simulator. Please let me know if there are
any problems or concerns.
Dave
Michael Snyder wrote:
OK, even compressed, it was too big for the list server.
Let's try it in two chunks.
This is a "new" simulator for the Fujitsu FR-V architecture
(it's actually been sitting around for a while). It isn't
my work, it was done primarily by Dave Brolley and Doug Evans,
with some help from sundry.
2003-08-20 Michael Snyder <msnyder@redhat.com>
Dave Brolley <brolley@redhat.com>
* cgen-par.h (flags, word1): New target-specific
fields of CGEN_WRITE_QUEUE_ELEMENT.
(CGEN_WRITE_QUEUE_ELEMENT_FLAGS): New accessor macro.
(CGEN_WRITE_QUEUE_ELEMENT_WORD1): New accessor macro.
* gennltvals.sh: Add frv target.
* nltvals.def: Add frv target.
2003-08-20 Michael Snyder <msnyder@redhat.com>
Dave Brolley <brolley@redhat.com>
* frv/: New directory, simulator for the Fujitsu FRV.
* configure.in: Add frv configury.
* configure: Regenerate.
2003-08-20 Michael Snyder <msnyder@redhat.com>
On behalf of Dave Brolley
* sim/frv: New testsuite.
diff -cpr --exclude=CVS sim/common/cgen-par.h /home/brolley/sources/src/sim/common/cgen-par.h
*** sim/common/cgen-par.h 2003-08-28 14:13:46.000000000 -0400
--- /home/brolley/sources/src/sim/common/cgen-par.h 2003-08-28 15:12:08.000000000 -0400
*************** typedef struct {
*** 40,46 ****
enum cgen_write_queue_kind kind; /* Used to select union member below. */
IADDR insn_address; /* Address of the insn performing the write. */
unsigned32 flags; /* Target specific flags. */
! int pipe; /* Pipeline containing this insn. */
union {
struct {
BI *target;
--- 40,46 ----
enum cgen_write_queue_kind kind; /* Used to select union member below. */
IADDR insn_address; /* Address of the insn performing the write. */
unsigned32 flags; /* Target specific flags. */
! long word1; /* Target specific field. */
union {
struct {
BI *target;
*************** typedef struct {
*** 155,161 ****
#define CGEN_WRITE_QUEUE_ELEMENT_KIND(element) ((element)->kind)
#define CGEN_WRITE_QUEUE_ELEMENT_IADDR(element) ((element)->insn_address)
#define CGEN_WRITE_QUEUE_ELEMENT_FLAGS(element) ((element)->flags)
! #define CGEN_WRITE_QUEUE_ELEMENT_PIPE(element) ((element)->pipe)
extern void cgen_write_queue_element_execute (
SIM_CPU *, CGEN_WRITE_QUEUE_ELEMENT *
--- 155,161 ----
#define CGEN_WRITE_QUEUE_ELEMENT_KIND(element) ((element)->kind)
#define CGEN_WRITE_QUEUE_ELEMENT_IADDR(element) ((element)->insn_address)
#define CGEN_WRITE_QUEUE_ELEMENT_FLAGS(element) ((element)->flags)
! #define CGEN_WRITE_QUEUE_ELEMENT_WORD1(element) ((element)->word1)
extern void cgen_write_queue_element_execute (
SIM_CPU *, CGEN_WRITE_QUEUE_ELEMENT *
diff -cpr --exclude=CVS sim/frv/cache.c /home/brolley/sources/src/sim/frv/cache.c
*** sim/frv/cache.c 2003-08-28 14:13:48.000000000 -0400
--- /home/brolley/sources/src/sim/frv/cache.c 2003-08-28 14:40:50.000000000 -0400
***************
*** 1,6 ****
/* frv cache model.
Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
! Contributed by Cygnus Solutions.
This file is part of the GNU simulators.
--- 1,6 ----
/* frv cache model.
Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
! Contributed by Red Hat.
This file is part of the GNU simulators.
diff -cpr --exclude=CVS sim/frv/cache.h /home/brolley/sources/src/sim/frv/cache.h
*** sim/frv/cache.h 2003-08-28 14:13:48.000000000 -0400
--- /home/brolley/sources/src/sim/frv/cache.h 2003-08-28 14:40:50.000000000 -0400
***************
*** 1,6 ****
/* Cache support for the FRV simulator
Copyright (C) 1999, 2000 Free Software Foundation, Inc.
! Contributed by Cygnus Solutions.
This file is part of the GNU Simulators.
--- 1,6 ----
/* Cache support for the FRV simulator
Copyright (C) 1999, 2000 Free Software Foundation, Inc.
! Contributed by Red Hat.
This file is part of the GNU Simulators.
diff -cpr --exclude=CVS sim/frv/devices.c /home/brolley/sources/src/sim/frv/devices.c
*** sim/frv/devices.c 2003-08-28 14:13:53.000000000 -0400
--- /home/brolley/sources/src/sim/frv/devices.c 2003-08-28 14:40:55.000000000 -0400
***************
*** 1,6 ****
/* frv device support
Copyright (C) 1998, 1999 Free Software Foundation, Inc.
! Contributed by Cygnus Solutions.
This file is part of the GNU simulators.
--- 1,6 ----
/* frv device support
Copyright (C) 1998, 1999 Free Software Foundation, Inc.
! Contributed by Red Hat.
This file is part of the GNU simulators.
diff -cpr --exclude=CVS sim/frv/frv.c /home/brolley/sources/src/sim/frv/frv.c
*** sim/frv/frv.c 2003-08-28 14:13:53.000000000 -0400
--- /home/brolley/sources/src/sim/frv/frv.c 2003-08-28 14:40:56.000000000 -0400
***************
*** 1,6 ****
/* frv simulator support code
Copyright (C) 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
! Contributed by Cygnus Solutions.
This file is part of the GNU simulators.
--- 1,6 ----
/* frv simulator support code
Copyright (C) 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
! Contributed by Red Hat.
This file is part of the GNU simulators.
diff -cpr --exclude=CVS sim/frv/frv-sim.h /home/brolley/sources/src/sim/frv/frv-sim.h
*** sim/frv/frv-sim.h 2003-08-28 14:13:53.000000000 -0400
--- /home/brolley/sources/src/sim/frv/frv-sim.h 2003-08-28 15:12:08.000000000 -0400
***************
*** 1,6 ****
/* collection of junk waiting time to sort out
Copyright (C) 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
! Contributed by Cygnus Solutions.
This file is part of the GNU Simulators.
--- 1,6 ----
/* collection of junk waiting time to sort out
Copyright (C) 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
! Contributed by Red Hat.
This file is part of the GNU Simulators.
*************** USI frv_rett (SIM_CPU *current_cpu, PCAD
*** 748,753 ****
--- 748,755 ----
/* Parallel write queue flags. */
#define FRV_WRITE_QUEUE_FORCE_WRITE 1
+ #define CGEN_WRITE_QUEUE_ELEMENT_PIPE(element) CGEN_WRITE_QUEUE_ELEMENT_WORD1 (element)
+
/* Functions and macros for handling non-excepting instruction side effects.
Get and set the hardware directly, since we may be getting/setting fields
which are not accessible to the user. */
diff -cpr --exclude=CVS sim/frv/interrupts.c /home/brolley/sources/src/sim/frv/interrupts.c
*** sim/frv/interrupts.c 2003-08-28 14:13:53.000000000 -0400
--- /home/brolley/sources/src/sim/frv/interrupts.c 2003-08-28 14:40:56.000000000 -0400
***************
*** 1,6 ****
/* frv exception and interrupt support
Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
! Contributed by Cygnus Solutions.
This file is part of the GNU simulators.
--- 1,6 ----
/* frv exception and interrupt support
Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
! Contributed by Red Hat.
This file is part of the GNU simulators.
diff -cpr --exclude=CVS sim/frv/Makefile.in /home/brolley/sources/src/sim/frv/Makefile.in
*** sim/frv/Makefile.in 2003-08-28 14:13:47.000000000 -0400
--- /home/brolley/sources/src/sim/frv/Makefile.in 2003-08-28 18:10:03.000000000 -0400
***************
*** 1,6 ****
# Makefile template for Configure for the frv simulator
# Copyright (C) 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
! # Contributed by Cygnus Solutions.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
--- 1,6 ----
# Makefile template for Configure for the frv simulator
# Copyright (C) 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
! # Contributed by Red Hat.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
*************** CGEN_MAINT = ; @true
*** 110,127 ****
# The following line is commented in or out depending upon --enable-cgen-maint.
@CGEN_MAINT@CGEN_MAINT =
! stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CGEN_CPU_DIR)/frv.cpu
$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
FLAGS="with-scache"
touch stamp-arch
arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
# @true
! stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/frv.cpu
$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
cpu=frvbf mach=frv,fr500,fr400,tomcat,simple SUFFIX= \
FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" \
EXTRAFILES="$(CGEN_CPU_SEM)"
touch stamp-cpu
cpu.h sem.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
# @true
--- 110,133 ----
# The following line is commented in or out depending upon --enable-cgen-maint.
@CGEN_MAINT@CGEN_MAINT =
! stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(srcdir)/../../cpu/frv.cpu
! cp -fp $(srcdir)/../../cpu/frv.cpu $(CGEN_CPU_DIR)/frv.cpu
$(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
FLAGS="with-scache"
+ rm -f $(CGEN_CPU_DIR)/frv.cpu
touch stamp-arch
arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
# @true
! # .cpu and .opc files for frv are kept in a different directory, but cgen has no switch to specify that location, so
! # copy those file to the regular place.
! stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(srcdir)/../../cpu/frv.cpu
! cp -fp $(srcdir)/../../cpu/frv.cpu $(CGEN_CPU_DIR)/frv.cpu
$(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
cpu=frvbf mach=frv,fr500,fr400,tomcat,simple SUFFIX= \
FLAGS="with-scache with-profile=fn with-generic-write with-parallel-only" \
EXTRAFILES="$(CGEN_CPU_SEM)"
+ rm -f $(CGEN_CPU_DIR)/frv.cpu
touch stamp-cpu
cpu.h sem.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
# @true
diff -cpr --exclude=CVS sim/frv/memory.c /home/brolley/sources/src/sim/frv/memory.c
*** sim/frv/memory.c 2003-08-28 14:13:53.000000000 -0400
--- /home/brolley/sources/src/sim/frv/memory.c 2003-08-28 14:40:56.000000000 -0400
***************
*** 1,6 ****
/* frv memory model.
Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
! Contributed by Cygnus Solutions.
This file is part of the GNU simulators.
--- 1,6 ----
/* frv memory model.
Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
! Contributed by Red Hat.
This file is part of the GNU simulators.
diff -cpr --exclude=CVS sim/frv/mloop.in /home/brolley/sources/src/sim/frv/mloop.in
*** sim/frv/mloop.in 2003-08-28 14:13:54.000000000 -0400
--- /home/brolley/sources/src/sim/frv/mloop.in 2003-08-28 14:40:57.000000000 -0400
***************
*** 1,6 ****
# Simulator main loop for frv. -*- C -*-
# Copyright (C) 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
! # Contributed by Cygnus Solutions.
#
# This file is part of the GNU Simulators.
#
--- 1,6 ----
# Simulator main loop for frv. -*- C -*-
# Copyright (C) 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
! # Contributed by Red Hat.
#
# This file is part of the GNU Simulators.
#
diff -cpr --exclude=CVS sim/frv/options.c /home/brolley/sources/src/sim/frv/options.c
*** sim/frv/options.c 2003-08-28 14:13:57.000000000 -0400
--- /home/brolley/sources/src/sim/frv/options.c 2003-08-28 14:41:01.000000000 -0400
***************
*** 1,6 ****
/* FRV simulator memory option handling.
Copyright (C) 1999, 2000 Free Software Foundation, Inc.
! Contributed by Cygnus Solutions.
This file is part of GDB, the GNU debugger.
--- 1,6 ----
/* FRV simulator memory option handling.
Copyright (C) 1999, 2000 Free Software Foundation, Inc.
! Contributed by Red Hat.
This file is part of GDB, the GNU debugger.
diff -cpr --exclude=CVS sim/frv/pipeline.c /home/brolley/sources/src/sim/frv/pipeline.c
*** sim/frv/pipeline.c 2003-08-28 14:13:57.000000000 -0400
--- /home/brolley/sources/src/sim/frv/pipeline.c 2003-08-28 14:41:01.000000000 -0400
***************
*** 1,6 ****
/* frv vliw model.
Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
! Contributed by Cygnus Solutions.
This file is part of the GNU simulators.
--- 1,6 ----
/* frv vliw model.
Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
! Contributed by Red Hat.
This file is part of the GNU simulators.
diff -cpr --exclude=CVS sim/frv/profile-fr400.h /home/brolley/sources/src/sim/frv/profile-fr400.h
*** sim/frv/profile-fr400.h 2003-08-28 14:13:58.000000000 -0400
--- /home/brolley/sources/src/sim/frv/profile-fr400.h 2003-08-28 14:41:02.000000000 -0400
***************
*** 1,6 ****
/* Profiling definitions for the fr400 model of the FRV simulator
Copyright (C) 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
! Contributed by Cygnus Solutions.
This file is part of the GNU Simulators.
--- 1,6 ----
/* Profiling definitions for the fr400 model of the FRV simulator
Copyright (C) 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
! Contributed by Red Hat.
This file is part of the GNU Simulators.
diff -cpr --exclude=CVS sim/frv/profile-fr500.h /home/brolley/sources/src/sim/frv/profile-fr500.h
*** sim/frv/profile-fr500.h 2003-08-28 14:13:58.000000000 -0400
--- /home/brolley/sources/src/sim/frv/profile-fr500.h 2003-08-28 14:41:03.000000000 -0400
***************
*** 1,6 ****
/* Profiling definitions for the fr500 model of the FRV simulator
Copyright (C) 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
! Contributed by Cygnus Solutions.
This file is part of the GNU Simulators.
--- 1,6 ----
/* Profiling definitions for the fr500 model of the FRV simulator
Copyright (C) 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
! Contributed by Red Hat.
This file is part of the GNU Simulators.
diff -cpr --exclude=CVS sim/frv/profile.h /home/brolley/sources/src/sim/frv/profile.h
*** sim/frv/profile.h 2003-08-28 14:13:58.000000000 -0400
--- /home/brolley/sources/src/sim/frv/profile.h 2003-08-28 14:41:04.000000000 -0400
***************
*** 1,6 ****
/* Profiling definitions for the FRV simulator
Copyright (C) 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
! Contributed by Cygnus Solutions.
This file is part of the GNU Simulators.
--- 1,6 ----
/* Profiling definitions for the FRV simulator
Copyright (C) 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
! Contributed by Red Hat.
This file is part of the GNU Simulators.
diff -cpr --exclude=CVS sim/frv/registers.c /home/brolley/sources/src/sim/frv/registers.c
*** sim/frv/registers.c 2003-08-28 14:13:58.000000000 -0400
--- /home/brolley/sources/src/sim/frv/registers.c 2003-08-28 14:41:04.000000000 -0400
***************
*** 1,6 ****
/* frv simulator support code
Copyright (C) 2000, 2001 Free Software Foundation, Inc.
! Contributed by Cygnus Solutions.
This file is part of the GNU simulators.
--- 1,6 ----
/* frv simulator support code
Copyright (C) 2000, 2001 Free Software Foundation, Inc.
! Contributed by Red Hat.
This file is part of the GNU simulators.
diff -cpr --exclude=CVS sim/frv/registers.h /home/brolley/sources/src/sim/frv/registers.h
*** sim/frv/registers.h 2003-08-28 14:13:59.000000000 -0400
--- /home/brolley/sources/src/sim/frv/registers.h 2003-08-28 14:41:05.000000000 -0400
***************
*** 1,6 ****
/* Register definitions for the FRV simulator
Copyright (C) 2000 Free Software Foundation, Inc.
! Contributed by Cygnus Solutions.
This file is part of the GNU Simulators.
--- 1,6 ----
/* Register definitions for the FRV simulator
Copyright (C) 2000 Free Software Foundation, Inc.
! Contributed by Red Hat.
This file is part of the GNU Simulators.
diff -cpr --exclude=CVS sim/frv/reset.c /home/brolley/sources/src/sim/frv/reset.c
*** sim/frv/reset.c 2003-08-28 14:13:59.000000000 -0400
--- /home/brolley/sources/src/sim/frv/reset.c 2003-08-28 14:41:05.000000000 -0400
***************
*** 1,6 ****
/* frv simulator support code
Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
! Contributed by Cygnus Solutions.
This file is part of the GNU simulators.
--- 1,6 ----
/* frv simulator support code
Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
! Contributed by Red Hat.
This file is part of the GNU simulators.
diff -cpr --exclude=CVS sim/frv/sim-if.c /home/brolley/sources/src/sim/frv/sim-if.c
*** sim/frv/sim-if.c 2003-08-28 14:14:00.000000000 -0400
--- /home/brolley/sources/src/sim/frv/sim-if.c 2003-08-28 14:41:07.000000000 -0400
***************
*** 1,6 ****
/* Main simulator entry points specific to the FRV.
Copyright (C) 1998, 1999, 2000 Free Software Foundation, Inc.
! Contributed by Cygnus Solutions.
This file is part of the GNU simulators.
--- 1,6 ----
/* Main simulator entry points specific to the FRV.
Copyright (C) 1998, 1999, 2000 Free Software Foundation, Inc.
! Contributed by Red Hat.
This file is part of the GNU simulators.
diff -cpr --exclude=CVS sim/frv/sim-main.h /home/brolley/sources/src/sim/frv/sim-main.h
*** sim/frv/sim-main.h 2003-08-28 14:14:01.000000000 -0400
--- /home/brolley/sources/src/sim/frv/sim-main.h 2003-08-28 14:41:07.000000000 -0400
***************
*** 1,6 ****
/* frv simulator support code
Copyright (C) 1998, 2000, 2001 Free Software Foundation, Inc.
! Contributed by Cygnus Solutions.
This file is part of the GNU simulators.
--- 1,6 ----
/* frv simulator support code
Copyright (C) 1998, 2000, 2001 Free Software Foundation, Inc.
! Contributed by Red Hat.
This file is part of the GNU simulators.
diff -cpr --exclude=CVS sim/frv/traps.c /home/brolley/sources/src/sim/frv/traps.c
*** sim/frv/traps.c 2003-08-28 14:14:01.000000000 -0400
--- /home/brolley/sources/src/sim/frv/traps.c 2003-08-28 14:41:08.000000000 -0400
***************
*** 1,6 ****
/* frv trap support
Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
! Contributed by Cygnus Solutions.
This file is part of the GNU simulators.
--- 1,6 ----
/* frv trap support
Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
! Contributed by Red Hat.
This file is part of the GNU simulators.
diff -cpr --exclude=CVS sim/testsuite/sim/frv/break.cgs /home/brolley/sources/src/sim/testsuite/sim/frv/break.cgs
*** sim/testsuite/sim/frv/break.cgs 2003-08-28 14:14:17.000000000 -0400
--- /home/brolley/sources/src/sim/testsuite/sim/frv/break.cgs 2003-08-28 15:12:09.000000000 -0400
***************
*** 1,4 ****
! # venus testcase for break
# mach: all
.include "testutils.inc"
--- 1,4 ----
! # FRV testcase for break
# mach: all
.include "testutils.inc"
diff -cpr --exclude=CVS sim/testsuite/sim/frv/dcf.cgs /home/brolley/sources/src/sim/testsuite/sim/frv/dcf.cgs
*** sim/testsuite/sim/frv/dcf.cgs 2003-08-28 14:15:03.000000000 -0400
--- /home/brolley/sources/src/sim/testsuite/sim/frv/dcf.cgs 2003-08-28 15:12:09.000000000 -0400
***************
*** 1,4 ****
! # venus testcase for dcf @(GRi,GRj)
# mach: all
.include "testutils.inc"
--- 1,4 ----
! # FRV testcase for dcf @(GRi,GRj)
# mach: all
.include "testutils.inc"
diff -cpr --exclude=CVS sim/testsuite/sim/frv/dci.cgs /home/brolley/sources/src/sim/testsuite/sim/frv/dci.cgs
*** sim/testsuite/sim/frv/dci.cgs 2003-08-28 14:15:03.000000000 -0400
--- /home/brolley/sources/src/sim/testsuite/sim/frv/dci.cgs 2003-08-28 15:12:09.000000000 -0400
***************
*** 1,4 ****
! # venus testcase for dci @(GRi,GRj)
# mach: all
.include "testutils.inc"
--- 1,4 ----
! # FRV testcase for dci @(GRi,GRj)
# mach: all
.include "testutils.inc"
diff -cpr --exclude=CVS sim/testsuite/sim/frv/fr500/dcpl.cgs /home/brolley/sources/src/sim/testsuite/sim/frv/fr500/dcpl.cgs
*** sim/testsuite/sim/frv/fr500/dcpl.cgs 2003-08-28 14:17:36.000000000 -0400
--- /home/brolley/sources/src/sim/testsuite/sim/frv/fr500/dcpl.cgs 2003-08-28 15:12:10.000000000 -0400
***************
*** 1,4 ****
! # venus testcase for dcpl GRi,GRj,lock
# mach: all
.include "../testutils.inc"
--- 1,4 ----
! # FRV testcase for dcpl GRi,GRj,lock
# mach: all
.include "../testutils.inc"
diff -cpr --exclude=CVS sim/testsuite/sim/frv/fr500/dcul.cgs /home/brolley/sources/src/sim/testsuite/sim/frv/fr500/dcul.cgs
*** sim/testsuite/sim/frv/fr500/dcul.cgs 2003-08-28 14:17:37.000000000 -0400
--- /home/brolley/sources/src/sim/testsuite/sim/frv/fr500/dcul.cgs 2003-08-28 15:12:10.000000000 -0400
***************
*** 1,4 ****
! # venus testcase for dcul GRi
# mach: all
.include "../testutils.inc"
--- 1,4 ----
! # FRV testcase for dcul GRi
# mach: all
.include "../testutils.inc"
diff -cpr --exclude=CVS sim/testsuite/sim/frv/ici.cgs /home/brolley/sources/src/sim/testsuite/sim/frv/ici.cgs
*** sim/testsuite/sim/frv/ici.cgs 2003-08-28 14:15:40.000000000 -0400
--- /home/brolley/sources/src/sim/testsuite/sim/frv/ici.cgs 2003-08-28 15:12:11.000000000 -0400
***************
*** 1,4 ****
! # venus testcase for ici @(GRi,GRj)
# mach: all
.include "testutils.inc"
--- 1,4 ----
! # FRV testcase for ici @(GRi,GRj)
# mach: all
.include "testutils.inc"
diff -cpr --exclude=CVS sim/testsuite/sim/frv/icpl.cgs /home/brolley/sources/src/sim/testsuite/sim/frv/icpl.cgs
*** sim/testsuite/sim/frv/icpl.cgs 2003-08-28 14:15:41.000000000 -0400
--- /home/brolley/sources/src/sim/testsuite/sim/frv/icpl.cgs 2003-08-28 15:12:11.000000000 -0400
***************
*** 1,4 ****
! # venus testcase for icpl GRi,GRj,lock
# mach: all
.include "testutils.inc"
--- 1,4 ----
! # FRV testcase for icpl GRi,GRj,lock
# mach: all
.include "testutils.inc"
diff -cpr --exclude=CVS sim/testsuite/sim/frv/icul.cgs /home/brolley/sources/src/sim/testsuite/sim/frv/icul.cgs
*** sim/testsuite/sim/frv/icul.cgs 2003-08-28 14:15:41.000000000 -0400
--- /home/brolley/sources/src/sim/testsuite/sim/frv/icul.cgs 2003-08-28 15:12:11.000000000 -0400
***************
*** 1,4 ****
! # venus testcase for icul $GRi
# mach: all
.include "testutils.inc"
--- 1,4 ----
! # FRV testcase for icul $GRi
# mach: all
.include "testutils.inc"
diff -cpr --exclude=CVS sim/testsuite/sim/frv/interrupts/illinsn.cgs /home/brolley/sources/src/sim/testsuite/sim/frv/interrupts/illinsn.cgs
*** sim/testsuite/sim/frv/interrupts/illinsn.cgs 2003-08-28 14:17:41.000000000 -0400
--- /home/brolley/sources/src/sim/testsuite/sim/frv/interrupts/illinsn.cgs 2003-08-28 15:12:12.000000000 -0400
***************
*** 1,4 ****
! # venus testcase
# mach: fr500 fr400
.include "testutils.inc"
--- 1,4 ----
! # FRV testcase
# mach: fr500 fr400
.include "testutils.inc"
diff -cpr --exclude=CVS sim/testsuite/sim/frv/interrupts/Ipipe.cgs /home/brolley/sources/src/sim/testsuite/sim/frv/interrupts/Ipipe.cgs
*** sim/testsuite/sim/frv/interrupts/Ipipe.cgs 2003-08-28 14:17:39.000000000 -0400
--- /home/brolley/sources/src/sim/testsuite/sim/frv/interrupts/Ipipe.cgs 2003-08-28 15:12:12.000000000 -0400
***************
*** 1,4 ****
! # venus testcase
# mach: fr400,fr500
.include "testutils.inc"
--- 1,4 ----
! # FRV testcase
# mach: fr400,fr500
.include "testutils.inc"
diff -cpr --exclude=CVS sim/testsuite/sim/frv/interrupts/mp_exception.cgs /home/brolley/sources/src/sim/testsuite/sim/frv/interrupts/mp_exception.cgs
*** sim/testsuite/sim/frv/interrupts/mp_exception.cgs 2003-08-28 14:17:41.000000000 -0400
--- /home/brolley/sources/src/sim/testsuite/sim/frv/interrupts/mp_exception.cgs 2003-08-28 17:04:20.000000000 -0400
***************
*** 1,5 ****
--- 1,11 ----
# frv testcase for mp_exception
# mach: fr500 frv
+ # xerror:
+
+ # This program no longer assembles because the assembler
+ # now detects the unaligned registers. For this reason
+ # this test is now marked as "xerror" and prints the
+ # expected message "fail"
.include "testutils.inc"
***************
*** 7,12 ****
--- 13,21 ----
.global mp_exception
mpx:
+ .if 1
+ fail
+ .else
or_spr_immed 2,msr0 ; Set msr0.ovf
or_spr_immed 2,msr1 ; Set msr1.ovf
and_spr_immed 0xffff8fff,msr0 ; Clear msr0.mtt
*************** mpx:
*** 277,279 ****
--- 286,289 ----
test_spr_bits 0x0002,1,1,msr1 ; msr1.ovf still set
pass
+ .endif
diff -cpr --exclude=CVS sim/testsuite/sim/frv/interrupts/shadow_regs.cgs /home/brolley/sources/src/sim/testsuite/sim/frv/interrupts/shadow_regs.cgs
*** sim/testsuite/sim/frv/interrupts/shadow_regs.cgs 2003-08-28 14:17:42.000000000 -0400
--- /home/brolley/sources/src/sim/testsuite/sim/frv/interrupts/shadow_regs.cgs 2003-08-28 15:12:12.000000000 -0400
***************
*** 1,4 ****
! # venus testcase for handling of shadow registers SR0-SR4
# mach: frv
.include "testutils.inc"
--- 1,4 ----
! # FRV testcase for handling of shadow registers SR0-SR4
# mach: frv
.include "testutils.inc"
diff -cpr --exclude=CVS sim/testsuite/sim/frv/mdrotli.cgs /home/brolley/sources/src/sim/testsuite/sim/frv/mdrotli.cgs
*** sim/testsuite/sim/frv/mdrotli.cgs 2003-08-28 14:16:04.000000000 -0400
--- /home/brolley/sources/src/sim/testsuite/sim/frv/mdrotli.cgs 2003-08-28 17:04:20.000000000 -0400
***************
*** 9,15 ****
mdrotli:
set_fr_iimmed 0,2,fr8
set_fr_iimmed 0,2,fr9
! mdrotli fr8,0x20,fr8 ; Shift by 0
test_fr_iimmed 2,fr8
test_fr_iimmed 2,fr9
--- 9,15 ----
mdrotli:
set_fr_iimmed 0,2,fr8
set_fr_iimmed 0,2,fr9
! mdrotli fr8,-32,fr8 ; Shift by 0
test_fr_iimmed 2,fr8
test_fr_iimmed 2,fr9