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[applied mips sim patch] tweak cp1.c formatting a little bit
- From: cgd at broadcom dot com
- To: gdb-patches at sources dot redhat dot com
- Cc: cgd at broadcom dot com
- Date: Fri, 7 Jun 2002 09:44:00 -0700 (PDT)
- Subject: [applied mips sim patch] tweak cp1.c formatting a little bit
2002-06-07 Chris Demetriou <cgd@broadcom.com>
* cp1.c: Clean up formatting of a few comments.
(value_fpr): Reformat switch statement.
Index: cp1.c
===================================================================
RCS file: /cvs/src/src/sim/mips/cp1.c,v
retrieving revision 1.12
diff -u -p -r1.12 cp1.c
--- cp1.c 7 Jun 2002 00:13:23 -0000 1.12
+++ cp1.c 7 Jun 2002 16:42:45 -0000
@@ -127,25 +127,11 @@ value_fpr (sim_cpu *cpu,
/* Set QNaN value: */
switch (fmt)
{
- case fmt_single:
- value = FPQNaN_SINGLE;
- break;
-
- case fmt_double:
- value = FPQNaN_DOUBLE;
- break;
-
- case fmt_word:
- value = FPQNaN_WORD;
- break;
-
- case fmt_long:
- value = FPQNaN_LONG;
- break;
-
- default:
- err = -1;
- break;
+ case fmt_single: value = FPQNaN_SINGLE; break;
+ case fmt_double: value = FPQNaN_DOUBLE; break;
+ case fmt_word: value = FPQNaN_WORD; break;
+ case fmt_long: value = FPQNaN_LONG; break;
+ default: err = -1; break;
}
}
else if (SizeFGR () == 64)
@@ -182,7 +168,7 @@ value_fpr (sim_cpu *cpu,
case fmt_long:
if ((fpr & 1) == 0)
{
- /* even registers only */
+ /* Even registers numbers only. */
#ifdef DEBUG
printf ("DBG: ValueFPR: FGR[%d] = %s, FGR[%d] = %s\n",
fpr + 1, pr_uword64 ((uword64) FGR[fpr+1]),
@@ -280,7 +266,7 @@ store_fpr (sim_cpu *cpu,
case fmt_long:
if ((fpr & 1) == 0)
{
- /* even register number only */
+ /* Even register numbers only. */
FGR[fpr+1] = (value >> 32);
FGR[fpr] = (value & 0xFFFFFFFF);
FPR_STATE[fpr + 1] = fmt;