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RFA: AIX 64-bit mega-patch
- To: gdb-patches at sourceware dot cygnus dot com
- Subject: RFA: AIX 64-bit mega-patch
- From: Nick Duffek <nsd at redhat dot com>
- Date: Thu, 8 Jun 2000 21:40:46 -0400
The appended patch implements 64-bit AIX support using the multi-arch
framework.
In 32-bit mode, there are no test suite regressions and many progressions.
There are a number of 64-bit failures that I'm in the process of fixing.
The patch tries to set the current architecture from the current core file
if there is one and from the current target machine otherwise. There's an
obscure problem with this: if "core-file <file>" is entered while an
inferior process exists, the architecture should remain the same until the
process exits, at which point the architecture should switch to that of
the core file. Instead, the architecture is immediately switched to that
of the core file.
One way to fix that would be to postpone the set_gdbarch_from_file() in
core_open() if !ontop. I haven't attempted such a fix.
The patch relies on some BFD changes that I'll be posting to the binutils
mailing list in a few minutes.
Okay to apply? If there are no major problems, I'd prefer to commit this
as-is and then address any issues with follow-on patches.
Nick Duffek
nsd@redhat.com
2000-06-08 Nicholas Duffek <nsd@redhat.com>
* rs6000-tdep.c: Changes throughout for multi-arch 64-bit
support. Incorporate most of tm-rs6000.h.
(find_toc_address_hook): Rename to rs6000_find_toc_address_hook.
(rs6000_set_host_arch_hook): Declare.
(read_memory_addr): Define.
(branch_dest, rs6000_pop_frame, rs6000_skip_trampoline_code,
rs6000_frame_saved_pc, frame_get_saved_regs,
frame_initial_stack_address, rs6000_frame_chain,
rs6000_convert_from_func_ptr_addr): Call read_memory_addr instead
of read_memory_integer.
(branch_dest, rs6000_pop_frame, rs6000_push_arguments,
rs6000_skip_trampoline_code, rs6000_frame_saved_pc,
frame_get_saved_regs, frame_initial_stack_address,
rs6000_frame_chain): Replace 4 with TDEP->wordsize.
(skip_prologue): Recognize some 64-bit stack adjustments.
(pop_dummy_frame): Rename to rs6000_pop_dummy_frame.
(dummy_init): New function.
(frame_get_saved_regs): Manipulate saved register addresses using
CORE_ADDR instead of int.
(rs6000_create_inferior): New function.
(register_names_*[]): Change to struct reg registers_*[].
(variants[]): Assimilate into multi-arch approach.
(set_processor): Obsolete due to multi-arch; delete.
(show_processor): Likewise.
* rs6000-nat.c: Ubiquitous changes for 64-bit support.
(vmap_secs, xcoff_relocate_symtab): Cast addresses
to unsigned long to avoid sign-extension errors.
(set_host_arch): New function.
(xcoff_relocate_symtab): Try disabling usleep(36000) workaround.
(rs6000_core_fns): Use new bfd_target_xcoff_flavour.
(_initialize_core_rs6000): Initialize rs6000_set_host_arch_hook.
* symfile.c (find_sym_fns): Remove special xcoff kludge.
* xcoffread.c (secnum_to_bfd_section): Initialize args.objfile.
(process_linenos): Query line struct size from coff
backend instead of using compile-time constant.
(enter_line_range): Likewise.
(read_xcoff_symtab): Pass "XCOFF64" instead of "XCOFF" to
record_debugformat() if appropriate.
(process_xcoff_symbol): Access symbol addresses using
SYMBOL_VALUE_ADDRESS instead of SYMBOL_VALUE.
(read_symbol_lineno): Retrieve XCOFF64 symbol names from strtbl.
(scan_xcoff_symtab): Likewise. Query syment struct size from
coff backend instead of using compile-time constant.
(xcoff_sym_fns): Set flavour to bfd_target_xcoff_flavour.
* Makefile.in (INTERNAL_LDFLAGS): Add $(MH_LDFLAGS) to list of flags
that this Makefile variable get set to. (From Kevin Buettner.)
* config/powerpc/aix.mh (MH_LDFLAGS): Add linker flags so that
the TOC doesn't overflow. (From Kevin Buettner.)
* config/powerpc/tm-ppc-aix.h: Move config decisions to
multi-arched rs6000-tdep.c.
* config/rs6000/tm-rs6000.h: Likewise.
(GDB_MULTI_ARCH): Define.
(skip_trampoline_code): Rename to rs6000_skip_trampoline_code.
(is_magic_function_pointer): Replace with
rs6000_convert_from_func_ptr_addr.
(TARGET_CREATE_INFERIOR_HOOK): Define.
(find_toc_address_hook): Rename to rs6000_find_toc_address_hook.
(rs6000_set_host_arch_hook): Declare.
* config/rs6000/nm-rs6000.h (CHILD_XFER_MEMORY): Define.
Index: gdb/Makefile.in
===================================================================
diff -u gdb/Makefile.in gdb/Makefile.in
--- gdb/Makefile.in Thu Jun 8 13:07:07 2000
+++ gdb/Makefile.in Thu Jun 8 13:06:14 2000
@@ -299,7 +299,7 @@
# Profiling options need to go here to work.
# I think it's perfectly reasonable for a user to set -pg in CFLAGS
# and have it work; that's why CFLAGS is here.
-INTERNAL_LDFLAGS = $(CFLAGS) $(GLOBAL_CFLAGS) $(PROFILE_CFLAGS) $(LDFLAGS) $(CONFIG_LDFLAGS) @HLDFLAGS@
+INTERNAL_LDFLAGS = $(CFLAGS) $(GLOBAL_CFLAGS) $(PROFILE_CFLAGS) $(MH_LDFLAGS) $(LDFLAGS) $(CONFIG_LDFLAGS) @HLDFLAGS@
HLDENV = @HLDENV@
# If your system is missing alloca(), or, more likely, it's there but
Index: gdb/config/powerpc/aix.mh
===================================================================
diff -u gdb/config/powerpc/aix.mh gdb/config/powerpc/aix.mh
--- gdb/config/powerpc/aix.mh Thu Jun 8 13:07:08 2000
+++ gdb/config/powerpc/aix.mh Thu Jun 8 13:06:14 2000
@@ -9,3 +9,6 @@
# When compiled with cc, for debugging, this argument should be passed.
# We have no idea who our current compiler is though, so we skip it.
# MH_CFLAGS = -bnodelcsect
+
+# gdb is too big for all of its external symbols to fit in a small TOC
+MH_LDFLAGS = -Wl,-bbigtoc
Index: gdb/config/powerpc/tm-ppc-aix.h
===================================================================
diff -u gdb/config/powerpc/tm-ppc-aix.h gdb/config/powerpc/tm-ppc-aix.h
--- gdb/config/powerpc/tm-ppc-aix.h Thu Jun 8 13:07:09 2000
+++ gdb/config/powerpc/tm-ppc-aix.h Thu Jun 8 13:06:15 2000
@@ -24,23 +24,4 @@
/* Use generic RS6000 definitions. */
#include "rs6000/tm-rs6000.h"
-#define GDB_TARGET_POWERPC
-
-#undef PUSH_DUMMY_FRAME
-#define PUSH_DUMMY_FRAME generic_push_dummy_frame ()
-
-#define PUSH_RETURN_ADDRESS(PC, SP) ppc_push_return_address (PC, SP)
-
-/* override the standard get_saved_register function with
- one that takes account of generic CALL_DUMMY frames */
-#define GET_SAVED_REGISTER(raw_buffer, optimized, addrp, frame, regnum, lval) \
- generic_get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lval)
-
-#define USE_GENERIC_DUMMY_FRAMES 1
-#define CALL_DUMMY_BREAKPOINT_OFFSET (0)
-#define CALL_DUMMY_LOCATION AT_ENTRY_POINT
-#define CALL_DUMMY_ADDRESS() entry_point_address ()
-#undef CALL_DUMMY_START_OFFSET
-#define CALL_DUMMY_START_OFFSET 0
-
#endif /* TM_PPC_AIX_H */
Index: gdb/config/rs6000/nm-rs6000.h
===================================================================
diff -u gdb/config/rs6000/nm-rs6000.h gdb/config/rs6000/nm-rs6000.h
--- gdb/config/rs6000/nm-rs6000.h Thu Jun 8 13:07:11 2000
+++ gdb/config/rs6000/nm-rs6000.h Thu Jun 8 13:06:15 2000
@@ -29,6 +29,10 @@
#define FETCH_INFERIOR_REGISTERS
+/* Override child_xfer_memory in infptrace.c. */
+
+#define CHILD_XFER_MEMORY
+
/* When a child process is just starting, we sneak in and relocate
the symbol table (and other stuff) after the dynamic linker has
figured out where they go. */
Index: gdb/config/rs6000/tm-rs6000.h
===================================================================
diff -u gdb/config/rs6000/tm-rs6000.h gdb/config/rs6000/tm-rs6000.h
--- gdb/config/rs6000/tm-rs6000.h Thu Jun 8 13:07:15 2000
+++ gdb/config/rs6000/tm-rs6000.h Thu Jun 8 13:06:15 2000
@@ -20,10 +20,7 @@
Foundation, Inc., 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */
-/* Forward decls for prototypes */
-struct frame_info;
-struct type;
-struct value;
+#define GDB_MULTI_ARCH 1
/* Minimum possible text address in AIX */
@@ -34,83 +31,16 @@
#define PC_LOAD_SEGMENT(PC) pc_load_segment_name(PC)
extern char *pc_load_segment_name (CORE_ADDR);
-/* AIX cc seems to get this right. */
-
-#define BELIEVE_PCC_PROMOTION 1
-
-/* return true if a given `pc' value is in `call dummy' function. */
-/* FIXME: This just checks for the end of the stack, which is broken
- for things like stepping through gcc nested function stubs. */
-#define PC_IN_CALL_DUMMY(STOP_PC, STOP_SP, STOP_FRAME_ADDR) \
- (STOP_SP < STOP_PC && STOP_PC < STACK_END_ADDR)
-
-#if 0
-extern unsigned int text_start, data_start;
-extern char *corefile;
-#endif
-extern int inferior_pid;
-
-/* We are missing register descriptions in the system header files. Sigh! */
-
-struct regs
- {
- int gregs[32]; /* general purpose registers */
- int pc; /* program conter */
- int ps; /* processor status, or machine state */
- };
-
-struct fp_status
- {
- double fpregs[32]; /* floating GP registers */
- };
-
-
-/* To be used by skip_prologue. */
-
-struct rs6000_framedata
- {
- int offset; /* total size of frame --- the distance
- by which we decrement sp to allocate
- the frame */
- int saved_gpr; /* smallest # of saved gpr */
- int saved_fpr; /* smallest # of saved fpr */
- int alloca_reg; /* alloca register number (frame ptr) */
- char frameless; /* true if frameless functions. */
- char nosavedpc; /* true if pc not saved. */
- int gpr_offset; /* offset of saved gprs from prev sp */
- int fpr_offset; /* offset of saved fprs from prev sp */
- int lr_offset; /* offset of saved lr */
- int cr_offset; /* offset of saved cr */
- };
-
-/* Define the byte order of the machine. */
-
-#define TARGET_BYTE_ORDER_DEFAULT BIG_ENDIAN
-
/* AIX's assembler doesn't grok dollar signs in identifiers.
So we use dots instead. This item must be coordinated with G++. */
#undef CPLUS_MARKER
#define CPLUS_MARKER '.'
-/* Offset from address of function to start of its code.
- Zero on most machines. */
-
-#define FUNCTION_START_OFFSET 0
-
-/* Advance PC across any function entry prologue instructions
- to reach some "real" code. */
-
-extern CORE_ADDR rs6000_skip_prologue (CORE_ADDR);
-#define SKIP_PROLOGUE(pc) (rs6000_skip_prologue (pc))
-
-extern CORE_ADDR skip_prologue (CORE_ADDR, struct rs6000_framedata *);
-
-
/* If PC is in some function-call trampoline code, return the PC
where the function itself actually starts. If not, return NULL. */
-#define SKIP_TRAMPOLINE_CODE(pc) skip_trampoline_code (pc)
-extern CORE_ADDR skip_trampoline_code (CORE_ADDR);
+#define SKIP_TRAMPOLINE_CODE(pc) rs6000_skip_trampoline_code (pc)
+extern CORE_ADDR rs6000_skip_trampoline_code (CORE_ADDR);
/* Number of trap signals we need to skip over, once the inferior process
starts running. */
@@ -138,57 +68,6 @@
#define PROCESS_LINENUMBER_HOOK() aix_process_linenos ()
extern void aix_process_linenos (void);
-/* Immediately after a function call, return the saved pc.
- Can't go through the frames for this because on some machines
- the new frame is not set up until the new function executes
- some instructions. */
-
-#define SAVED_PC_AFTER_CALL(frame) read_register (LR_REGNUM)
-
-/* Address of end of stack space. */
-
-#define STACK_END_ADDR 0x2ff80000
-
-/* Stack grows downward. */
-
-#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
-
-/* This is how arguments pushed onto stack or passed in registers.
- Stack must be aligned on 64-bit boundaries when synthesizing
- function calls. We don't need STACK_ALIGN, PUSH_ARGUMENTS will
- handle it. */
-
-#define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \
- (rs6000_push_arguments((nargs), (args), (sp), (struct_return), (struct_addr)))
-extern CORE_ADDR rs6000_push_arguments (int, struct value **, CORE_ADDR, int,
- CORE_ADDR);
-
-/* BREAKPOINT_FROM_PC uses the program counter value to determine the
- breakpoint that should be used */
-extern breakpoint_from_pc_fn rs6000_breakpoint_from_pc;
-#define BREAKPOINT_FROM_PC(pcptr, lenptr) rs6000_breakpoint_from_pc (pcptr, lenptr)
-
-/* Amount PC must be decremented by after a breakpoint.
- This is often the number of bytes in BREAKPOINT
- but not always. */
-
-#define DECR_PC_AFTER_BREAK 0
-
-/* Say how long (ordinary) registers are. This is a piece of bogosity
- used in push_word and a few other places; REGISTER_RAW_SIZE is the
- real way to know how big a register is. */
-#define REGISTER_SIZE 4
-
-
-/* Return the name of register number REG. This may return "" to
- indicate a register number that's not used on this variant.
- (Register numbers may be sparse for consistency between variants.) */
-#define REGISTER_NAME(reg) (rs6000_register_name(reg))
-extern char *rs6000_register_name (int reg);
-
-/* Number of machine registers */
-#define NUM_REGS 183
-
/* Register numbers of various important registers.
Note that some of these values are "real" register numbers,
and correspond to the general registers of the machine,
@@ -196,331 +75,24 @@
to be actual register numbers as far as the user is concerned
but do serve to get the desired values when passed to read_register. */
-#define FP_REGNUM 1 /* Contains address of executing stack frame */
-#define SP_REGNUM 1 /* Contains address of top of stack */
-#define TOC_REGNUM 2 /* TOC register */
#define FP0_REGNUM 32 /* Floating point register 0 */
-#define GP0_REGNUM 0 /* GPR register 0 */
-#define FP0_REGNUM 32 /* FPR (Floating point) register 0 */
#define FPLAST_REGNUM 63 /* Last floating point register */
-/* Special purpose registers... */
-/* P.S. keep these in the same order as in /usr/mstsave.h `mstsave'
- structure, for easier processing */
-
-#define PC_REGNUM 64 /* Program counter (instruction address %iar) */
-#define PS_REGNUM 65 /* Processor (or machine) status (%msr) */
-#define CR_REGNUM 66 /* Condition register */
-#define LR_REGNUM 67 /* Link register */
-#define CTR_REGNUM 68 /* Count register */
-#define XER_REGNUM 69 /* Fixed point exception registers */
-#define MQ_REGNUM 70 /* Multiply/quotient register */
-
/* These #defines are used to parse core files and talk to ptrace, so they
must remain fixed. */
#define FIRST_UISA_SP_REGNUM 64 /* first special register number */
#define LAST_UISA_SP_REGNUM 70 /* last special register number */
-/* This is the offset in REG_NAMES at which the `set processor'
- command starts plugging in its names. */
-#define FIRST_VARIANT_REGISTER 66
-
-/* Total amount of space needed to store our copies of the machine's
- register state, the array `registers'.
- 32 4-byte gpr's
- 32 8-byte fpr's
- 7 4-byte UISA special purpose registers,
- 16 4-byte segment registers,
- 32 4-byte standard OEA special-purpose registers,
- and up to 64 4-byte non-standard OEA special purpose regs.
- total: (+ (* 32 4) (* 32 8) (* 7 4) (* 16 4) (* 32 4) (* 64 4)) 860 bytes
- Keep some extra space for now, in case to add more. */
-#define REGISTER_BYTES 880
-
-
-/* Index within `registers' of the first byte of the space for
- register N. */
-
-#define REGISTER_BYTE(N) \
- ( \
- ((N) > FPLAST_REGNUM) ? ((((N) - FPLAST_REGNUM -1) * 4) + 384)\
- :((N) >= FP0_REGNUM) ? ((((N) - FP0_REGNUM) * 8) + 128) \
- :((N) * 4) )
-
-/* Number of bytes of storage in the actual machine representation
- for register N. */
-/* Note that the unsigned cast here forces the result of the
- subtraction to very high positive values if N < FP0_REGNUM */
-
-#define REGISTER_RAW_SIZE(N) (((unsigned)(N) - FP0_REGNUM) < 32 ? 8 : 4)
-
-/* Number of bytes of storage in the program's representation
- for register N. On the RS6000, all regs are 4 bytes
- except the floating point regs which are 8-byte doubles. */
-
-#define REGISTER_VIRTUAL_SIZE(N) (((unsigned)(N) - FP0_REGNUM) < 32 ? 8 : 4)
-
-/* Largest value REGISTER_RAW_SIZE can have. */
-
-#define MAX_REGISTER_RAW_SIZE 8
-
-/* Largest value REGISTER_VIRTUAL_SIZE can have. */
-
-#define MAX_REGISTER_VIRTUAL_SIZE 8
-
/* convert a dbx stab register number (from `r' declaration) to a gdb REGNUM */
#define STAB_REG_TO_REGNUM(value) (value)
-/* Nonzero if register N requires conversion
- from raw format to virtual format.
- The register format for rs6000 floating point registers is always
- double, we need a conversion if the memory format is float. */
-
-#define REGISTER_CONVERTIBLE(N) ((N) >= FP0_REGNUM && (N) <= FPLAST_REGNUM)
-
-/* Convert data from raw format for register REGNUM in buffer FROM
- to virtual format with type TYPE in buffer TO. */
-
-#define REGISTER_CONVERT_TO_VIRTUAL(REGNUM,TYPE,FROM,TO) \
-{ \
- if (TYPE_LENGTH (TYPE) != REGISTER_RAW_SIZE (REGNUM)) \
- { \
- double val = extract_floating ((FROM), REGISTER_RAW_SIZE (REGNUM)); \
- store_floating ((TO), TYPE_LENGTH (TYPE), val); \
- } \
- else \
- memcpy ((TO), (FROM), REGISTER_RAW_SIZE (REGNUM)); \
-}
-
-/* Convert data from virtual format with type TYPE in buffer FROM
- to raw format for register REGNUM in buffer TO. */
-
-#define REGISTER_CONVERT_TO_RAW(TYPE,REGNUM,FROM,TO) \
-{ \
- if (TYPE_LENGTH (TYPE) != REGISTER_RAW_SIZE (REGNUM)) \
- { \
- double val = extract_floating ((FROM), TYPE_LENGTH (TYPE)); \
- store_floating ((TO), REGISTER_RAW_SIZE (REGNUM), val); \
- } \
- else \
- memcpy ((TO), (FROM), REGISTER_RAW_SIZE (REGNUM)); \
-}
-
-/* Return the GDB type object for the "standard" data type
- of data in register N. */
-
-#define REGISTER_VIRTUAL_TYPE(N) \
- (((unsigned)(N) - FP0_REGNUM) < 32 ? builtin_type_double : builtin_type_int)
-
-/* Store the address of the place in which to copy the structure the
- subroutine will return. This is called from call_function. */
-/* in RS6000, struct return addresses are passed as an extra parameter in r3.
- In function return, callee is not responsible of returning this address back.
- Since gdb needs to find it, we will store in a designated variable
- `rs6000_struct_return_address'. */
-
-extern CORE_ADDR rs6000_struct_return_address;
-
-#define STORE_STRUCT_RETURN(ADDR, SP) \
- { write_register (3, (ADDR)); \
- rs6000_struct_return_address = (ADDR); }
-
-/* Extract from an array REGBUF containing the (raw) register state
- a function return value of type TYPE, and copy that, in virtual format,
- into VALBUF. */
-
-/* #define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
- memcpy (VALBUF, REGBUF, TYPE_LENGTH (TYPE)) */
-
-#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
- extract_return_value(TYPE,REGBUF,VALBUF)
-extern void extract_return_value (struct type *, char[], char *);
-
-/* Write into appropriate registers a function return value
- of type TYPE, given in virtual format. */
-
-#define STORE_RETURN_VALUE(TYPE,VALBUF) \
- { \
- if (TYPE_CODE (TYPE) == TYPE_CODE_FLT) \
- \
- /* Floating point values are returned starting from FPR1 and up. \
- Say a double_double_double type could be returned in \
- FPR1/FPR2/FPR3 triple. */ \
- \
- write_register_bytes (REGISTER_BYTE (FP0_REGNUM+1), (VALBUF), \
- TYPE_LENGTH (TYPE)); \
- else \
- /* Everything else is returned in GPR3 and up. */ \
- write_register_bytes (REGISTER_BYTE (GP0_REGNUM+3), (VALBUF), \
- TYPE_LENGTH (TYPE)); \
- }
-
-
-/* Extract from an array REGBUF containing the (raw) register state
- the address in which a function should return its structure value,
- as a CORE_ADDR (or an expression that can be used as one). */
-
-#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) rs6000_struct_return_address
-
-/* Describe the pointer in each stack frame to the previous stack frame
- (its caller). */
-
-/* FRAME_CHAIN takes a frame's nominal address
- and produces the frame's chain-pointer. */
-
-/* In the case of the RS6000, the frame's nominal address
- is the address of a 4-byte word containing the calling frame's address. */
-
-#define FRAME_CHAIN(thisframe) rs6000_frame_chain (thisframe)
-CORE_ADDR rs6000_frame_chain (struct frame_info *);
-
/* Define other aspects of the stack frame. */
-/* A macro that tells us whether the function invocation represented
- by FI does not have a frame on the stack associated with it. If it
- does not, FRAMELESS is set to 1, else 0. */
-
-extern int rs6000_frameless_function_invocation (struct frame_info *);
-#define FRAMELESS_FUNCTION_INVOCATION(FI) \
- (rs6000_frameless_function_invocation (FI))
-
#define INIT_FRAME_PC_FIRST(fromleaf, prev) \
prev->pc = (fromleaf ? SAVED_PC_AFTER_CALL (prev->next) : \
prev->next ? FRAME_SAVED_PC (prev->next) : read_pc ());
#define INIT_FRAME_PC(fromleaf, prev) /* nothing */
-extern void rs6000_init_extra_frame_info (int fromleaf, struct frame_info *);
-#define INIT_EXTRA_FRAME_INFO(fromleaf, fi) rs6000_init_extra_frame_info (fromleaf, fi)
-
-/* If the kernel has to deliver a signal, it pushes a sigcontext
- structure on the stack and then calls the signal handler, passing
- the address of the sigcontext in an argument register. Usually
- the signal handler doesn't save this register, so we have to
- access the sigcontext structure via an offset from the signal handler
- frame.
- The following constants were determined by experimentation on AIX 3.2. */
-#define SIG_FRAME_PC_OFFSET 96
-#define SIG_FRAME_LR_OFFSET 108
-#define SIG_FRAME_FP_OFFSET 284
-
-/* Default offset from SP where the LR is stored */
-#define DEFAULT_LR_SAVE 8
-
-/* Return saved PC from a frame */
-#define FRAME_SAVED_PC(FRAME) rs6000_frame_saved_pc (FRAME)
-
-extern unsigned long rs6000_frame_saved_pc (struct frame_info *);
-
-extern CORE_ADDR rs6000_frame_args_address (struct frame_info *);
-#define FRAME_ARGS_ADDRESS(FI) rs6000_frame_args_address (FI)
-
-#define FRAME_LOCALS_ADDRESS(FI) FRAME_ARGS_ADDRESS(FI)
-
-
-/* Set VAL to the number of args passed to frame described by FI.
- Can set VAL to -1, meaning no way to tell. */
-
-/* We can't tell how many args there are
- now that the C compiler delays popping them. */
-
-#define FRAME_NUM_ARGS(fi) (-1)
-
-/* Return number of bytes at start of arglist that are not really args. */
-
-#define FRAME_ARGS_SKIP 8 /* Not sure on this. FIXMEmgo */
-
-/* Put here the code to store, into a struct frame_saved_regs,
- the addresses of the saved registers of frame described by FRAME_INFO.
- This includes special registers such as pc and fp saved in special
- ways in the stack frame. sp is even more special:
- the address we return for it IS the sp for the next frame. */
-/* In the following implementation for RS6000, we did *not* save sp. I am
- not sure if it will be needed. The following macro takes care of gpr's
- and fpr's only. */
-
-extern void rs6000_frame_init_saved_regs (struct frame_info *);
-#define FRAME_INIT_SAVED_REGS(FI) rs6000_frame_init_saved_regs (FI)
-
-/* Things needed for making the inferior call functions. */
-
-/* Push an empty stack frame, to record the current PC, etc. */
-/* Change these names into rs6k_{push, pop}_frame(). FIXMEmgo. */
-
-#define PUSH_DUMMY_FRAME push_dummy_frame ()
-extern void push_dummy_frame (void);
-
-/* Discard from the stack the innermost frame,
- restoring all saved registers. */
-
-#define POP_FRAME pop_frame ()
-extern void pop_frame (void);
-
-/* This sequence of words is the instructions:
-
- mflr r0 // 0x7c0802a6
- // save fpr's
- stfd r?, num(r1) // 0xd8010000 there should be 32 of this??
- // save gpr's
- stm r0, num(r1) // 0xbc010000
- stu r1, num(r1) // 0x94210000
-
- // the function we want to branch might be in a different load
- // segment. reset the toc register. Note that the actual toc address
- // will be fix by fix_call_dummy () along with function address.
-
- st r2, 0x14(r1) // 0x90410014 save toc register
- liu r2, 0x1234 // 0x3c401234 reset a new toc value 0x12345678
- oril r2, r2,0x5678 // 0x60425678
-
- // load absolute address 0x12345678 to r0
- liu r0, 0x1234 // 0x3c001234
- oril r0, r0,0x5678 // 0x60005678
- mtctr r0 // 0x7c0903a6 ctr <- r0
- bctrl // 0x4e800421 jump subroutine 0x12345678 (%ctr)
- cror 0xf, 0xf, 0xf // 0x4def7b82
- brpt // 0x7d821008, breakpoint
- cror 0xf, 0xf, 0xf // 0x4def7b82 (for 8 byte alignment)
-
-
- We actually start executing by saving the toc register first, since the pushing
- of the registers is done by PUSH_DUMMY_FRAME. If this were real code,
- the arguments for the function called by the `bctrl' would be pushed
- between the `stu' and the `bctrl', and we could allow it to execute through.
- But the arguments have to be pushed by GDB after the PUSH_DUMMY_FRAME is done,
- and we cannot allow to push the registers again.
- */
-
-#define CALL_DUMMY {0x7c0802a6, 0xd8010000, 0xbc010000, 0x94210000, \
- 0x90410014, 0x3c401234, 0x60425678, \
- 0x3c001234, 0x60005678, 0x7c0903a6, 0x4e800421, \
- 0x4def7b82, 0x7d821008, 0x4def7b82 }
-
-
-/* keep this as multiple of 8 (%sp requires 8 byte alignment) */
-#define CALL_DUMMY_LENGTH 56
-
-#define CALL_DUMMY_START_OFFSET 16
-
-/* Insert the specified number of args and function address into a
- call sequence of the above form stored at DUMMYNAME. */
-
-#define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
- rs6000_fix_call_dummy (dummyname, pc, fun, nargs, args, type, gcc_p)
-extern void rs6000_fix_call_dummy (char *, CORE_ADDR, CORE_ADDR,
- int, struct value **, struct type *, int);
-
-/* Hook in rs6000-tdep.c for determining the TOC address when
- calling functions in the inferior. */
-extern
-CORE_ADDR (*find_toc_address_hook) (CORE_ADDR);
-
-/* xcoffread.c provides a function to determine the TOC offset
- for a given object file.
- It is used under native AIX configurations for determining the
- TOC address when calling functions in the inferior. */
-
-struct objfile;
-extern CORE_ADDR get_toc_offset (struct objfile *);
/* Usually a function pointer's representation is simply the address
of the function. On the RS/6000 however, a function pointer is
@@ -536,9 +108,8 @@
function pointers), find_function_addr uses this macro to get the
function address from a function pointer. */
-#define CONVERT_FROM_FUNC_PTR_ADDR(ADDR) \
- (is_magic_function_pointer (ADDR) ? read_memory_integer (ADDR, 4) : (ADDR))
-extern int is_magic_function_pointer (CORE_ADDR);
+#define CONVERT_FROM_FUNC_PTR_ADDR rs6000_convert_from_func_ptr_addr
+extern CORE_ADDR rs6000_convert_from_func_ptr_addr (CORE_ADDR);
/* Flag for machine-specific stuff in shared files. FIXME */
#define IBM6000_TARGET
@@ -549,14 +120,17 @@
extern void rs6000_software_single_step (unsigned int, int);
#define SOFTWARE_SINGLE_STEP(sig,bp_p) rs6000_software_single_step (sig, bp_p)
-/* If the current gcc for for this target does not produce correct debugging
- information for float parameters, both prototyped and unprototyped, then
- define this macro. This forces gdb to always assume that floats are
- passed as doubles and then converted in the callee.
-
- For the PowerPC, it appears that the debug info marks the parameters as
- floats regardless of whether the function is prototyped, but the actual
- values are always passed in as doubles. Thus by setting this to 1, both
- types of calls will work. */
+/* Notice when a new child process is started. */
+
+#define TARGET_CREATE_INFERIOR_HOOK rs6000_create_inferior
+extern void rs6000_create_inferior (int);
+
+/* Hook in rs6000-tdep.c for determining the TOC address when
+ calling functions in the inferior. */
+
+extern CORE_ADDR (*rs6000_find_toc_address_hook) (CORE_ADDR);
+
+/* Hook in rs6000-tdep.c to set the current architecture when starting a
+ child process. */
-#define COERCE_FLOAT_TO_DOUBLE(formal, actual) (1)
+extern void (*rs6000_set_host_arch_hook) (int);
Index: gdb/rs6000-nat.c
===================================================================
diff -u gdb/rs6000-nat.c gdb/rs6000-nat.c
--- gdb/rs6000-nat.c Thu Jun 8 13:07:17 2000
+++ gdb/rs6000-nat.c Thu Jun 8 13:06:16 2000
@@ -39,14 +39,86 @@
#include <signal.h>
#include <sys/ioctl.h>
#include <fcntl.h>
+#include <errno.h>
#include <a.out.h>
#include <sys/file.h>
#include "gdb_stat.h"
#include <sys/core.h>
+#define __LDINFO_PTRACE32__ /* for __ld_info32 */
+#define __LDINFO_PTRACE64__ /* for __ld_info64 */
#include <sys/ldr.h>
+#include <sys/systemcfg.h>
-extern int errno;
+/* On AIX4.3+, sys/ldr.h provides different versions of struct ld_info for
+ debugging 32-bit and 64-bit processes. Define a typedef and macros for
+ accessing fields in the appropriate structures. */
+
+/* In 32-bit compilation mode (which is the only mode from which ptrace()
+ works on 4.3), __ld_info32 is #defined as equivalent to ld_info. */
+
+#ifdef __ld_info32
+# define ARCH3264
+#endif
+
+/* Return whether the current architecture is 64-bit. */
+
+#ifndef ARCH3264
+# define ARCH64() 0
+#else
+# define ARCH64() (REGISTER_RAW_SIZE (0) == 8)
+#endif
+
+/* Union of 32-bit and 64-bit ".reg" core file sections. */
+
+typedef union {
+#ifdef ARCH3264
+ struct __context64 r64;
+#else
+ struct mstsave r64;
+#endif
+ struct mstsave r32;
+} CoreRegs;
+
+/* Union of 32-bit and 64-bit versions of ld_info. */
+
+typedef union {
+#ifndef ARCH3264
+ struct ld_info l32;
+ struct ld_info l64;
+#else
+ struct __ld_info32 l32;
+ struct __ld_info64 l64;
+#endif
+} LdInfo;
+
+/* If compiling with 32-bit and 64-bit debugging capability (e.g. AIX 4.x),
+ declare and initialize a variable named VAR suitable for use as the arch64
+ parameter to the various LDI_*() macros. */
+
+#ifndef ARCH3264
+# define ARCH64_DECL(var)
+#else
+# define ARCH64_DECL(var) int var = ARCH64 ()
+#endif
+
+/* Return LDI's FIELD for a 64-bit process if ARCH64 and for a 32-bit process
+ otherwise. This technique only works for FIELDs with the same data type in
+ 32-bit and 64-bit versions of ld_info. */
+
+#ifndef ARCH3264
+# define LDI_FIELD(ldi, arch64, field) (ldi)->ldinfo_##field
+#else
+# define LDI_FIELD(ldi, arch64, field) \
+ (arch64 ? (ldi)->l64.ldinfo_##field : (ldi)->l32.ldinfo_##field)
+#endif
+
+/* Return various LDI fields for a 64-bit process if ARCH64 and for a 32-bit
+ process otherwise. */
+
+#define LDI_NEXT(ldi, arch64) LDI_FIELD(ldi, arch64, next)
+#define LDI_FD(ldi, arch64) LDI_FIELD(ldi, arch64, fd)
+#define LDI_FILENAME(ldi, arch64) LDI_FIELD(ldi, arch64, filename)
extern struct vmap *map_vmap (bfd * bf, bfd * arch);
@@ -54,11 +126,11 @@
static void vmap_exec (void);
-static void vmap_ldinfo (struct ld_info *);
+static void vmap_ldinfo (LdInfo *);
-static struct vmap *add_vmap (struct ld_info *);
+static struct vmap *add_vmap (LdInfo *);
-static int objfile_symbol_add (char *);
+static int objfile_symbol_add (void *);
static void vmap_symtab (struct vmap *);
@@ -69,7 +141,7 @@
extern void
fixup_breakpoints (CORE_ADDR low, CORE_ADDR high, CORE_ADDR delta);
-/* Conversion from gdb-to-system special purpose register numbers.. */
+/* Conversion from gdb-to-system special purpose register numbers. */
static int special_regs[] =
{
@@ -82,167 +154,298 @@
MQ /* MQ_REGNUM */
};
-void
-fetch_inferior_registers (regno)
- int regno;
-{
- int ii;
+/* Call ptrace(REQ, ID, ADDR, DATA, BUF). */
- if (regno < 0)
- { /* for all registers */
+static int
+ptrace32 (int req, int id, int *addr, int data, int *buf)
+{
+ int ret = ptrace (req, id, (int *)addr, data, buf);
+#if 0
+ printf ("ptrace32 (%d, %d, 0x%x, %08x, 0x%x) = 0x%x\n",
+ req, id, (unsigned int)addr, data, (unsigned int)buf, ret);
+#endif
+ return ret;
+}
- /* read 32 general purpose registers. */
+/* Call ptracex(REQ, ID, ADDR, DATA, BUF). */
- for (ii = 0; ii < 32; ++ii)
- *(int *) ®isters[REGISTER_BYTE (ii)] =
- ptrace (PT_READ_GPR, inferior_pid, (PTRACE_ARG3_TYPE) ii, 0, 0);
+static int
+ptrace64 (int req, int id, long long addr, int data, int *buf)
+{
+ int ret = ptracex (req, id, addr, data, buf);
+#if 0
+ printf ("ptrace64 (%d, %d, 0x%llx, %08x, 0x%x) = 0x%x\n",
+ req, id, addr, data, (unsigned int)buf, ret);
+#endif
+ return ret;
+}
- /* read general purpose floating point registers. */
+/* Fetch register REGNO from the inferior. */
- for (ii = 0; ii < 32; ++ii)
- ptrace (PT_READ_FPR, inferior_pid,
- (PTRACE_ARG3_TYPE) & registers[REGISTER_BYTE (FP0_REGNUM + ii)],
- FPR0 + ii, 0);
+static void
+fetch_register (int regno)
+{
+ int *addr = (int *) ®isters[REGISTER_BYTE (regno)];
+ int nr;
- /* read special registers. */
- for (ii = 0; ii <= LAST_UISA_SP_REGNUM - FIRST_UISA_SP_REGNUM; ++ii)
- *(int *) ®isters[REGISTER_BYTE (FIRST_UISA_SP_REGNUM + ii)] =
- ptrace (PT_READ_GPR, inferior_pid, (PTRACE_ARG3_TYPE) special_regs[ii],
- 0, 0);
+ /* Retrieved values may be -1, so infer errors from errno. */
+ errno = 0;
- registers_fetched ();
- return;
+ /* Floating-point registers. */
+ if (regno >= FP0_REGNUM && regno <= FPLAST_REGNUM)
+ {
+ nr = regno - FP0_REGNUM + FPR0;
+ ptrace32 (PT_READ_FPR, inferior_pid, addr, nr, 0);
}
- /* else an individual register is addressed. */
-
- else if (regno < FP0_REGNUM)
- { /* a GPR */
- *(int *) ®isters[REGISTER_BYTE (regno)] =
- ptrace (PT_READ_GPR, inferior_pid, (PTRACE_ARG3_TYPE) regno, 0, 0);
- }
- else if (regno <= FPLAST_REGNUM)
- { /* a FPR */
- ptrace (PT_READ_FPR, inferior_pid,
- (PTRACE_ARG3_TYPE) & registers[REGISTER_BYTE (regno)],
- (regno - FP0_REGNUM + FPR0), 0);
- }
- else if (regno <= LAST_UISA_SP_REGNUM)
- { /* a special register */
- *(int *) ®isters[REGISTER_BYTE (regno)] =
- ptrace (PT_READ_GPR, inferior_pid,
- (PTRACE_ARG3_TYPE) special_regs[regno - FIRST_UISA_SP_REGNUM],
- 0, 0);
- }
- else
+ /* Bogus register number. */
+ else if (regno > LAST_UISA_SP_REGNUM)
fprintf_unfiltered (gdb_stderr,
"gdb error: register no %d not implemented.\n",
regno);
- register_valid[regno] = 1;
+ /* Fixed-point registers. */
+ else
+ {
+ if (regno >= FIRST_UISA_SP_REGNUM)
+ nr = special_regs[regno - FIRST_UISA_SP_REGNUM];
+ else
+ nr = regno;
+
+ if (!ARCH64 ())
+ *addr = ptrace32 (PT_READ_GPR, inferior_pid, (int *)nr, 0, 0);
+ else
+ {
+ /* PT_READ_GPR requires the buffer parameter to point to long long,
+ even if the register is really only 32 bits. */
+ long long buf;
+ ptrace64 (PT_READ_GPR, inferior_pid, nr, 0, (int *)&buf);
+ if (REGISTER_RAW_SIZE (regno) == 8)
+ memcpy (addr, &buf, 8);
+ else
+ *addr = buf;
+ }
+ }
+
+ if (!errno)
+ register_valid[regno] = 1;
+ else
+ {
+#if 0
+ /* FIXME: this happens 3 times at the start of each 64-bit program. */
+ perror ("ptrace read");
+#endif
+ errno = 0;
+ }
}
-/* Store our register values back into the inferior.
- If REGNO is -1, do this for all registers.
- Otherwise, REGNO specifies which register (so we can save time). */
+/* Store register REGNO back into the inferior. */
-void
-store_inferior_registers (regno)
- int regno;
+static void
+store_register (int regno)
{
+ int *addr = (int *) ®isters[REGISTER_BYTE (regno)];
+ int nr;
+ /* -1 can be a successful return value, so infer errors from errno. */
errno = 0;
- if (regno == -1)
- { /* for all registers.. */
- int ii;
-
- /* execute one dummy instruction (which is a breakpoint) in inferior
- process. So give kernel a chance to do internal house keeping.
- Otherwise the following ptrace(2) calls will mess up user stack
- since kernel will get confused about the bottom of the stack (%sp) */
+ /* Floating-point registers. */
+ if (regno >= FP0_REGNUM && regno <= FPLAST_REGNUM)
+ {
+ nr = regno - FP0_REGNUM + FPR0;
+ ptrace32 (PT_WRITE_FPR, inferior_pid, addr, nr, 0);
+ }
- exec_one_dummy_insn ();
+ /* Bogus register number. */
+ else if (regno > LAST_UISA_SP_REGNUM)
+ {
+ if (regno >= NUM_REGS)
+ fprintf_unfiltered (gdb_stderr,
+ "gdb error: register no %d not implemented.\n",
+ regno);
+ }
- /* write general purpose registers first! */
- for (ii = GPR0; ii <= GPR31; ++ii)
- {
- ptrace (PT_WRITE_GPR, inferior_pid, (PTRACE_ARG3_TYPE) ii,
- *(int *) ®isters[REGISTER_BYTE (ii)], 0);
- if (errno)
- {
- perror ("ptrace write_gpr");
- errno = 0;
- }
- }
+ /* Fixed-point registers. */
+ else
+ {
+ if (regno == SP_REGNUM)
+ /* Execute one dummy instruction (which is a breakpoint) in inferior
+ process to give kernel a chance to do internal housekeeping.
+ Otherwise the following ptrace(2) calls will mess up user stack
+ since kernel will get confused about the bottom of the stack
+ (%sp). */
+ exec_one_dummy_insn ();
- /* write floating point registers now. */
- for (ii = 0; ii < 32; ++ii)
- {
- ptrace (PT_WRITE_FPR, inferior_pid,
- (PTRACE_ARG3_TYPE) & registers[REGISTER_BYTE (FP0_REGNUM + ii)],
- FPR0 + ii, 0);
- if (errno)
- {
- perror ("ptrace write_fpr");
- errno = 0;
- }
- }
+ if (regno >= FIRST_UISA_SP_REGNUM)
+ nr = special_regs[regno - FIRST_UISA_SP_REGNUM];
+ else
+ nr = regno;
- /* write special registers. */
- for (ii = 0; ii <= LAST_UISA_SP_REGNUM - FIRST_UISA_SP_REGNUM; ++ii)
+ if (!ARCH64 ())
+ ptrace32 (PT_WRITE_GPR, inferior_pid, (int *)nr, *addr, 0);
+ else
{
- ptrace (PT_WRITE_GPR, inferior_pid,
- (PTRACE_ARG3_TYPE) special_regs[ii],
- *(int *) ®isters[REGISTER_BYTE (FIRST_UISA_SP_REGNUM + ii)],
- 0);
- if (errno)
- {
- perror ("ptrace write_gpr");
- errno = 0;
- }
+ /* PT_WRITE_GPR requires the buffer parameter to point to an 8-byte
+ area, even if the register is really only 32 bits. */
+ long long buf;
+ if (REGISTER_RAW_SIZE (regno) == 8)
+ memcpy (&buf, addr, 8);
+ else
+ buf = *addr;
+ ptrace64 (PT_WRITE_GPR, inferior_pid, nr, 0, (int *)&buf);
}
}
- /* else, a specific register number is given... */
-
- else if (regno < FP0_REGNUM) /* a GPR */
+ if (errno)
{
- if (regno == SP_REGNUM)
- exec_one_dummy_insn ();
- ptrace (PT_WRITE_GPR, inferior_pid, (PTRACE_ARG3_TYPE) regno,
- *(int *) ®isters[REGISTER_BYTE (regno)], 0);
+ perror ("ptrace write");
+ errno = 0;
}
+}
- else if (regno <= FPLAST_REGNUM) /* a FPR */
- {
- ptrace (PT_WRITE_FPR, inferior_pid,
- (PTRACE_ARG3_TYPE) & registers[REGISTER_BYTE (regno)],
- regno - FP0_REGNUM + FPR0, 0);
- }
+/* Read from the inferior all registers if REGNO == -1 and just register
+ REGNO otherwise. */
+
+void
+fetch_inferior_registers (int regno)
+{
+ if (regno != -1)
+ fetch_register (regno);
- else if (regno <= LAST_UISA_SP_REGNUM) /* a special register */
+ else
{
- ptrace (PT_WRITE_GPR, inferior_pid,
- (PTRACE_ARG3_TYPE) special_regs[regno - FIRST_UISA_SP_REGNUM],
- *(int *) ®isters[REGISTER_BYTE (regno)], 0);
+ /* read 32 general purpose registers. */
+ for (regno = 0; regno < 32; regno++)
+ fetch_register (regno);
+
+ /* read general purpose floating point registers. */
+ for (regno = FP0_REGNUM; regno <= FPLAST_REGNUM; regno++)
+ fetch_register (regno);
+
+ /* read special registers. */
+ for (regno = FIRST_UISA_SP_REGNUM; regno <= LAST_UISA_SP_REGNUM; regno++)
+ fetch_register (regno);
}
+}
+
+/* Store our register values back into the inferior.
+ If REGNO is -1, do this for all registers.
+ Otherwise, REGNO specifies which register (so we can save time). */
- else if (regno < NUM_REGS)
+void
+store_inferior_registers (int regno)
+{
+ if (regno != -1)
+ store_register (regno);
+
+ else
{
- /* Ignore it. */
+ /* write general purpose registers first! */
+ for (regno = GPR0; regno <= GPR31; regno++)
+ store_register (regno);
+
+ /* write floating point registers now. */
+ for (regno = FP0_REGNUM; regno <= FPLAST_REGNUM; regno++)
+ store_register (regno);
+
+ /* write special registers. */
+
+ for (regno = FIRST_UISA_SP_REGNUM; regno <= LAST_UISA_SP_REGNUM; regno++)
+ store_register (regno);
}
+}
+
+/* Store in *TO the 32-bit word at 32-bit-aligned ADDR in the child
+ process, which is 64-bit if ARCH64 and 32-bit otherwise. Return
+ success. */
+static int
+read_word (CORE_ADDR from, int *to, int arch64)
+{
+ /* Retrieved values may be -1, so infer errors from errno. */
+ errno = 0;
+
+ if (arch64)
+ *to = ptrace64 (PT_READ_I, inferior_pid, from, 0, NULL);
else
- fprintf_unfiltered (gdb_stderr,
- "Gdb error: register no %d not implemented.\n",
- regno);
+ *to = ptrace32 (PT_READ_I, inferior_pid, (int *)(long) from, 0, NULL);
- if (errno)
+ return !errno;
+}
+
+/* Copy LEN bytes to or from inferior's memory starting at MEMADDR
+ to debugger memory starting at MYADDR. Copy to inferior if
+ WRITE is nonzero.
+
+ Returns the length copied, which is either the LEN argument or zero.
+ This xfer function does not do partial moves, since child_ops
+ doesn't allow memory operations to cross below us in the target stack
+ anyway. */
+
+int
+child_xfer_memory (CORE_ADDR memaddr, char *myaddr, int len,
+ int write, struct target_ops *target)
+{
+ /* Round starting address down to 32-bit word boundary. */
+ int mask = sizeof (int) - 1;
+ CORE_ADDR addr = memaddr & ~(CORE_ADDR)mask;
+
+ /* Round ending address up to 32-bit word boundary. */
+ int count = ((memaddr + len - addr + mask) & ~(CORE_ADDR)mask)
+ / sizeof (int);
+
+ /* Allocate word transfer buffer. */
+ int *buf = (int *) alloca (count * sizeof (int));
+
+ int arch64 = ARCH64 ();
+ int i;
+
+ if (!write)
{
- perror ("ptrace write");
- errno = 0;
+ /* Retrieve memory a word at a time. */
+ for (i = 0; i < count; i++, addr += sizeof (int))
+ {
+ if (!read_word (addr, buf + i, arch64))
+ return 0;
+ QUIT;
+ }
+
+ /* Copy memory to supplied buffer. */
+ addr -= count * sizeof (int);
+ memcpy (myaddr, (char *)buf + (memaddr - addr), len);
+ }
+ else
+ {
+ /* Fetch leading memory needed for alignment. */
+ if (addr < memaddr)
+ if (!read_word (addr, buf, arch64))
+ return 0;
+
+ /* Fetch trailing memory needed for alignment. */
+ if (addr + count * sizeof (int) > memaddr + len)
+ if (!read_word (addr, buf + count - 1, arch64))
+ return 0;
+
+ /* Copy supplied data into memory buffer. */
+ memcpy ((char *)buf + (memaddr - addr), myaddr, len);
+
+ /* Store memory one word at a time. */
+ for (i = 0, errno = 0; i < count; i++, addr += sizeof (int))
+ {
+ if (arch64)
+ ptrace64 (PT_WRITE_D, inferior_pid, addr, buf[i], NULL);
+ else
+ ptrace32 (PT_WRITE_D, inferior_pid, (int *)(long) addr,
+ buf[i], NULL);
+
+ if (errno)
+ return 0;
+ QUIT;
+ }
}
+
+ return len;
}
/* Execute one dummy breakpoint instruction. This way we give the kernel
@@ -250,12 +453,12 @@
including u_area. */
static void
-exec_one_dummy_insn ()
+exec_one_dummy_insn (void)
{
#define DUMMY_INSN_ADDR (TEXT_SEGMENT_BASE)+0x200
char shadow_contents[BREAKPOINT_MAX]; /* Stash old bkpt addr contents */
- int status, pid;
+ int ret, status, pid;
CORE_ADDR prev_pc;
/* We plant one dummy breakpoint into DUMMY_INSN_ADDR address. We
@@ -264,8 +467,6 @@
target_insert_breakpoint (DUMMY_INSN_ADDR, shadow_contents);
- errno = 0;
-
/* You might think this could be done with a single ptrace call, and
you'd be correct for just about every platform I've ever worked
on. However, rs6000-ibm-aix4.1.3 seems to have screwed this up --
@@ -273,9 +474,12 @@
powerpc-ibm-aix4.1.3 works correctly). */
prev_pc = read_pc ();
write_pc (DUMMY_INSN_ADDR);
- ptrace (PT_CONTINUE, inferior_pid, (PTRACE_ARG3_TYPE) 1, 0, 0);
+ if (ARCH64 ())
+ ret = ptrace64 (PT_CONTINUE, inferior_pid, 1, 0, NULL);
+ else
+ ret = ptrace32 (PT_CONTINUE, inferior_pid, (int *)1, 0, NULL);
- if (errno)
+ if (ret != 0)
perror ("pt_continue");
do
@@ -288,45 +492,100 @@
target_remove_breakpoint (DUMMY_INSN_ADDR, shadow_contents);
}
+/* Fetch registers from the register section in core bfd. */
+
static void
-fetch_core_registers (core_reg_sect, core_reg_size, which, reg_addr)
- char *core_reg_sect;
- unsigned core_reg_size;
- int which;
- CORE_ADDR reg_addr; /* Unused in this version */
-{
- /* fetch GPRs and special registers from the first register section
- in core bfd. */
- if (which == 0)
- {
- /* copy GPRs first. */
- memcpy (registers, core_reg_sect, 32 * 4);
-
- /* gdb's internal register template and bfd's register section layout
- should share a common include file. FIXMEmgo */
- /* then comes special registes. They are supposed to be in the same
- order in gdb template and bfd `.reg' section. */
- core_reg_sect += (32 * 4);
- memcpy (®isters[REGISTER_BYTE (FIRST_UISA_SP_REGNUM)],
- core_reg_sect,
- (LAST_UISA_SP_REGNUM - FIRST_UISA_SP_REGNUM + 1) * 4);
- }
-
- /* fetch floating point registers from register section 2 in core bfd. */
- else if (which == 2)
- memcpy (®isters[REGISTER_BYTE (FP0_REGNUM)], core_reg_sect, 32 * 8);
-
- else
- fprintf_unfiltered
- (gdb_stderr,
- "Gdb error: unknown parameter to fetch_core_registers().\n");
+fetch_core_registers (char *core_reg_sect, unsigned core_reg_size,
+ int which, CORE_ADDR reg_addr)
+{
+ CoreRegs *regs;
+ double *fprs;
+ int arch64, i, size;
+ void *gprs, *sprs[7];
+
+ if (which != 0)
+ {
+ fprintf_unfiltered
+ (gdb_stderr,
+ "Gdb error: unknown parameter to fetch_core_registers().\n");
+ return;
+ }
+
+ arch64 = ARCH64 ();
+ regs = (CoreRegs *) core_reg_sect;
+
+ /* Retrieve register pointers. */
+
+ if (arch64)
+ {
+ gprs = regs->r64.gpr;
+ fprs = regs->r64.fpr;
+ sprs[0] = ®s->r64.iar;
+ sprs[1] = ®s->r64.msr;
+ sprs[2] = ®s->r64.cr;
+ sprs[3] = ®s->r64.lr;
+ sprs[4] = ®s->r64.ctr;
+ sprs[5] = ®s->r64.xer;
+ }
+ else
+ {
+ gprs = regs->r32.gpr;
+ fprs = regs->r32.fpr;
+ sprs[0] = ®s->r32.iar;
+ sprs[1] = ®s->r32.msr;
+ sprs[2] = ®s->r32.cr;
+ sprs[3] = ®s->r32.lr;
+ sprs[4] = ®s->r32.ctr;
+ sprs[5] = ®s->r32.xer;
+ sprs[6] = ®s->r32.mq;
+ }
+
+ /* Copy from pointers to registers[]. */
+
+ memcpy (registers, gprs, 32 * (arch64 ? 8 : 4));
+ memcpy (registers + REGISTER_BYTE (FP0_REGNUM), fprs, 32 * 8);
+ for (i = FIRST_UISA_SP_REGNUM; i <= LAST_UISA_SP_REGNUM; i++)
+ {
+ size = REGISTER_RAW_SIZE (i);
+ if (size)
+ memcpy (registers + REGISTER_BYTE (i),
+ sprs[i - FIRST_UISA_SP_REGNUM], size);
+ }
}
+
+/* Copy information about text and data sections from LDI to VP for a 64-bit
+ process if ARCH64 and for a 32-bit process otherwise. */
+
+static void
+vmap_secs (struct vmap *vp, LdInfo *ldi, int arch64)
+{
+ if (arch64)
+ {
+ vp->tstart = ldi->l64.ldinfo_textorg;
+ vp->tend = vp->tstart + ldi->l64.ldinfo_textsize;
+ vp->dstart = ldi->l64.ldinfo_dataorg;
+ vp->dend = vp->dstart + ldi->l64.ldinfo_datasize;
+ }
+ else
+ {
+ vp->tstart = (unsigned long) ldi->l32.ldinfo_textorg;
+ vp->tend = vp->tstart + ldi->l32.ldinfo_textsize;
+ vp->dstart = (unsigned long) ldi->l32.ldinfo_dataorg;
+ vp->dend = vp->dstart + ldi->l32.ldinfo_datasize;
+ }
+
+ /* The run time loader maps the file header in addition to the text
+ section and returns a pointer to the header in ldinfo_textorg.
+ Adjust the text start address to point to the real start address
+ of the text section. */
+ vp->tstart += vp->toffs;
+}
+
/* handle symbol translation on vmapping */
static void
-vmap_symtab (vp)
- register struct vmap *vp;
+vmap_symtab (struct vmap *vp)
{
register struct objfile *objfile;
struct section_offsets *new_offsets;
@@ -360,8 +619,7 @@
/* Add symbols for an objfile. */
static int
-objfile_symbol_add (arg)
- char *arg;
+objfile_symbol_add (void *arg)
{
struct objfile *obj = (struct objfile *) arg;
@@ -378,28 +636,31 @@
Return the vmap new entry. */
static struct vmap *
-add_vmap (ldi)
- register struct ld_info *ldi;
+add_vmap (LdInfo *ldi)
{
bfd *abfd, *last;
- register char *mem, *objname;
+ register char *mem, *objname, *filename;
struct objfile *obj;
struct vmap *vp;
+ int fd;
+ ARCH64_DECL (arch64);
/* This ldi structure was allocated using alloca() in
xcoff_relocate_symtab(). Now we need to have persistent object
and member names, so we should save them. */
- mem = ldi->ldinfo_filename + strlen (ldi->ldinfo_filename) + 1;
+ filename = LDI_FILENAME (ldi, arch64);
+ mem = filename + strlen (filename) + 1;
mem = savestring (mem, strlen (mem));
- objname = savestring (ldi->ldinfo_filename, strlen (ldi->ldinfo_filename));
+ objname = savestring (filename, strlen (filename));
- if (ldi->ldinfo_fd < 0)
+ fd = LDI_FD (ldi, arch64);
+ if (fd < 0)
/* Note that this opens it once for every member; a possible
enhancement would be to only open it once for every object. */
abfd = bfd_openr (objname, gnutarget);
else
- abfd = bfd_fdopenr (objname, gnutarget, ldi->ldinfo_fd);
+ abfd = bfd_fdopenr (objname, gnutarget, fd);
if (!abfd)
error ("Could not open `%s' as an executable file: %s",
objname, bfd_errmsg (bfd_get_error ()));
@@ -445,7 +706,7 @@
vp->objfile = obj;
#ifndef SOLIB_SYMBOLS_MANUAL
- if (catch_errors (objfile_symbol_add, (char *) obj,
+ if (catch_errors (objfile_symbol_add, obj,
"Error while reading shared library symbols:\n",
RETURN_MASK_ALL))
{
@@ -461,13 +722,14 @@
Input is ptr to ldinfo() results. */
static void
-vmap_ldinfo (ldi)
- register struct ld_info *ldi;
+vmap_ldinfo (LdInfo *ldi)
{
struct stat ii, vi;
register struct vmap *vp;
int got_one, retried;
int got_exec_file = 0;
+ uint next;
+ ARCH64_DECL (arch64);
/* For each *ldi, see if we have a corresponding *vp.
If so, update the mapping, and symbol table.
@@ -475,18 +737,19 @@
do
{
- char *name = ldi->ldinfo_filename;
+ char *name = LDI_FILENAME (ldi, arch64);
char *memb = name + strlen (name) + 1;
+ int fd = LDI_FD (ldi, arch64);
retried = 0;
- if (fstat (ldi->ldinfo_fd, &ii) < 0)
+ if (fstat (fd, &ii) < 0)
{
/* The kernel sets ld_info to -1, if the process is still using the
object, and the object is removed. Keep the symbol info for the
removed object and issue a warning. */
warning ("%s (fd=%d) has disappeared, keeping its symbols",
- name, ldi->ldinfo_fd);
+ name, fd);
continue;
}
retry:
@@ -522,23 +785,13 @@
continue;
if (!retried)
- close (ldi->ldinfo_fd);
+ close (fd);
++got_one;
/* Found a corresponding VMAP. Remap! */
- /* We can assume pointer == CORE_ADDR, this code is native only. */
- vp->tstart = (CORE_ADDR) ldi->ldinfo_textorg;
- vp->tend = vp->tstart + ldi->ldinfo_textsize;
- vp->dstart = (CORE_ADDR) ldi->ldinfo_dataorg;
- vp->dend = vp->dstart + ldi->ldinfo_datasize;
-
- /* The run time loader maps the file header in addition to the text
- section and returns a pointer to the header in ldinfo_textorg.
- Adjust the text start address to point to the real start address
- of the text section. */
- vp->tstart += vp->toffs;
+ vmap_secs (vp, ldi, arch64);
/* The objfile is only NULL for the exec file. */
if (vp->objfile == NULL)
@@ -558,8 +811,8 @@
goto retry;
}
}
- while (ldi->ldinfo_next
- && (ldi = (void *) (ldi->ldinfo_next + (char *) ldi)));
+ while ((next = LDI_NEXT (ldi, arch64))
+ && (ldi = (void *) (next + (char *) ldi)));
/* If we don't find the symfile_objfile anywhere in the ldinfo, it
is unlikely that the symbol file is relocated to the proper
@@ -592,7 +845,7 @@
*/
static void
-vmap_exec ()
+vmap_exec (void)
{
static bfd *execbfd;
int i;
@@ -624,32 +877,68 @@
}
}
}
+
+/* Set the current architecture from the host running GDB. Called when
+ starting a child process. */
+
+static void
+set_host_arch (int pid)
+{
+ enum bfd_architecture arch;
+ unsigned long mach;
+ bfd abfd;
+ struct gdbarch_info info;
+
+ if (__power_rs ())
+ {
+ arch = bfd_arch_rs6000;
+ mach = bfd_mach_rs6k;
+ }
+ else
+ {
+ arch = bfd_arch_powerpc;
+ mach = bfd_mach_ppc;
+ }
+ bfd_default_set_arch_mach (&abfd, arch, mach);
+
+ memset (&info, 0, sizeof info);
+ info.bfd_arch_info = bfd_get_arch_info (&abfd);
+
+ gdbarch_update (info);
+}
+
/* xcoff_relocate_symtab - hook for symbol table relocation.
also reads shared libraries.. */
void
-xcoff_relocate_symtab (pid)
- unsigned int pid;
+xcoff_relocate_symtab (unsigned int pid)
{
int load_segs = 64; /* number of load segments */
int rc;
- struct ld_info *ldi = NULL;
+ LdInfo *ldi = NULL;
+ int arch64 = ARCH64 ();
+ int ldisize = arch64 ? sizeof (ldi->l64) : sizeof (ldi->l32);
+ int size;
do
{
- ldi = (void *) xrealloc (ldi, load_segs * sizeof (*ldi));
+ size = load_segs * ldisize;
+ ldi = (void *) xrealloc (ldi, load_segs * size);
+#if 0
/* According to my humble theory, AIX has some timing problems and
when the user stack grows, kernel doesn't update stack info in time
and ptrace calls step on user stack. That is why we sleep here a
little, and give kernel to update its internals. */
-
usleep (36000);
+#endif
+
+ if (arch64)
+ rc = ptrace64 (PT_LDINFO, pid, (unsigned long) ldi, size, NULL);
+ else
+ rc = ptrace32 (PT_LDINFO, pid, (int *) ldi, size, NULL);
- errno = 0;
- rc = ptrace (PT_LDINFO, pid, (PTRACE_ARG3_TYPE) ldi,
- load_segs * sizeof (*ldi), (int *) ldi);
if (rc == -1)
{
if (errno == ENOMEM)
@@ -673,24 +962,19 @@
from the core file. */
void
-xcoff_relocate_core (target)
- struct target_ops *target;
+xcoff_relocate_core (struct target_ops *target)
{
-/* Offset of member MEMBER in a struct of type TYPE. */
-#ifndef offsetof
-#define offsetof(TYPE, MEMBER) ((int) &((TYPE *)0)->MEMBER)
-#endif
-
-/* Size of a struct ld_info except for the variable-length filename. */
-#define LDINFO_SIZE (offsetof (struct ld_info, ldinfo_filename))
-
sec_ptr ldinfo_sec;
int offset = 0;
- struct ld_info *ldip;
+ LdInfo *ldi;
struct vmap *vp;
+ int arch64 = ARCH64 ();
+
+ /* Size of a struct ld_info except for the variable-length filename. */
+ int nonfilesz = (int)LDI_FILENAME ((LdInfo *)0, arch64);
/* Allocated size of buffer. */
- int buffer_size = LDINFO_SIZE;
+ int buffer_size = nonfilesz;
char *buffer = xmalloc (buffer_size);
struct cleanup *old = make_cleanup (free_current_contents, &buffer);
@@ -716,11 +1000,11 @@
/* Read in everything but the name. */
if (bfd_get_section_contents (core_bfd, ldinfo_sec, buffer,
- offset, LDINFO_SIZE) == 0)
+ offset, nonfilesz) == 0)
goto bfd_err;
/* Now the name. */
- i = LDINFO_SIZE;
+ i = nonfilesz;
do
{
if (i == buffer_size)
@@ -736,30 +1020,22 @@
}
while (names_found < 2);
- ldip = (struct ld_info *) buffer;
+ ldi = (LdInfo *) buffer;
/* Can't use a file descriptor from the core file; need to open it. */
- ldip->ldinfo_fd = -1;
+ if (arch64)
+ ldi->l64.ldinfo_fd = -1;
+ else
+ ldi->l32.ldinfo_fd = -1;
/* The first ldinfo is for the exec file, allocated elsewhere. */
if (offset == 0)
vp = vmap;
else
- vp = add_vmap (ldip);
-
- offset += ldip->ldinfo_next;
+ vp = add_vmap (ldi);
- /* We can assume pointer == CORE_ADDR, this code is native only. */
- vp->tstart = (CORE_ADDR) ldip->ldinfo_textorg;
- vp->tend = vp->tstart + ldip->ldinfo_textsize;
- vp->dstart = (CORE_ADDR) ldip->ldinfo_dataorg;
- vp->dend = vp->dstart + ldip->ldinfo_datasize;
-
- /* The run time loader maps the file header in addition to the text
- section and returns a pointer to the header in ldinfo_textorg.
- Adjust the text start address to point to the real start address
- of the text section. */
- vp->tstart += vp->toffs;
+ offset += LDI_NEXT (ldi, arch64);
+ vmap_secs (vp, ldi, arch64);
/* Unless this is the exec file,
add our sections to the section table for the core target. */
@@ -784,14 +1060,14 @@
vmap_symtab (vp);
}
- while (ldip->ldinfo_next != 0);
+ while (LDI_NEXT (ldi, arch64) != 0);
vmap_exec ();
breakpoint_re_set ();
do_cleanups (old);
}
int
-kernel_u_size ()
+kernel_u_size (void)
{
return (sizeof (struct user));
}
@@ -802,10 +1078,10 @@
and add the current load address of the data segment from the vmap. */
static CORE_ADDR
-find_toc_address (pc)
- CORE_ADDR pc;
+find_toc_address (CORE_ADDR pc)
{
struct vmap *vp;
+ extern CORE_ADDR get_toc_offset (struct objfile *); /* xcoffread.c */
for (vp = vmap; vp; vp = vp->nxt)
{
@@ -824,7 +1100,7 @@
static struct core_fns rs6000_core_fns =
{
- bfd_target_coff_flavour, /* core_flavour */
+ bfd_target_xcoff_flavour, /* core_flavour */
default_check_format, /* check_format */
default_core_sniffer, /* core_sniffer */
fetch_core_registers, /* core_read_registers */
@@ -832,15 +1108,19 @@
};
void
-_initialize_core_rs6000 ()
+_initialize_core_rs6000 (void)
{
/* Initialize hook in rs6000-tdep.c for determining the TOC address when
calling functions in the inferior. */
- find_toc_address_hook = &find_toc_address;
+ rs6000_find_toc_address_hook = find_toc_address;
+
+ /* Initialize hook in rs6000-tdep.c to set the current architecture when
+ starting a child process. */
+ rs6000_set_host_arch_hook = set_host_arch;
/* For native configurations, where this module is included, inform
the xcoffsolib module where it can find the function for symbol table
relocation at runtime. */
- xcoff_relocate_symtab_hook = &xcoff_relocate_symtab;
+ xcoff_relocate_symtab_hook = xcoff_relocate_symtab;
add_core_fns (&rs6000_core_fns);
}
Index: gdb/rs6000-tdep.c
===================================================================
diff -u gdb/rs6000-tdep.c gdb/rs6000-tdep.c
--- gdb/rs6000-tdep.c Thu Jun 8 13:07:19 2000
+++ gdb/rs6000-tdep.c Thu Jun 8 13:06:16 2000
@@ -29,8 +29,76 @@
#include "symfile.h"
#include "objfiles.h"
#include "xcoffsolib.h"
+#include "arch-utils.h"
-extern int errno;
+#include "bfd/libbfd.h" /* for bfd_default_set_arch_mach */
+#include "coff/internal.h" /* for libcoff.h */
+#include "bfd/libcoff.h" /* for xcoff_data */
+
+/* Some important register numbers. Keep these in the same order as in
+ /usr/mstsave.h `mstsave' structure, for easier processing. */
+
+#define GP0_REGNUM 0 /* GPR register 0 */
+#define TOC_REGNUM 2 /* TOC register */
+#define PS_REGNUM 65 /* Processor (or machine) status (%msr) */
+#define CR_REGNUM 66 /* Condition register */
+#define LR_REGNUM 67 /* Link register */
+#define CTR_REGNUM 68 /* Count register */
+
+/* If the kernel has to deliver a signal, it pushes a sigcontext
+ structure on the stack and then calls the signal handler, passing
+ the address of the sigcontext in an argument register. Usually
+ the signal handler doesn't save this register, so we have to
+ access the sigcontext structure via an offset from the signal handler
+ frame.
+ The following constants were determined by experimentation on AIX 3.2. */
+#define SIG_FRAME_PC_OFFSET 96
+#define SIG_FRAME_LR_OFFSET 108
+#define SIG_FRAME_FP_OFFSET 284
+
+/* Default offset from SP where the LR is stored */
+#define DEFAULT_LR_SAVE 8
+
+/* To be used by skip_prologue. */
+
+struct rs6000_framedata
+ {
+ int offset; /* total size of frame --- the distance
+ by which we decrement sp to allocate
+ the frame */
+ int saved_gpr; /* smallest # of saved gpr */
+ int saved_fpr; /* smallest # of saved fpr */
+ int alloca_reg; /* alloca register number (frame ptr) */
+ char frameless; /* true if frameless functions. */
+ char nosavedpc; /* true if pc not saved. */
+ int gpr_offset; /* offset of saved gprs from prev sp */
+ int fpr_offset; /* offset of saved fprs from prev sp */
+ int lr_offset; /* offset of saved lr */
+ int cr_offset; /* offset of saved cr */
+ };
+
+/* Description of a single register. */
+
+struct reg
+ {
+ char *name; /* name of register */
+ unsigned char sz32; /* size on 32-bit arch, 0 if nonextant */
+ unsigned char sz64; /* size on 64-bit arch, 0 if nonextant */
+ unsigned char fpr; /* whether register is floating-point */
+ };
+
+/* Private data that this module attaches to struct gdbarch. */
+
+struct gdbarch_tdep
+ {
+ int wordsize; /* size in bytes of fixed-point word */
+ int *regoff; /* byte offsets in register arrays */
+ const struct reg *regs; /* from current variant */
+ };
+
+/* Return the current architecture's gdbarch_tdep structure. */
+
+#define TDEP gdbarch_tdep (current_gdbarch)
/* Breakpoint shadows for the single step instructions will be kept here. */
@@ -47,23 +115,77 @@
inferior under AIX. The initialization code in rs6000-nat.c sets
this hook to point to find_toc_address. */
-CORE_ADDR (*find_toc_address_hook) (CORE_ADDR) = NULL;
+CORE_ADDR (*rs6000_find_toc_address_hook) (CORE_ADDR) = NULL;
+
+/* Hook to set the current architecture when starting a child process.
+ rs6000-nat.c sets this. */
+
+void (*rs6000_set_host_arch_hook) (int) = NULL;
/* Static function prototypes */
static CORE_ADDR branch_dest (int opcode, int instr, CORE_ADDR pc,
CORE_ADDR safety);
+static CORE_ADDR skip_prologue (CORE_ADDR, struct rs6000_framedata *);
+static void frame_get_saved_regs (struct frame_info * fi,
+ struct rs6000_framedata * fdatap);
+static void rs6000_pop_dummy_frame (void);
+static CORE_ADDR frame_initial_stack_address (struct frame_info *);
-static void frame_get_saved_regs (struct frame_info *fi,
- struct rs6000_framedata *fdatap);
+/* Call dummy instruction sequence:
-static void pop_dummy_frame (void);
+ mflr r0 // 0x7c0802a6
+ // save fpr's
+ stfd r?, num(r1) // 0xd8010000 there should be 32 of this??
+ // save gpr's
+ stm r0, num(r1) // 0xbc010000
+ stu r1, num(r1) // 0x94210000
+
+ // the function we want to branch might be in a different load
+ // segment. reset the toc register. Note that the actual toc address
+ // will be fix by fix_call_dummy () along with function address.
+
+ st r2, 0x14(r1) // 0x90410014 save toc register
+ liu r2, 0x1234 // 0x3c401234 reset a new toc value 0x12345678
+ oril r2, r2,0x5678 // 0x60425678
+
+ // load absolute address 0x12345678 to r0
+ liu r0, 0x1234 // 0x3c001234
+ oril r0, r0,0x5678 // 0x60005678
+ mtctr r0 // 0x7c0903a6 ctr <- r0
+ bctrl // 0x4e800421 jump subroutine 0x12345678 (%ctr)
+ cror 0xf, 0xf, 0xf // 0x4def7b82
+ brpt // 0x7d821008, breakpoint
+ cror 0xf, 0xf, 0xf // 0x4def7b82 (for 8 byte alignment)
+
+ We actually start executing by saving the toc register first, since the pushing
+ of the registers is done by PUSH_DUMMY_FRAME. If this were real code,
+ the arguments for the function called by the `bctrl' would be pushed
+ between the `stu' and the `bctrl', and we could allow it to execute through.
+ But the arguments have to be pushed by GDB after the PUSH_DUMMY_FRAME is done,
+ and we cannot allow to push the registers again.
-static CORE_ADDR frame_initial_stack_address (struct frame_info *);
+ Keep this as multiple of 8 (%sp requires 8 byte alignment).
+ */
-CORE_ADDR
-rs6000_skip_prologue (pc)
- CORE_ADDR pc;
+static LONGEST rs6000_call_dummy_words[] =
+{
+ 0x7c0802a6, 0xd8010000, 0xbc010000, 0x94210000,
+ 0x90410014, 0x3c401234, 0x60425678,
+ 0x3c001234, 0x60005678, 0x7c0903a6, 0x4e800421,
+ 0x4def7b82, 0x7d821008, 0x4def7b82
+};
+
+/* Read a LEN-byte address from debugged memory address MEMADDR. */
+
+static CORE_ADDR
+read_memory_addr (CORE_ADDR memaddr, int len)
+{
+ return read_memory_unsigned_integer (memaddr, len);
+}
+
+static CORE_ADDR
+rs6000_skip_prologue (CORE_ADDR pc)
{
struct rs6000_framedata frame;
pc = skip_prologue (pc, &frame);
@@ -83,10 +205,8 @@
CORE_ADDR initial_sp; /* initial stack pointer. */
};
-void
-rs6000_init_extra_frame_info (fromleaf, fi)
- int fromleaf;
- struct frame_info *fi;
+static void
+rs6000_init_extra_frame_info (int fromleaf, struct frame_info *fi)
{
fi->extra_info = (struct frame_extra_info *)
frame_obstack_alloc (sizeof (struct frame_extra_info));
@@ -100,17 +220,24 @@
fi->signal_handler_caller = 1;
}
+/* Put here the code to store, into a struct frame_saved_regs,
+ the addresses of the saved registers of frame described by FRAME_INFO.
+ This includes special registers such as pc and fp saved in special
+ ways in the stack frame. sp is even more special:
+ the address we return for it IS the sp for the next frame. */
+
+/* In this implementation for RS6000, we do *not* save sp. I am
+ not sure if it will be needed. The following function takes care of gpr's
+ and fpr's only. */
-void
-rs6000_frame_init_saved_regs (fi)
- struct frame_info *fi;
+static void
+rs6000_frame_init_saved_regs (struct frame_info *fi)
{
frame_get_saved_regs (fi, NULL);
}
-CORE_ADDR
-rs6000_frame_args_address (fi)
- struct frame_info *fi;
+static CORE_ADDR
+rs6000_frame_args_address (struct frame_info *fi)
{
if (fi->extra_info->initial_sp != 0)
return fi->extra_info->initial_sp;
@@ -118,15 +245,21 @@
return frame_initial_stack_address (fi);
}
+/* Immediately after a function call, return the saved pc.
+ Can't go through the frames for this because on some machines
+ the new frame is not set up until the new function executes
+ some instructions. */
+
+static CORE_ADDR
+rs6000_saved_pc_after_call (struct frame_info *fi)
+{
+ return read_register (LR_REGNUM);
+}
/* Calculate the destination of a branch/jump. Return -1 if not a branch. */
static CORE_ADDR
-branch_dest (opcode, instr, pc, safety)
- int opcode;
- int instr;
- CORE_ADDR pc;
- CORE_ADDR safety;
+branch_dest (int opcode, int instr, CORE_ADDR pc, CORE_ADDR safety)
{
CORE_ADDR dest;
int immediate;
@@ -170,8 +303,8 @@
fi = get_current_frame ();
if (fi != NULL)
- dest = read_memory_integer (fi->frame + SIG_FRAME_PC_OFFSET,
- 4);
+ dest = read_memory_addr (fi->frame + SIG_FRAME_PC_OFFSET,
+ TDEP->wordsize);
}
}
@@ -201,10 +334,8 @@
#define BIG_BREAKPOINT { 0x7d, 0x82, 0x10, 0x08 }
#define LITTLE_BREAKPOINT { 0x08, 0x10, 0x82, 0x7d }
-unsigned char *
-rs6000_breakpoint_from_pc (bp_addr, bp_size)
- CORE_ADDR *bp_addr;
- int *bp_size;
+static unsigned char *
+rs6000_breakpoint_from_pc (CORE_ADDR *bp_addr, int *bp_size)
{
static unsigned char big_breakpoint[] = BIG_BREAKPOINT;
static unsigned char little_breakpoint[] = LITTLE_BREAKPOINT;
@@ -219,9 +350,7 @@
/* AIX does not support PT_STEP. Simulate it. */
void
-rs6000_software_single_step (signal, insert_breakpoints_p)
- unsigned int signal;
- int insert_breakpoints_p;
+rs6000_software_single_step (unsigned int signal, int insert_breakpoints_p)
{
#define INSNLEN(OPCODE) 4
@@ -304,7 +433,7 @@
#define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
-CORE_ADDR
+static CORE_ADDR
skip_prologue (CORE_ADDR pc, struct rs6000_framedata *fdata)
{
CORE_ADDR orig_pc = pc;
@@ -367,15 +496,17 @@
}
else if (((op & 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */
- ((op & 0xfc1f0000) == 0x90010000 && /* st rx,NUM(r1),
- rx >= r13 */
- (op & 0x03e00000) >= 0x01a00000))
+ (((op & 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
+ (op & 0xfc1f0003) == 0xf8010000) && /* std rx,NUM(r1) */
+ (op & 0x03e00000) >= 0x01a00000)) /* rx >= r13 */
{
reg = GET_SRC_REG (op);
if (fdata->saved_gpr == -1 || fdata->saved_gpr > reg)
{
fdata->saved_gpr = reg;
+ if ((op & 0xfc1f0003) == 0xf8010000)
+ op = (op >> 1) << 1;
fdata->gpr_offset = SIGNED_SHORT (op) + offset;
}
continue;
@@ -475,9 +606,12 @@
/* update stack pointer */
}
- else if ((op & 0xffff0000) == 0x94210000)
- { /* stu r1,NUM(r1) */
+ else if ((op & 0xffff0000) == 0x94210000 || /* stu r1,NUM(r1) */
+ (op & 0xffff0003) == 0xf8210001) /* stdu r1,NUM(r1) */
+ {
fdata->frameless = 0;
+ if ((op & 0xffff0003) == 0xf8210001)
+ op = (op >> 1) << 1;
fdata->offset = SIGNED_SHORT (op);
offset = fdata->offset;
continue;
@@ -510,9 +644,10 @@
/* store parameters in stack */
}
else if ((op & 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
+ (op & 0xfc1f0003) == 0xf8010000 || /* std rx,NUM(r1) */
(op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
- (op & 0xfc1f0000) == 0xfc010000)
- { /* frsp, fp?,NUM(r1) */
+ (op & 0xfc1f0000) == 0xfc010000) /* frsp, fp?,NUM(r1) */
+ {
continue;
/* store parameters in stack via frame pointer */
@@ -589,7 +724,10 @@
frames, etc.
*************************************************************************/
-/* The total size of dummy frame is 436, which is;
+/* Much of the following is only needed for POWER, not PowerPC, so
+ there's no need to make it 64-bit safe. */
+
+/* POWER (32-bit) only: The total size of dummy frame is 436, which is;
32 gpr's - 128 bytes
32 fpr's - 256 bytes
@@ -604,20 +742,30 @@
#define DUMMY_FRAME_ADDR_SIZE 10
-/* Make sure you initialize these in somewhere, in case gdb gives up what it
- was debugging and starts debugging something else. FIXMEibm */
-
static int dummy_frame_count = 0;
static int dummy_frame_size = 0;
static CORE_ADDR *dummy_frame_addr = 0;
extern int stop_stack_dummy;
-/* push a dummy frame into stack, save all register. Currently we are saving
- only gpr's and fpr's, which is not good enough! FIXMEmgo */
+/* Initialize dummy frame storage. POWER (32-bit) only. */
-void
-push_dummy_frame ()
+static void
+dummy_init (void)
+{
+ if (!dummy_frame_addr)
+ return;
+ free (dummy_frame_addr);
+ dummy_frame_addr = NULL;
+ dummy_frame_count = 0;
+ dummy_frame_size = 0;
+}
+
+/* Push a dummy frame into stack, saving all registers.
+ POWER (32-bit) only. */
+
+static void
+rs6000_push_dummy_frame (void)
{
/* stack pointer. */
CORE_ADDR sp;
@@ -706,7 +854,7 @@
}
-/* Pop a dummy frame.
+/* Pop a dummy frame. POWER (32-bit) only.
In rs6000 when we push a dummy frame, we save all of the registers. This
is usually done before user calls a function explicitly.
@@ -727,7 +875,7 @@
*/
static void
-pop_dummy_frame ()
+rs6000_pop_dummy_frame (void)
{
CORE_ADDR sp, pc;
int ii;
@@ -765,15 +913,15 @@
}
-/* pop the innermost frame, go back to the caller. */
+/* Pop the innermost frame, go back to the caller. */
-void
-pop_frame ()
+static void
+rs6000_pop_frame (void)
{
CORE_ADDR pc, lr, sp, prev_sp; /* %pc, %lr, %sp */
struct rs6000_framedata fdata;
struct frame_info *frame = get_current_frame ();
- int addr, ii;
+ int addr, ii, wordsize;
pc = read_pc ();
sp = FRAME_FP (frame);
@@ -788,8 +936,9 @@
}
else
{
+ /* POWER (32-bit) only. */
if (dummy_frame_count)
- pop_dummy_frame ();
+ rs6000_pop_dummy_frame ();
return;
}
}
@@ -804,14 +953,15 @@
addr = get_pc_function_start (frame->pc);
(void) skip_prologue (addr, &fdata);
+ wordsize = TDEP->wordsize;
if (fdata.frameless)
prev_sp = sp;
else
- prev_sp = read_memory_integer (sp, 4);
+ prev_sp = read_memory_addr (sp, wordsize);
if (fdata.lr_offset == 0)
lr = read_register (LR_REGNUM);
else
- lr = read_memory_integer (prev_sp + fdata.lr_offset, 4);
+ lr = read_memory_addr (prev_sp + fdata.lr_offset, wordsize);
/* reset %pc value. */
write_register (PC_REGNUM, lr);
@@ -823,8 +973,8 @@
addr = prev_sp + fdata.gpr_offset;
for (ii = fdata.saved_gpr; ii <= 31; ++ii)
{
- read_memory (addr, ®isters[REGISTER_BYTE (ii)], 4);
- addr += 4;
+ read_memory (addr, ®isters[REGISTER_BYTE (ii)], wordsize);
+ addr += wordsize;
}
}
@@ -843,18 +993,13 @@
flush_cached_frames ();
}
-/* fixup the call sequence of a dummy function, with the real function address.
- its argumets will be passed by gdb. */
+/* Fixup the call sequence of a dummy function, with the real function
+ address. Its arguments will be passed by gdb. */
-void
-rs6000_fix_call_dummy (dummyname, pc, fun, nargs, args, type, gcc_p)
- char *dummyname;
- CORE_ADDR pc;
- CORE_ADDR fun;
- int nargs;
- value_ptr *args;
- struct type *type;
- int gcc_p;
+static void
+rs6000_fix_call_dummy (char *dummyname, CORE_ADDR pc, CORE_ADDR fun,
+ int nargs, value_ptr *args, struct type *type,
+ int gcc_p)
{
#define TOC_ADDR_OFFSET 20
#define TARGET_ADDR_OFFSET 28
@@ -864,19 +1009,19 @@
if (USE_GENERIC_DUMMY_FRAMES)
{
- if (find_toc_address_hook != NULL)
+ if (rs6000_find_toc_address_hook != NULL)
{
- CORE_ADDR tocvalue = (*find_toc_address_hook) (fun);
+ CORE_ADDR tocvalue = (*rs6000_find_toc_address_hook) (fun);
write_register (TOC_REGNUM, tocvalue);
}
}
else
{
- if (find_toc_address_hook != NULL)
+ if (rs6000_find_toc_address_hook != NULL)
{
CORE_ADDR tocvalue;
- tocvalue = (*find_toc_address_hook) (fun);
+ tocvalue = (*rs6000_find_toc_address_hook) (fun);
ii = *(int *) ((char *) dummyname + TOC_ADDR_OFFSET);
ii = (ii & 0xffff0000) | (tocvalue >> 16);
*(int *) ((char *) dummyname + TOC_ADDR_OFFSET) = ii;
@@ -900,23 +1045,22 @@
/* Pass the arguments in either registers, or in the stack. In RS6000,
the first eight words of the argument list (that might be less than
eight parameters if some parameters occupy more than one word) are
- passed in r3..r11 registers. float and double parameters are
+ passed in r3..r10 registers. float and double parameters are
passed in fpr's, in addition to that. Rest of the parameters if any
are passed in user stack. There might be cases in which half of the
parameter is copied into registers, the other half is pushed into
stack.
+ Stack must be aligned on 64-bit boundaries when synthesizing
+ function calls.
+
If the function is returning a structure, then the return address is passed
in r3, then the first 7 words of the parameters can be passed in registers,
starting from r4. */
-CORE_ADDR
-rs6000_push_arguments (nargs, args, sp, struct_return, struct_addr)
- int nargs;
- value_ptr *args;
- CORE_ADDR sp;
- int struct_return;
- CORE_ADDR struct_addr;
+static CORE_ADDR
+rs6000_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp,
+ int struct_return, CORE_ADDR struct_addr)
{
int ii;
int len = 0;
@@ -924,6 +1068,7 @@
int argbytes; /* current argument byte */
char tmp_buffer[50];
int f_argno = 0; /* current floating point argno */
+ int wordsize = TDEP->wordsize;
value_ptr arg = 0;
struct type *type;
@@ -1026,10 +1171,10 @@
saved_sp = read_sp ();
#ifndef ELF_OBJECT_FORMAT
/* location for 8 parameters are always reserved. */
- sp -= 4 * 8;
+ sp -= wordsize * 8;
/* another six words for back chain, TOC register, link register, etc. */
- sp -= 24;
+ sp -= wordsize * 6;
/* stack pointer must be quadword aligned */
sp &= -16;
@@ -1037,6 +1182,8 @@
}
else
{
+ /* POWER (32-bit) only. */
+
/* location for 8 parameters are always reserved. */
sp -= 4 * 8;
@@ -1124,8 +1271,8 @@
if (!USE_GENERIC_DUMMY_FRAMES)
{
- /* we want to copy 24 bytes of target's frame to dummy's frame,
- then set back chain to point to new frame. */
+ /* POWER (32-bit) only. We want to copy 24 bytes of target's frame to
+ dummy's frame, then set back chain to point to new frame. */
saved_sp = dummy_frame_addr[dummy_frame_count - 1];
read_memory (saved_sp, tmp_buffer, 24);
@@ -1139,30 +1286,22 @@
target_store_registers (-1);
return sp;
}
-/* #ifdef ELF_OBJECT_FORMAT */
/* Function: ppc_push_return_address (pc, sp)
Set up the return address for the inferior function call. */
-CORE_ADDR
-ppc_push_return_address (pc, sp)
- CORE_ADDR pc;
- CORE_ADDR sp;
+static CORE_ADDR
+ppc_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
{
write_register (LR_REGNUM, CALL_DUMMY_ADDRESS ());
return sp;
}
-/* #endif */
+/* Extract a function return value of type TYPE from raw register array
+ REGBUF, and copy that return value into VALBUF in virtual format. */
-/* a given return value in `regbuf' with a type `valtype', extract and copy its
- value into `valbuf' */
-
-void
-extract_return_value (valtype, regbuf, valbuf)
- struct type *valtype;
- char regbuf[REGISTER_BYTES];
- char *valbuf;
+static void
+rs6000_extract_return_value (struct type *valtype, char *regbuf, char *valbuf)
{
int offset = 0;
@@ -1199,14 +1338,12 @@
}
}
-
-/* keep structure return address in this variable.
+/* Keep structure return address in this variable.
FIXME: This is a horrid kludge which should not be allowed to continue
living. This only allows a single nested call to a structure-returning
function. Come on, guys! -- gnu@cygnus.com, Aug 92 */
-CORE_ADDR rs6000_struct_return_address;
-
+static CORE_ADDR rs6000_struct_return_address;
/* Indirect function calls use a piece of trampoline code to do context
switching, i.e. to set the new TOC table. Skip such code if we are on
@@ -1217,8 +1354,7 @@
trampoline code. */
CORE_ADDR
-skip_trampoline_code (pc)
- CORE_ADDR pc;
+rs6000_skip_trampoline_code (CORE_ADDR pc)
{
register unsigned int ii, op;
CORE_ADDR solib_target_pc;
@@ -1247,13 +1383,13 @@
return 0;
}
ii = read_register (11); /* r11 holds destination addr */
- pc = read_memory_integer (ii, 4); /* (r11) value */
+ pc = read_memory_addr (ii, TDEP->wordsize); /* (r11) value */
return pc;
}
/* Determines whether the function FI has a frame on the stack or not. */
-int
+static int
rs6000_frameless_function_invocation (struct frame_info *fi)
{
CORE_ADDR func_start;
@@ -1287,14 +1423,15 @@
/* Return the PC saved in a frame */
-unsigned long
+static CORE_ADDR
rs6000_frame_saved_pc (struct frame_info *fi)
{
CORE_ADDR func_start;
struct rs6000_framedata fdata;
+ int wordsize = TDEP->wordsize;
if (fi->signal_handler_caller)
- return read_memory_integer (fi->frame + SIG_FRAME_PC_OFFSET, 4);
+ return read_memory_addr (fi->frame + SIG_FRAME_PC_OFFSET, wordsize);
if (USE_GENERIC_DUMMY_FRAMES)
{
@@ -1314,15 +1451,17 @@
if (fdata.lr_offset == 0 && fi->next != NULL)
{
if (fi->next->signal_handler_caller)
- return read_memory_integer (fi->next->frame + SIG_FRAME_LR_OFFSET, 4);
+ return read_memory_addr (fi->next->frame + SIG_FRAME_LR_OFFSET,
+ wordsize);
else
- return read_memory_integer (FRAME_CHAIN (fi) + DEFAULT_LR_SAVE, 4);
+ return read_memory_addr (FRAME_CHAIN (fi) + DEFAULT_LR_SAVE,
+ wordsize);
}
if (fdata.lr_offset == 0)
return read_register (LR_REGNUM);
- return read_memory_integer (FRAME_CHAIN (fi) + fdata.lr_offset, 4);
+ return read_memory_addr (FRAME_CHAIN (fi) + fdata.lr_offset, wordsize);
}
/* If saved registers of frame FI are not known yet, read and cache them.
@@ -1330,12 +1469,11 @@
in which case the framedata are read. */
static void
-frame_get_saved_regs (fi, fdatap)
- struct frame_info *fi;
- struct rs6000_framedata *fdatap;
+frame_get_saved_regs (struct frame_info *fi, struct rs6000_framedata *fdatap)
{
CORE_ADDR frame_addr;
struct rs6000_framedata work_fdata;
+ int wordsize = TDEP->wordsize;
if (fi->saved_regs)
return;
@@ -1359,7 +1497,7 @@
else if (fi->prev && fi->prev->frame)
frame_addr = fi->prev->frame;
else
- frame_addr = read_memory_integer (fi->frame, 4);
+ frame_addr = read_memory_addr (fi->frame, wordsize);
/* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
All fpr's from saved_fpr to fp31 are saved. */
@@ -1367,11 +1505,11 @@
if (fdatap->saved_fpr >= 0)
{
int i;
- int fpr_offset = frame_addr + fdatap->fpr_offset;
+ CORE_ADDR fpr_addr = frame_addr + fdatap->fpr_offset;
for (i = fdatap->saved_fpr; i < 32; i++)
{
- fi->saved_regs[FP0_REGNUM + i] = fpr_offset;
- fpr_offset += 8;
+ fi->saved_regs[FP0_REGNUM + i] = fpr_addr;
+ fpr_addr += 8;
}
}
@@ -1381,11 +1519,11 @@
if (fdatap->saved_gpr >= 0)
{
int i;
- int gpr_offset = frame_addr + fdatap->gpr_offset;
+ CORE_ADDR gpr_addr = frame_addr + fdatap->gpr_offset;
for (i = fdatap->saved_gpr; i < 32; i++)
{
- fi->saved_regs[i] = gpr_offset;
- gpr_offset += 4;
+ fi->saved_regs[i] = gpr_addr;
+ gpr_addr += wordsize;
}
}
@@ -1405,8 +1543,7 @@
an alloca register. */
static CORE_ADDR
-frame_initial_stack_address (fi)
- struct frame_info *fi;
+frame_initial_stack_address (struct frame_info *fi)
{
CORE_ADDR tmpaddr;
struct rs6000_framedata fdata;
@@ -1458,7 +1595,8 @@
tmpaddr = callee_fi->saved_regs[fdata.alloca_reg];
if (tmpaddr)
{
- fi->extra_info->initial_sp = read_memory_integer (tmpaddr, 4);
+ fi->extra_info->initial_sp =
+ read_memory_addr (tmpaddr, TDEP->wordsize);
return fi->extra_info->initial_sp;
}
@@ -1473,11 +1611,20 @@
return fi->extra_info->initial_sp;
}
-CORE_ADDR
-rs6000_frame_chain (thisframe)
- struct frame_info *thisframe;
+/* Describe the pointer in each stack frame to the previous stack frame
+ (its caller). */
+
+/* FRAME_CHAIN takes a frame's nominal address
+ and produces the frame's chain-pointer. */
+
+/* In the case of the RS6000, the frame's nominal address
+ is the address of a 4-byte word containing the calling frame's address. */
+
+static CORE_ADDR
+rs6000_frame_chain (struct frame_info *thisframe)
{
CORE_ADDR fp;
+ int wordsize = TDEP->wordsize;
if (USE_GENERIC_DUMMY_FRAMES)
{
@@ -1490,7 +1637,8 @@
return 0;
if (thisframe->signal_handler_caller)
- fp = read_memory_integer (thisframe->frame + SIG_FRAME_FP_OFFSET, 4);
+ fp = read_memory_addr (thisframe->frame + SIG_FRAME_FP_OFFSET,
+ wordsize);
else if (thisframe->next != NULL
&& thisframe->next->signal_handler_caller
&& FRAMELESS_FUNCTION_INVOCATION (thisframe))
@@ -1498,7 +1646,7 @@
frame pointer. */
fp = FRAME_FP (thisframe);
else
- fp = read_memory_integer ((thisframe)->frame, 4);
+ fp = read_memory_addr ((thisframe)->frame, wordsize);
if (USE_GENERIC_DUMMY_FRAMES)
{
@@ -1506,49 +1654,240 @@
lr = read_register (LR_REGNUM);
if (lr == entry_point_address ())
- if (fp != 0 && (fpp = read_memory_integer (fp, 4)) != 0)
+ if (fp != 0 && (fpp = read_memory_addr (fp, wordsize)) != 0)
if (PC_IN_CALL_DUMMY (lr, fpp, fpp))
return fpp;
}
return fp;
}
+
+/* Return the size of register REG when words are WORDSIZE bytes long. If REG
+ isn't available with that word size, return 0. */
+
+static int
+regsize (const struct reg *reg, int wordsize)
+{
+ return wordsize == 8 ? reg->sz64 : reg->sz32;
+}
+
+/* Return the name of register number N, or null if no such register exists
+ in the current architecture. */
+
+static char *
+rs6000_register_name (int n)
+{
+ struct gdbarch_tdep *tdep = TDEP;
+ const struct reg *reg = tdep->regs + n;
+
+ if (!regsize (reg, tdep->wordsize))
+ return NULL;
+ return reg->name;
+}
+
+/* Index within `registers' of the first byte of the space for
+ register N. */
+
+static int
+rs6000_register_byte (int n)
+{
+ return TDEP->regoff[n];
+}
+
+/* Return the number of bytes of storage in the actual machine representation
+ for register N if that register is available, else return 0. */
+
+static int
+rs6000_register_raw_size (int n)
+{
+ struct gdbarch_tdep *tdep = TDEP;
+ const struct reg *reg = tdep->regs + n;
+ return regsize (reg, tdep->wordsize);
+}
+
+/* Number of bytes of storage in the program's representation
+ for register N. */
+
+static int
+rs6000_register_virtual_size (int n)
+{
+ return TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (n));
+}
+
+/* Return the GDB type object for the "standard" data type
+ of data in register N. */
+
+static struct type *
+rs6000_register_virtual_type (n)
+{
+ struct gdbarch_tdep *tdep = TDEP;
+ const struct reg *reg = tdep->regs + n;
+
+ return reg->fpr ? builtin_type_double :
+ regsize (reg, tdep->wordsize) == 8 ? builtin_type_int64 :
+ builtin_type_int32;
+}
+
+/* For the PowerPC, it appears that the debug info marks float parameters as
+ floats regardless of whether the function is prototyped, but the actual
+ values are always passed in as doubles. Tell gdb to always assume that
+ floats are passed as doubles and then converted in the callee. */
+
+static int
+rs6000_coerce_float_to_double (struct type *formal, struct type *actual)
+{
+ return 1;
+}
+
+/* Return whether register N requires conversion when moving from raw format
+ to virtual format.
+
+ The register format for rs6000 floating point registers is always
+ double, we need a conversion if the memory format is float. */
+
+static int
+rs6000_register_convertible (int n)
+{
+ const struct reg *reg = TDEP->regs + n;
+ return reg->fpr;
+}
+
+/* Convert data from raw format for register N in buffer FROM
+ to virtual format with type TYPE in buffer TO. */
+
+static void
+rs6000_register_convert_to_virtual (int n, struct type *type,
+ char *from, char *to)
+{
+ if (TYPE_LENGTH (type) != REGISTER_RAW_SIZE (n))
+ {
+ double val = extract_floating (from, REGISTER_RAW_SIZE (n));
+ store_floating (to, TYPE_LENGTH (type), val);
+ }
+ else
+ memcpy (to, from, REGISTER_RAW_SIZE (n));
+}
+
+/* Convert data from virtual format with type TYPE in buffer FROM
+ to raw format for register N in buffer TO. */
+
+static void
+rs6000_register_convert_to_raw (struct type *type, int n,
+ char *from, char *to)
+{
+ if (TYPE_LENGTH (type) != REGISTER_RAW_SIZE (n))
+ {
+ double val = extract_floating (from, TYPE_LENGTH (type));
+ store_floating (to, REGISTER_RAW_SIZE (n), val);
+ }
+ else
+ memcpy (to, from, REGISTER_RAW_SIZE (n));
+}
+
+/* Store the address of the place in which to copy the structure the
+ subroutine will return. This is called from call_function.
+
+ In RS6000, struct return addresses are passed as an extra parameter in r3.
+ In function return, callee is not responsible of returning this address
+ back. Since gdb needs to find it, we will store in a designated variable
+ `rs6000_struct_return_address'. */
+
+static void
+rs6000_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
+{
+ write_register (3, addr);
+ rs6000_struct_return_address = addr;
+}
+
+/* Write into appropriate registers a function return value
+ of type TYPE, given in virtual format. */
+
+static void
+rs6000_store_return_value (struct type *type, char *valbuf)
+{
+ if (TYPE_CODE (type) == TYPE_CODE_FLT)
+
+ /* Floating point values are returned starting from FPR1 and up.
+ Say a double_double_double type could be returned in
+ FPR1/FPR2/FPR3 triple. */
+
+ write_register_bytes (REGISTER_BYTE (FP0_REGNUM + 1), valbuf,
+ TYPE_LENGTH (type));
+ else
+ /* Everything else is returned in GPR3 and up. */
+ write_register_bytes (REGISTER_BYTE (GP0_REGNUM + 3), valbuf,
+ TYPE_LENGTH (type));
+}
+
+/* Extract from an array REGBUF containing the (raw) register state
+ the address in which a function should return its structure value,
+ as a CORE_ADDR (or an expression that can be used as one). */
+
+static CORE_ADDR
+rs6000_extract_struct_value_address (char *regbuf)
+{
+ return rs6000_struct_return_address;
+}
+
+/* Return whether PC is in a dummy function call.
+
+ FIXME: This just checks for the end of the stack, which is broken
+ for things like stepping through gcc nested function stubs. */
+
+static int
+rs6000_pc_in_call_dummy (CORE_ADDR pc, CORE_ADDR sp, CORE_ADDR fp)
+{
+ return sp < pc && pc < fp;
+}
+
+/* Hook called when a new child process is started. */
+
+void
+rs6000_create_inferior (int pid)
+{
+ if (rs6000_set_host_arch_hook)
+ rs6000_set_host_arch_hook (pid);
+ dummy_init ();
+}
+/* Support for CONVERT_FROM_FUNC_PTR_ADDR(ADDR).
+
+ Usually a function pointer's representation is simply the address
+ of the function. On the RS/6000 however, a function pointer is
+ represented by a pointer to a TOC entry. This TOC entry contains
+ three words, the first word is the address of the function, the
+ second word is the TOC pointer (r2), and the third word is the
+ static chain value. Throughout GDB it is currently assumed that a
+ function pointer contains the address of the function, which is not
+ easy to fix. In addition, the conversion of a function address to
+ a function pointer would require allocation of a TOC entry in the
+ inferior's memory space, with all its drawbacks. To be able to
+ call C++ virtual methods in the inferior (which are called via
+ function pointers), find_function_addr uses this macro to get the
+ function address from a function pointer. */
+
/* Return nonzero if ADDR (a function pointer) is in the data space and
is therefore a special function pointer. */
-int
-is_magic_function_pointer (addr)
- CORE_ADDR addr;
+CORE_ADDR
+rs6000_convert_from_func_ptr_addr (CORE_ADDR addr)
{
struct obj_section *s;
s = find_pc_section (addr);
if (s && s->the_bfd_section->flags & SEC_CODE)
- return 0;
- else
- return 1;
-}
+ return addr;
-#ifdef GDB_TARGET_POWERPC
-int
-gdb_print_insn_powerpc (memaddr, info)
- bfd_vma memaddr;
- disassemble_info *info;
-{
- if (TARGET_BYTE_ORDER == BIG_ENDIAN)
- return print_insn_big_powerpc (memaddr, info);
- else
- return print_insn_little_powerpc (memaddr, info);
+ /* ADDR is in the data space, so it's a special function pointer. */
+ return read_memory_addr (addr, TDEP->wordsize);
}
-#endif
/* Handling the various PowerPC/RS6000 variants. */
-/* The arrays here called register_names_MUMBLE hold names that
- the rs6000_register_name function returns.
+/* The arrays here called registers_MUMBLE hold information about available
+ registers.
For each family of PPC variants, I've tried to isolate out the
common registers and put them up front, so that as long as you get
@@ -1565,161 +1904,222 @@
Most of these register groups aren't anything formal. I arrived at
them by looking at the registers that occurred in more than one
- processor. */
+ processor. */
+
+/* Convenience macros for populating register arrays. */
-/* UISA register names common across all architectures, including POWER. */
+/* Within another macro, convert S to a string. */
-#define COMMON_UISA_REG_NAMES \
- /* 0 */ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
- /* 8 */ "r8", "r9", "r10","r11","r12","r13","r14","r15", \
- /* 16 */ "r16","r17","r18","r19","r20","r21","r22","r23", \
- /* 24 */ "r24","r25","r26","r27","r28","r29","r30","r31", \
- /* 32 */ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
- /* 40 */ "f8", "f9", "f10","f11","f12","f13","f14","f15", \
- /* 48 */ "f16","f17","f18","f19","f20","f21","f22","f23", \
- /* 56 */ "f24","f25","f26","f27","f28","f29","f30","f31", \
- /* 64 */ "pc", "ps"
-
-/* UISA-level SPR names for PowerPC. */
-#define PPC_UISA_SPR_NAMES \
- /* 66 */ "cr", "lr", "ctr", "xer", ""
-
-/* Segment register names, for PowerPC. */
-#define PPC_SEGMENT_REG_NAMES \
- /* 71 */ "sr0", "sr1", "sr2", "sr3", "sr4", "sr5", "sr6", "sr7", \
- /* 79 */ "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15"
-
-/* OEA SPR names for 32-bit PowerPC implementations.
- The blank space is for "asr", which is only present on 64-bit
- implementations. */
-#define PPC_32_OEA_SPR_NAMES \
- /* 87 */ "pvr", \
- /* 88 */ "ibat0u", "ibat0l", "ibat1u", "ibat1l", \
- /* 92 */ "ibat2u", "ibat2l", "ibat3u", "ibat3l", \
- /* 96 */ "dbat0u", "dbat0l", "dbat1u", "dbat1l", \
- /* 100 */ "dbat2u", "dbat2l", "dbat3u", "dbat3l", \
- /* 104 */ "sdr1", "", "dar", "dsisr", "sprg0", "sprg1", "sprg2", "sprg3",\
- /* 112 */ "srr0", "srr1", "tbl", "tbu", "dec", "dabr", "ear"
+#define STR(s) #s
-/* For the RS6000, we only cover user-level SPR's. */
-char *register_names_rs6000[] =
+/* Return a struct reg defining register NAME that's 32 bits on 32-bit systems
+ and 64 bits on 64-bit systems. */
+#define R(name) { STR(name), 4, 8, 0 }
+
+/* Return a struct reg defining register NAME that's 32 bits on all
+ systems. */
+#define R4(name) { STR(name), 4, 4, 0 }
+
+/* Return a struct reg defining register NAME that's 64 bits on all
+ systems. */
+#define R8(name) { STR(name), 8, 8, 0 }
+
+/* Return a struct reg defining floating-point register NAME. */
+#define F(name) { STR(name), 8, 8, 1 }
+
+/* Return a struct reg defining register NAME that's 32 bits on 32-bit
+ systems and that doesn't exist on 64-bit systems. */
+#define R32(name) { STR(name), 4, 0, 0 }
+
+/* Return a struct reg defining register NAME that's 64 bits on 64-bit
+ systems and that doesn't exist on 32-bit systems. */
+#define R64(name) { STR(name), 0, 8, 0 }
+
+/* Return a struct reg placeholder for a register that doesn't exist. */
+#define R0 { 0, 0, 0, 0 }
+
+/* UISA registers common across all architectures, including POWER. */
+
+#define COMMON_UISA_REGS \
+ /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
+ /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
+ /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
+ /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
+ /* 32 */ F(f0), F(f1), F(f2), F(f3), F(f4), F(f5), F(f6), F(f7), \
+ /* 40 */ F(f8), F(f9), F(f10),F(f11),F(f12),F(f13),F(f14),F(f15), \
+ /* 48 */ F(f16),F(f17),F(f18),F(f19),F(f20),F(f21),F(f22),F(f23), \
+ /* 56 */ F(f24),F(f25),F(f26),F(f27),F(f28),F(f29),F(f30),F(f31), \
+ /* 64 */ R(pc), R(ps)
+
+/* UISA-level SPRs for PowerPC. */
+#define PPC_UISA_SPRS \
+ /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R0
+
+/* Segment registers, for PowerPC. */
+#define PPC_SEGMENT_REGS \
+ /* 71 */ R32(sr0), R32(sr1), R32(sr2), R32(sr3), \
+ /* 75 */ R32(sr4), R32(sr5), R32(sr6), R32(sr7), \
+ /* 79 */ R32(sr8), R32(sr9), R32(sr10), R32(sr11), \
+ /* 83 */ R32(sr12), R32(sr13), R32(sr14), R32(sr15)
+
+/* OEA SPRs for PowerPC. */
+#define PPC_OEA_SPRS \
+ /* 87 */ R4(pvr), \
+ /* 88 */ R(ibat0u), R(ibat0l), R(ibat1u), R(ibat1l), \
+ /* 92 */ R(ibat2u), R(ibat2l), R(ibat3u), R(ibat3l), \
+ /* 96 */ R(dbat0u), R(dbat0l), R(dbat1u), R(dbat1l), \
+ /* 100 */ R(dbat2u), R(dbat2l), R(dbat3u), R(dbat3l), \
+ /* 104 */ R(sdr1), R64(asr), R(dar), R4(dsisr), \
+ /* 108 */ R(sprg0), R(sprg1), R(sprg2), R(sprg3), \
+ /* 112 */ R(srr0), R(srr1), R(tbl), R(tbu), \
+ /* 116 */ R4(dec), R(dabr), R4(ear)
+
+/* IBM RS6000 ("POWER") architecture, user-level view. For the RS6000, we
+ only cover user-level SPR's. */
+static const struct reg registers_rs6000[] =
{
- COMMON_UISA_REG_NAMES,
- /* 66 */ "cnd", "lr", "cnt", "xer", "mq"
+ COMMON_UISA_REGS,
+ /* 66 */ R4(cnd), R(lr), R(cnt), R4(xer), R4(mq)
};
-/* a UISA-only view of the PowerPC. */
-char *register_names_uisa[] =
+/* PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only
+ view of the PowerPC. */
+static const struct reg registers_uisa[] =
{
- COMMON_UISA_REG_NAMES,
- PPC_UISA_SPR_NAMES
+ COMMON_UISA_REGS,
+ PPC_UISA_SPRS
};
-char *register_names_403[] =
+/* IBM PowerPC 403. */
+static const struct reg registers_403[] =
{
- COMMON_UISA_REG_NAMES,
- PPC_UISA_SPR_NAMES,
- PPC_SEGMENT_REG_NAMES,
- PPC_32_OEA_SPR_NAMES,
- /* 119 */ "icdbdr", "esr", "dear", "evpr", "cdbcr", "tsr", "tcr", "pit",
- /* 127 */ "tbhi", "tblo", "srr2", "srr3", "dbsr", "dbcr", "iac1", "iac2",
- /* 135 */ "dac1", "dac2", "dccr", "iccr", "pbl1", "pbu1", "pbl2", "pbu2"
+ COMMON_UISA_REGS,
+ PPC_UISA_SPRS,
+ PPC_SEGMENT_REGS,
+ PPC_OEA_SPRS,
+ /* 119 */ R(icdbdr), R(esr), R(dear), R(evpr),
+ /* 123 */ R(cdbcr), R(tsr), R(tcr), R(pit),
+ /* 127 */ R(tbhi), R(tblo), R(srr2), R(srr3),
+ /* 131 */ R(dbsr), R(dbcr), R(iac1), R(iac2),
+ /* 135 */ R(dac1), R(dac2), R(dccr), R(iccr),
+ /* 139 */ R(pbl1), R(pbu1), R(pbl2), R(pbu2)
};
-char *register_names_403GC[] =
+/* IBM PowerPC 403GC. */
+static const struct reg registers_403GC[] =
{
- COMMON_UISA_REG_NAMES,
- PPC_UISA_SPR_NAMES,
- PPC_SEGMENT_REG_NAMES,
- PPC_32_OEA_SPR_NAMES,
- /* 119 */ "icdbdr", "esr", "dear", "evpr", "cdbcr", "tsr", "tcr", "pit",
- /* 127 */ "tbhi", "tblo", "srr2", "srr3", "dbsr", "dbcr", "iac1", "iac2",
- /* 135 */ "dac1", "dac2", "dccr", "iccr", "pbl1", "pbu1", "pbl2", "pbu2",
- /* 143 */ "zpr", "pid", "sgr", "dcwr", "tbhu", "tblu"
+ COMMON_UISA_REGS,
+ PPC_UISA_SPRS,
+ PPC_SEGMENT_REGS,
+ PPC_OEA_SPRS,
+ /* 119 */ R(icdbdr), R(esr), R(dear), R(evpr),
+ /* 123 */ R(cdbcr), R(tsr), R(tcr), R(pit),
+ /* 127 */ R(tbhi), R(tblo), R(srr2), R(srr3),
+ /* 131 */ R(dbsr), R(dbcr), R(iac1), R(iac2),
+ /* 135 */ R(dac1), R(dac2), R(dccr), R(iccr),
+ /* 139 */ R(pbl1), R(pbu1), R(pbl2), R(pbu2),
+ /* 143 */ R(zpr), R(pid), R(sgr), R(dcwr),
+ /* 147 */ R(tbhu), R(tblu)
};
-char *register_names_505[] =
+/* Motorola PowerPC 505. */
+static const struct reg registers_505[] =
{
- COMMON_UISA_REG_NAMES,
- PPC_UISA_SPR_NAMES,
- PPC_SEGMENT_REG_NAMES,
- PPC_32_OEA_SPR_NAMES,
- /* 119 */ "eie", "eid", "nri"
+ COMMON_UISA_REGS,
+ PPC_UISA_SPRS,
+ PPC_SEGMENT_REGS,
+ PPC_OEA_SPRS,
+ /* 119 */ R(eie), R(eid), R(nri)
};
-char *register_names_860[] =
+/* Motorola PowerPC 860 or 850. */
+static const struct reg registers_860[] =
{
- COMMON_UISA_REG_NAMES,
- PPC_UISA_SPR_NAMES,
- PPC_SEGMENT_REG_NAMES,
- PPC_32_OEA_SPR_NAMES,
- /* 119 */ "eie", "eid", "nri", "cmpa", "cmpb", "cmpc", "cmpd", "icr",
- /* 127 */ "der", "counta", "countb", "cmpe", "cmpf", "cmpg", "cmph",
- /* 134 */ "lctrl1", "lctrl2", "ictrl", "bar", "ic_cst", "ic_adr", "ic_dat",
- /* 141 */ "dc_cst", "dc_adr", "dc_dat", "dpdr", "dpir", "immr", "mi_ctr",
- /* 148 */ "mi_ap", "mi_epn", "mi_twc", "mi_rpn", "md_ctr", "m_casid",
- /* 154 */ "md_ap", "md_epn", "md_twb", "md_twc", "md_rpn", "m_tw",
- /* 160 */ "mi_dbcam", "mi_dbram0", "mi_dbram1", "md_dbcam", "md_dbram0",
- /* 165 */ "md_dbram1"
+ COMMON_UISA_REGS,
+ PPC_UISA_SPRS,
+ PPC_SEGMENT_REGS,
+ PPC_OEA_SPRS,
+ /* 119 */ R(eie), R(eid), R(nri), R(cmpa),
+ /* 123 */ R(cmpb), R(cmpc), R(cmpd), R(icr),
+ /* 127 */ R(der), R(counta), R(countb), R(cmpe),
+ /* 131 */ R(cmpf), R(cmpg), R(cmph), R(lctrl1),
+ /* 135 */ R(lctrl2), R(ictrl), R(bar), R(ic_cst),
+ /* 139 */ R(ic_adr), R(ic_dat), R(dc_cst), R(dc_adr),
+ /* 143 */ R(dc_dat), R(dpdr), R(dpir), R(immr),
+ /* 147 */ R(mi_ctr), R(mi_ap), R(mi_epn), R(mi_twc),
+ /* 151 */ R(mi_rpn), R(md_ctr), R(m_casid), R(md_ap),
+ /* 155 */ R(md_epn), R(md_twb), R(md_twc), R(md_rpn),
+ /* 159 */ R(m_tw), R(mi_dbcam), R(mi_dbram0), R(mi_dbram1),
+ /* 163 */ R(md_dbcam), R(md_dbram0), R(md_dbram1)
};
-/* Note that the 601 has different register numbers for reading and
- writing RTCU and RTCL. However, how one reads and writes a
+/* Motorola PowerPC 601. Note that the 601 has different register numbers
+ for reading and writing RTCU and RTCL. However, how one reads and writes a
register is the stub's problem. */
-char *register_names_601[] =
+static const struct reg registers_601[] =
{
- COMMON_UISA_REG_NAMES,
- PPC_UISA_SPR_NAMES,
- PPC_SEGMENT_REG_NAMES,
- PPC_32_OEA_SPR_NAMES,
- /* 119 */ "hid0", "hid1", "iabr", "dabr", "pir", "mq", "rtcu",
- /* 126 */ "rtcl"
+ COMMON_UISA_REGS,
+ PPC_UISA_SPRS,
+ PPC_SEGMENT_REGS,
+ PPC_OEA_SPRS,
+ /* 119 */ R(hid0), R(hid1), R(iabr), R(dabr),
+ /* 123 */ R(pir), R(mq), R(rtcu), R(rtcl)
};
-char *register_names_602[] =
+/* Motorola PowerPC 602. */
+static const struct reg registers_602[] =
{
- COMMON_UISA_REG_NAMES,
- PPC_UISA_SPR_NAMES,
- PPC_SEGMENT_REG_NAMES,
- PPC_32_OEA_SPR_NAMES,
- /* 119 */ "hid0", "hid1", "iabr", "", "", "tcr", "ibr", "esassr", "sebr",
- /* 128 */ "ser", "sp", "lt"
+ COMMON_UISA_REGS,
+ PPC_UISA_SPRS,
+ PPC_SEGMENT_REGS,
+ PPC_OEA_SPRS,
+ /* 119 */ R(hid0), R(hid1), R(iabr), R0,
+ /* 123 */ R0, R(tcr), R(ibr), R(esassr),
+ /* 127 */ R(sebr), R(ser), R(sp), R(lt)
};
-char *register_names_603[] =
+/* Motorola/IBM PowerPC 603 or 603e. */
+static const struct reg registers_603[] =
{
- COMMON_UISA_REG_NAMES,
- PPC_UISA_SPR_NAMES,
- PPC_SEGMENT_REG_NAMES,
- PPC_32_OEA_SPR_NAMES,
- /* 119 */ "hid0", "hid1", "iabr", "", "", "dmiss", "dcmp", "hash1",
- /* 127 */ "hash2", "imiss", "icmp", "rpa"
+ COMMON_UISA_REGS,
+ PPC_UISA_SPRS,
+ PPC_SEGMENT_REGS,
+ PPC_OEA_SPRS,
+ /* 119 */ R(hid0), R(hid1), R(iabr), R0,
+ /* 123 */ R0, R(dmiss), R(dcmp), R(hash1),
+ /* 127 */ R(hash2), R(imiss), R(icmp), R(rpa)
};
-char *register_names_604[] =
+/* Motorola PowerPC 604 or 604e. */
+static const struct reg registers_604[] =
{
- COMMON_UISA_REG_NAMES,
- PPC_UISA_SPR_NAMES,
- PPC_SEGMENT_REG_NAMES,
- PPC_32_OEA_SPR_NAMES,
- /* 119 */ "hid0", "hid1", "iabr", "dabr", "pir", "mmcr0", "pmc1", "pmc2",
- /* 127 */ "sia", "sda"
+ COMMON_UISA_REGS,
+ PPC_UISA_SPRS,
+ PPC_SEGMENT_REGS,
+ PPC_OEA_SPRS,
+ /* 119 */ R(hid0), R(hid1), R(iabr), R(dabr),
+ /* 123 */ R(pir), R(mmcr0), R(pmc1), R(pmc2),
+ /* 127 */ R(sia), R(sda)
};
-char *register_names_750[] =
+/* Motorola/IBM PowerPC 750 or 740. */
+static const struct reg registers_750[] =
{
- COMMON_UISA_REG_NAMES,
- PPC_UISA_SPR_NAMES,
- PPC_SEGMENT_REG_NAMES,
- PPC_32_OEA_SPR_NAMES,
- /* 119 */ "hid0", "hid1", "iabr", "dabr", "", "ummcr0", "upmc1", "upmc2",
- /* 127 */ "usia", "ummcr1", "upmc3", "upmc4", "mmcr0", "pmc1", "pmc2",
- /* 134 */ "sia", "mmcr1", "pmc3", "pmc4", "l2cr", "ictc", "thrm1", "thrm2",
- /* 142 */ "thrm3"
+ COMMON_UISA_REGS,
+ PPC_UISA_SPRS,
+ PPC_SEGMENT_REGS,
+ PPC_OEA_SPRS,
+ /* 119 */ R(hid0), R(hid1), R(iabr), R(dabr),
+ /* 123 */ R0, R(ummcr0), R(upmc1), R(upmc2),
+ /* 127 */ R(usia), R(ummcr1), R(upmc3), R(upmc4),
+ /* 131 */ R(mmcr0), R(pmc1), R(pmc2), R(sia),
+ /* 135 */ R(mmcr1), R(pmc3), R(pmc4), R(l2cr),
+ /* 139 */ R(ictc), R(thrm1), R(thrm2), R(thrm3)
};
/* Information about a particular processor variant. */
+
struct variant
{
/* Name of this variant. */
@@ -1728,10 +2128,16 @@
/* English description of the variant. */
char *description;
+ /* bfd_arch_info.arch corresponding to variant. */
+ enum bfd_architecture arch;
+
+ /* bfd_arch_info.mach corresponding to variant. */
+ unsigned long mach;
+
/* Table of register names; registers[R] is the name of the register
number R. */
- int num_registers;
- char **registers;
+ int nregs;
+ const struct reg *regs;
};
#define num_registers(list) (sizeof (list) / sizeof((list)[0]))
@@ -1747,186 +2153,285 @@
If you add entries to this table, please be sure to allow the new
value as an argument to the --with-cpu flag, in configure.in. */
-static struct variant
- variants[] =
+static const struct variant variants[] =
{
- {"ppc-uisa", "PowerPC UISA - a PPC processor as viewed by user-level code",
- num_registers (register_names_uisa), register_names_uisa},
- {"rs6000", "IBM RS6000 (\"POWER\") architecture, user-level view",
- num_registers (register_names_rs6000), register_names_rs6000},
- {"403", "IBM PowerPC 403",
- num_registers (register_names_403), register_names_403},
- {"403GC", "IBM PowerPC 403GC",
- num_registers (register_names_403GC), register_names_403GC},
- {"505", "Motorola PowerPC 505",
- num_registers (register_names_505), register_names_505},
- {"860", "Motorola PowerPC 860 or 850",
- num_registers (register_names_860), register_names_860},
- {"601", "Motorola PowerPC 601",
- num_registers (register_names_601), register_names_601},
- {"602", "Motorola PowerPC 602",
- num_registers (register_names_602), register_names_602},
- {"603", "Motorola/IBM PowerPC 603 or 603e",
- num_registers (register_names_603), register_names_603},
- {"604", "Motorola PowerPC 604 or 604e",
- num_registers (register_names_604), register_names_604},
- {"750", "Motorola/IBM PowerPC 750 or 740",
- num_registers (register_names_750), register_names_750},
+ {"ppc-uisa", "PowerPC user-level", bfd_arch_powerpc,
+ bfd_mach_ppc, num_registers (registers_uisa), registers_uisa},
+ {"rs6000", "IBM RS6000 user-level", bfd_arch_rs6000,
+ bfd_mach_rs6k, num_registers (registers_rs6000), registers_rs6000},
+ {"403", "IBM PowerPC 403", bfd_arch_powerpc,
+ bfd_mach_ppc_403, num_registers (registers_403), registers_403},
+ {"601", "Motorola PowerPC 601", bfd_arch_powerpc,
+ bfd_mach_ppc_601, num_registers (registers_601), registers_601},
+ {"602", "Motorola PowerPC 602", bfd_arch_powerpc,
+ bfd_mach_ppc_602, num_registers (registers_602), registers_602},
+ {"603", "Motorola/IBM PowerPC 603 or 603e", bfd_arch_powerpc,
+ bfd_mach_ppc_603, num_registers (registers_603), registers_603},
+ {"604", "Motorola PowerPC 604 or 604e", bfd_arch_powerpc,
+ 604, num_registers (registers_604), registers_604},
+ {"403GC", "IBM PowerPC 403GC", bfd_arch_powerpc,
+ bfd_mach_ppc_403gc, num_registers (registers_403GC), registers_403GC},
+ {"505", "Motorola PowerPC 505", bfd_arch_powerpc,
+ bfd_mach_ppc_505, num_registers (registers_505), registers_505},
+ {"860", "Motorola PowerPC 860 or 850", bfd_arch_powerpc,
+ bfd_mach_ppc_860, num_registers (registers_860), registers_860},
+ {"750", "Motorola/IBM PowerPC 750 or 740", bfd_arch_powerpc,
+ bfd_mach_ppc_750, num_registers (registers_750), registers_750},
+
+ /* FIXME: I haven't checked the register sets of the following. */
+ {"620", "Motorola PowerPC 620", bfd_arch_powerpc,
+ bfd_mach_ppc_620, num_registers (registers_uisa), registers_uisa},
+ {"a35", "PowerPC A35", bfd_arch_powerpc,
+ bfd_mach_ppc_a35, num_registers (registers_uisa), registers_uisa},
+ {"rs1", "IBM RS6000 RS1", bfd_arch_rs6000,
+ bfd_mach_rs6k_rs1, num_registers (registers_rs6000), registers_rs6000},
+ {"rsc", "IBM RS6000 RSC", bfd_arch_rs6000,
+ bfd_mach_rs6k_rsc, num_registers (registers_rs6000), registers_rs6000},
+ {"rs2", "IBM RS6000 RS2", bfd_arch_rs6000,
+ bfd_mach_rs6k_rs2, num_registers (registers_rs6000), registers_rs6000},
+
{0, 0, 0, 0}
};
+#undef num_registers
-static struct variant *current_variant;
+/* Look up the variant named NAME in the `variants' table. Return a
+ pointer to the struct variant, or null if we couldn't find it. */
-char *
-rs6000_register_name (int i)
+static const struct variant *
+find_variant_by_name (char *name)
{
- if (i < 0 || i >= NUM_REGS)
- error ("GDB bug: rs6000-tdep.c (rs6000_register_name): strange register number");
+ const struct variant *v;
- return ((i < current_variant->num_registers)
- ? current_variant->registers[i]
- : "");
-}
+ for (v = variants; v->name; v++)
+ if (!strcmp (name, v->name))
+ return v;
-
-static void
-install_variant (struct variant *v)
-{
- current_variant = v;
+ return NULL;
}
+/* Return the variant corresponding to architecture ARCH and machine number
+ MACH. If no such variant exists, return null. */
-/* Look up the variant named NAME in the `variants' table. Return a
- pointer to the struct variant, or null if we couldn't find it. */
-static struct variant *
-find_variant_by_name (char *name)
+static const struct variant *
+find_variant_by_arch (enum bfd_architecture arch, unsigned long mach)
{
- int i;
+ const struct variant *v;
- for (i = 0; variants[i].name; i++)
- if (!strcmp (name, variants[i].name))
- return &variants[i];
+ for (v = variants; v->name; v++)
+ if (arch == v->arch && mach == v->mach)
+ return v;
- return 0;
+ return NULL;
}
+
-/* Install the PPC/RS6000 variant named NAME in the `variants' table.
- Return zero if we installed it successfully, or a non-zero value if
- we couldn't do it.
-
- This might be useful to code outside this file, which doesn't want
- to depend on the exact indices of the entries in the `variants'
- table. Just make it non-static if you want that. */
-static int
-install_variant_by_name (char *name)
-{
- struct variant *v = find_variant_by_name (name);
-
- if (v)
+/* Initialize the current architecture based on INFO. If possible, re-use an
+ architecture from ARCHES, which is a list of architectures already created
+ during this debugging session.
+
+ Called e.g. at program startup, when reading a core file, and when reading
+ a binary file. */
+
+static struct gdbarch *
+rs6000_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
+{
+ struct gdbarch *gdbarch;
+ struct gdbarch_tdep *tdep;
+ int wordsize, fromexec, rs6000, i, off;
+ struct reg *regs;
+ const struct variant *v;
+ enum bfd_architecture arch;
+ unsigned long mach;
+ bfd abfd;
+
+ fromexec = info.abfd && info.abfd->format == bfd_object &&
+ bfd_get_flavour (info.abfd) == bfd_target_xcoff_flavour;
+
+ /* Check word size. If INFO is from a binary file, infer it from that,
+ else use the previously-inferred size. */
+ if (fromexec)
{
- install_variant (v);
- return 0;
+ if (xcoff_data (info.abfd)->xcoff64)
+ wordsize = 8;
+ else
+ wordsize = 4;
}
else
- return 1;
-}
-
-
-static void
-list_variants ()
-{
- int i;
-
- printf_filtered ("GDB knows about the following PowerPC and RS6000 variants:\n");
-
- for (i = 0; variants[i].name; i++)
- printf_filtered (" %-8s %s\n",
- variants[i].name, variants[i].description);
-}
-
-
-static void
-show_current_variant ()
-{
- printf_filtered ("PowerPC / RS6000 processor variant is set to `%s'.\n",
- current_variant->name);
-}
+ {
+ tdep = TDEP;
+ if (tdep)
+ wordsize = tdep->wordsize;
+ else
+ wordsize = 4;
+ }
+ /* Find a candidate among extant architectures. */
+ for (arches = gdbarch_list_lookup_by_info (arches, &info);
+ arches != NULL;
+ arches = gdbarch_list_lookup_by_info (arches->next, &info))
+ {
+ /* Word size in the various PowerPC bfd_arch_info structs isn't
+ meaningful, because 64-bit CPUs can run in 32-bit mode. So, perform
+ separate word size check. */
+ tdep = gdbarch_tdep (arches->gdbarch);
+ if (tdep && tdep->wordsize == wordsize)
+ return arches->gdbarch;
+ }
+
+ /* None found, create a new architecture from INFO, whose bfd_arch_info
+ validity depends on the source:
+ - executable useless
+ - rs6000_host_arch() good
+ - core file good
+ - "set arch" trust blindly
+ - GDB startup useless but harmless */
-static void
-set_processor (char *arg, int from_tty)
-{
- if (!arg || arg[0] == '\0')
+ if (!fromexec)
{
- list_variants ();
- return;
+ arch = info.bfd_architecture;
+ mach = info.bfd_arch_info->mach;
}
-
- if (install_variant_by_name (arg))
+ else
{
- error_begin ();
- fprintf_filtered (gdb_stderr,
- "`%s' is not a recognized PowerPC / RS6000 variant name.\n\n", arg);
- list_variants ();
- return_to_top_level (RETURN_ERROR);
+ arch = bfd_arch_powerpc;
+ mach = 0;
+ bfd_default_set_arch_mach (&abfd, arch, mach);
+ info.bfd_arch_info = bfd_get_arch_info (&abfd);
+ }
+ tdep = xmalloc (sizeof (struct gdbarch_tdep));
+ tdep->wordsize = wordsize;
+ gdbarch = gdbarch_alloc (&info, tdep);
+ rs6000 = arch == bfd_arch_rs6000;
+
+ /* Select instruction printer. */
+ tm_print_insn = arch == rs6000 ? print_insn_rs6000 :
+ info.byte_order == BIG_ENDIAN ? print_insn_big_powerpc :
+ print_insn_little_powerpc;
+
+ /* Choose variant. */
+ v = find_variant_by_arch (arch, mach);
+ if (!v)
+ v = find_variant_by_name (rs6000 ? "rs6000" : "ppc-uisa");
+ tdep->regs = v->regs;
+
+ /* Calculate byte offsets in raw register array. */
+ tdep->regoff = xmalloc (v->nregs * sizeof (int));
+ for (i = off = 0; i < v->nregs; i++)
+ {
+ tdep->regoff[i] = off;
+ off += regsize (v->regs + i, wordsize);
+ }
+
+ set_gdbarch_read_pc (gdbarch, generic_target_read_pc);
+ set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
+ set_gdbarch_read_fp (gdbarch, generic_target_read_fp);
+ set_gdbarch_write_fp (gdbarch, generic_target_write_fp);
+ set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
+ set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
+
+ set_gdbarch_num_regs (gdbarch, v->nregs);
+ set_gdbarch_sp_regnum (gdbarch, 1);
+ set_gdbarch_fp_regnum (gdbarch, 1);
+ set_gdbarch_pc_regnum (gdbarch, 64);
+ set_gdbarch_register_name (gdbarch, rs6000_register_name);
+ set_gdbarch_register_size (gdbarch, wordsize);
+ set_gdbarch_register_bytes (gdbarch, off);
+ set_gdbarch_register_byte (gdbarch, rs6000_register_byte);
+ set_gdbarch_register_raw_size (gdbarch, rs6000_register_raw_size);
+ set_gdbarch_max_register_raw_size (gdbarch, 8);
+ set_gdbarch_register_virtual_size (gdbarch, rs6000_register_virtual_size);
+ set_gdbarch_max_register_virtual_size (gdbarch, 8);
+ set_gdbarch_register_virtual_type (gdbarch, rs6000_register_virtual_type);
+
+ set_gdbarch_ptr_bit (gdbarch, wordsize * TARGET_CHAR_BIT);
+ set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
+ set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT);
+ set_gdbarch_long_bit (gdbarch, wordsize * TARGET_CHAR_BIT);
+ set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
+ set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
+ set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
+ set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
+
+ if (rs6000)
+ {
+ set_gdbarch_use_generic_dummy_frames (gdbarch, 0);
+ set_gdbarch_push_dummy_frame (gdbarch, rs6000_push_dummy_frame);
+ set_gdbarch_get_saved_register (gdbarch, default_get_saved_register);
+ set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 0);
+ set_gdbarch_call_dummy_location (gdbarch, ON_STACK);
+ set_gdbarch_call_dummy_start_offset (gdbarch, 16);
}
+ else
+ {
+ set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
+ set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
+ set_gdbarch_push_return_address (gdbarch, ppc_push_return_address);
+ set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register);
+ set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
+ set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
+ set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
+ set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
+ set_gdbarch_call_dummy_start_offset (gdbarch, 0);
+ }
+ set_gdbarch_call_dummy_length (gdbarch, sizeof (rs6000_call_dummy_words) /
+ sizeof (LONGEST) * 4);
+ set_gdbarch_pc_in_call_dummy (gdbarch, rs6000_pc_in_call_dummy);
+ set_gdbarch_call_dummy_words (gdbarch, rs6000_call_dummy_words);
+ set_gdbarch_sizeof_call_dummy_words (gdbarch, sizeof (rs6000_call_dummy_words));
+ set_gdbarch_call_dummy_p (gdbarch, 1);
+ set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
+ set_gdbarch_fix_call_dummy (gdbarch, rs6000_fix_call_dummy);
+ set_gdbarch_believe_pcc_promotion (gdbarch, 1);
+ set_gdbarch_coerce_float_to_double (gdbarch, rs6000_coerce_float_to_double);
+
+ set_gdbarch_register_convertible (gdbarch, rs6000_register_convertible);
+ set_gdbarch_register_convert_to_virtual (gdbarch, rs6000_register_convert_to_virtual);
+ set_gdbarch_register_convert_to_raw (gdbarch, rs6000_register_convert_to_raw);
+
+ set_gdbarch_extract_return_value (gdbarch, rs6000_extract_return_value);
+ set_gdbarch_push_arguments (gdbarch, rs6000_push_arguments);
+
+ set_gdbarch_store_struct_return (gdbarch, rs6000_store_struct_return);
+ set_gdbarch_store_return_value (gdbarch, rs6000_store_return_value);
+ set_gdbarch_extract_struct_value_address (gdbarch, rs6000_extract_struct_value_address);
+ set_gdbarch_use_struct_convention (gdbarch, generic_use_struct_convention);
+
+ set_gdbarch_frame_init_saved_regs (gdbarch, rs6000_frame_init_saved_regs);
+ set_gdbarch_init_extra_frame_info (gdbarch, rs6000_init_extra_frame_info);
+
+ set_gdbarch_pop_frame (gdbarch, rs6000_pop_frame);
+
+ set_gdbarch_skip_prologue (gdbarch, rs6000_skip_prologue);
+ set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
+ set_gdbarch_decr_pc_after_break (gdbarch, 0);
+ set_gdbarch_function_start_offset (gdbarch, 0);
+ set_gdbarch_breakpoint_from_pc (gdbarch, rs6000_breakpoint_from_pc);
+
+ /* Not sure on this. FIXMEmgo */
+ set_gdbarch_frame_args_skip (gdbarch, 8);
+
+ set_gdbarch_frameless_function_invocation (gdbarch, rs6000_frameless_function_invocation);
+ set_gdbarch_frame_chain (gdbarch, rs6000_frame_chain);
+ set_gdbarch_frame_chain_valid (gdbarch, file_frame_chain_valid);
+ set_gdbarch_frame_saved_pc (gdbarch, rs6000_frame_saved_pc);
+ set_gdbarch_frame_args_address (gdbarch, rs6000_frame_args_address);
+ set_gdbarch_frame_locals_address (gdbarch, rs6000_frame_args_address);
+ set_gdbarch_saved_pc_after_call (gdbarch, rs6000_saved_pc_after_call);
+
+ /* We can't tell how many args there are
+ now that the C compiler delays popping them. */
+ set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
- show_current_variant ();
+ return gdbarch;
}
-static void
-show_processor (char *arg, int from_tty)
-{
- show_current_variant ();
-}
-
-
-
-
/* Initialization code. */
void
_initialize_rs6000_tdep ()
{
- /* FIXME, this should not be decided via ifdef. */
-#ifdef GDB_TARGET_POWERPC
- tm_print_insn = gdb_print_insn_powerpc;
-#else
- tm_print_insn = print_insn_rs6000;
-#endif
-
- /* I don't think we should use the set/show command arrangement
- here, because the way that's implemented makes it hard to do the
- error checking we want in a reasonable way. So we just add them
- as two separate commands. */
- add_cmd ("processor", class_support, set_processor,
- "`set processor NAME' sets the PowerPC/RS6000 variant to NAME.\n\
-If you set this, GDB will know about the special-purpose registers that are\n\
-available on the given variant.\n\
-Type `set processor' alone for a list of recognized variant names.",
- &setlist);
- add_cmd ("processor", class_support, show_processor,
- "Show the variant of the PowerPC or RS6000 processor in use.\n\
-Use `set processor' to change this.",
- &showlist);
-
- /* Set the current PPC processor variant. */
- {
- int status = 1;
-
-#ifdef TARGET_CPU_DEFAULT
- status = install_variant_by_name (TARGET_CPU_DEFAULT);
-#endif
-
- if (status)
- {
-#ifdef GDB_TARGET_POWERPC
- install_variant_by_name ("ppc-uisa");
-#else
- install_variant_by_name ("rs6000");
-#endif
- }
- }
+ register_gdbarch_init (bfd_arch_rs6000, rs6000_gdbarch_init);
+ register_gdbarch_init (bfd_arch_powerpc, rs6000_gdbarch_init);
}
Index: gdb/symfile.c
===================================================================
diff -u gdb/symfile.c gdb/symfile.c
--- gdb/symfile.c Thu Jun 8 13:07:21 2000
+++ gdb/symfile.c Thu Jun 8 13:06:14 2000
@@ -1143,11 +1143,6 @@
enum bfd_flavour our_flavour = bfd_get_flavour (objfile->obfd);
char *our_target = bfd_get_target (objfile->obfd);
- /* Special kludge for RS/6000 and PowerMac. See xcoffread.c. */
- if (STREQ (our_target, "aixcoff-rs6000") ||
- STREQ (our_target, "xcoff-powermac"))
- our_flavour = (enum bfd_flavour) -1;
-
/* Special kludge for apollo. See dstread.c. */
if (STREQN (our_target, "apollo", 6))
our_flavour = (enum bfd_flavour) -2;
Index: gdb/xcoffread.c
===================================================================
diff -u gdb/xcoffread.c gdb/xcoffread.c
--- gdb/xcoffread.c Thu Jun 8 13:07:22 2000
+++ gdb/xcoffread.c Thu Jun 8 13:06:15 2000
@@ -311,6 +311,7 @@
args.targ_index = secnum;
args.resultp = &off;
args.bfd_sect = §
+ args.objfile = objfile;
bfd_map_over_sections (objfile->obfd, find_targ_sec, &args);
return sect;
}
@@ -628,7 +629,11 @@
else
{
/* There was source with line numbers in include files. */
+
+ int linesz =
+ coff_data (this_symtab_psymtab->objfile->obfd)->local_linesz;
main_source_baseline = 0;
+
for (ii = 0; ii < inclIndx; ++ii)
{
struct subfile *tmpSubfile;
@@ -637,7 +642,7 @@
if (offset < inclTable[ii].begin)
{
enter_line_range
- (&main_subfile, offset, inclTable[ii].begin - LINESZ,
+ (&main_subfile, offset, inclTable[ii].begin - linesz,
start, 0, &main_source_baseline);
}
@@ -654,12 +659,12 @@
inclTable[ii].end, start, 0, firstLine);
if (offset <= inclTable[ii].end)
- offset = inclTable[ii].end + LINESZ;
+ offset = inclTable[ii].end + linesz;
}
/* All the include files' line have been processed at this point. Now,
enter remaining lines of the main file, if any left. */
- if (offset < max_offset + 1 - LINESZ)
+ if (offset < max_offset + 1 - linesz)
{
enter_line_range (&main_subfile, offset, 0, start, end,
&main_source_baseline);
@@ -795,10 +800,11 @@
{
unsigned int curoffset;
CORE_ADDR addr;
- struct external_lineno ext_lnno;
+ void *ext_lnno;
struct internal_lineno int_lnno;
unsigned int limit_offset;
bfd *abfd;
+ int linesz;
if (endoffset == 0 && startaddr == 0 && endaddr == 0)
return;
@@ -820,13 +826,16 @@
}
else
limit_offset -= 1;
+
abfd = this_symtab_psymtab->objfile->obfd;
+ linesz = coff_data (abfd)->local_linesz;
+ ext_lnno = alloca (linesz);
while (curoffset <= limit_offset)
{
bfd_seek (abfd, curoffset, SEEK_SET);
- bfd_read (&ext_lnno, sizeof (struct external_lineno), 1, abfd);
- bfd_coff_swap_lineno_in (abfd, &ext_lnno, &int_lnno);
+ bfd_read (ext_lnno, linesz, 1, abfd);
+ bfd_coff_swap_lineno_in (abfd, ext_lnno, &int_lnno);
/* Find the address this line represents. */
addr = (int_lnno.l_lnno
@@ -846,7 +855,7 @@
}
else
record_line (subfile, *firstLine + int_lnno.l_lnno, addr);
- curoffset += LINESZ;
+ curoffset += linesz;
}
}
@@ -954,6 +963,7 @@
char *strtbl = ((struct coff_symfile_info *) objfile->sym_private)->strtbl;
char *debugsec =
((struct coff_symfile_info *) objfile->sym_private)->debugsec;
+ char *debugfmt = xcoff_data (abfd)->xcoff64 ? "XCOFF64" : "XCOFF";
struct internal_syment symbol[1];
union internal_auxent main_aux;
@@ -991,7 +1001,7 @@
start_stabs ();
start_symtab (filestring, (char *) NULL, file_start_addr);
- record_debugformat ("XCOFF");
+ record_debugformat (debugfmt);
symnum = ((struct symloc *) pst->read_symtab_private)->first_symnum;
max_symnum =
symnum + ((struct symloc *) pst->read_symtab_private)->numsyms;
@@ -1055,7 +1065,7 @@
cs->c_secnum = symbol->n_scnum;
cs->c_type = (unsigned) symbol->n_type;
- raw_symbol += coff_data (abfd)->local_symesz;
+ raw_symbol += local_symesz;
++symnum;
/* Save addr of first aux entry. */
@@ -1085,7 +1095,7 @@
start_stabs ();
start_symtab ("_globals_", (char *) NULL, (CORE_ADDR) 0);
- record_debugformat ("XCOFF");
+ record_debugformat (debugfmt);
cur_src_end_addr = first_object_file_end;
/* done with all files, everything from here on is globals */
}
@@ -1150,7 +1160,7 @@
/* Give all csects for this source file the same
name. */
start_symtab (filestring, NULL, (CORE_ADDR) 0);
- record_debugformat ("XCOFF");
+ record_debugformat (debugfmt);
}
/* If this is the very first csect seen,
@@ -1279,7 +1289,7 @@
start_stabs ();
start_symtab (filestring, (char *) NULL, (CORE_ADDR) 0);
- record_debugformat ("XCOFF");
+ record_debugformat (debugfmt);
last_csect_name = 0;
/* reset file start and end addresses. A compilation unit with no text
@@ -1510,7 +1520,7 @@
memset (sym, '\0', sizeof (struct symbol));
/* default assumptions */
- SYMBOL_VALUE (sym) = cs->c_value + off;
+ SYMBOL_VALUE_ADDRESS (sym) = cs->c_value + off;
SYMBOL_NAMESPACE (sym) = VAR_NAMESPACE;
SYMBOL_SECTION (sym) = secnum_to_section (cs->c_secnum, objfile);
@@ -1603,7 +1613,7 @@
cs->c_name, 0, 0, objfile);
if (sym != NULL)
{
- SYMBOL_VALUE (sym) += static_block_base;
+ SYMBOL_VALUE_ADDRESS (sym) += static_block_base;
SYMBOL_SECTION (sym) = static_block_section;
}
return sym;
@@ -1681,12 +1691,15 @@
read_symbol_lineno (symno)
int symno;
{
- int nsyms =
- ((struct coff_symfile_info *) this_symtab_psymtab->objfile->sym_private)
- ->symtbl_num_syms;
- char *stbl =
- ((struct coff_symfile_info *) this_symtab_psymtab->objfile->sym_private)
- ->symtbl;
+ struct objfile *objfile = this_symtab_psymtab->objfile;
+ boolean xcoff64 = xcoff_data (objfile->obfd)->xcoff64;
+
+ struct coff_symfile_info *info =
+ (struct coff_symfile_info *)objfile->sym_private;
+ int nsyms = info->symtbl_num_syms;
+ char *stbl = info->symtbl;
+ char *strtbl = info->strtbl;
+
struct internal_syment symbol[1];
union internal_auxent main_aux[1];
@@ -1716,8 +1729,12 @@
{
bfd_coff_swap_sym_in (symfile_bfd,
stbl + (symno * local_symesz), symbol);
- if (symbol->n_sclass == C_FCN && STREQ (symbol->n_name, ".bf"))
- goto gotit;
+ if (symbol->n_sclass == C_FCN)
+ {
+ char *name = xcoff64 ? strtbl + symbol->n_offset : symbol->n_name;
+ if (STREQ (name, ".bf"))
+ goto gotit;
+ }
symno += symbol->n_numaux + 1;
}
@@ -1727,8 +1744,7 @@
gotit:
/* take aux entry and return its lineno */
symno++;
- bfd_coff_swap_aux_in (this_symtab_psymtab->objfile->obfd,
- stbl + symno * local_symesz,
+ bfd_coff_swap_aux_in (objfile->obfd, stbl + symno * local_symesz,
symbol->n_type, symbol->n_sclass,
0, symbol->n_numaux, main_aux);
@@ -2242,7 +2258,7 @@
ssymnum = 0;
while (ssymnum < nsyms)
{
- int sclass = ((struct external_syment *) sraw_symbol)->e_sclass[0] & 0xff;
+ int sclass;
/* This is the type we pass to partial-stab.h. A less kludgy solution
would be to break out partial-stab.h into its various parts--shuffle
off the DBXREAD_ONLY stuff to dbxread.c, and make separate
@@ -2251,6 +2267,9 @@
QUIT;
+ bfd_coff_swap_sym_in (abfd, sraw_symbol, &symbol);
+ sclass = symbol.n_sclass;
+
switch (sclass)
{
case C_EXT:
@@ -2558,10 +2577,9 @@
{
/* We probably could save a few instructions by assuming that
C_LSYM, C_PSYM, etc., never have auxents. */
- int naux1 =
- ((struct external_syment *) sraw_symbol)->e_numaux[0] + 1;
+ int naux1 = symbol.n_numaux + 1;
ssymnum += naux1;
- sraw_symbol += sizeof (struct external_syment) * naux1;
+ sraw_symbol += bfd_coff_symesz (abfd) * naux1;
}
break;
@@ -2580,7 +2598,7 @@
case C_DECL:
case C_STSYM:
stype = N_LSYM;
- pstab:;
+ pstab:
swap_sym (&symbol, &main_aux[0], &namestring, &sraw_symbol,
&ssymnum, objfile);
#define CUR_SYMBOL_TYPE stype
@@ -2790,8 +2808,7 @@
static struct sym_fns xcoff_sym_fns =
{
- /* Because the bfd uses coff_flavour, we need to specially kludge
- the flavour. It is possible that coff and xcoff should be merged as
+ /* It is possible that coff and xcoff should be merged as
they do have fundamental similarities (for example, the extra storage
classes used for stabs could presumably be recognized in any COFF file).
However, in addition to obvious things like all the csect hair, there are
@@ -2800,7 +2817,7 @@
xcoffread.c reads all the symbols and does in fact randomly access them
(in C_BSTAT and line number processing). */
- (enum bfd_flavour) -1,
+ bfd_target_xcoff_flavour,
xcoff_new_init, /* sym_new_init: init anything gbl to entire symtab */
xcoff_symfile_init, /* sym_init: read initial info, setup for sym_read() */