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src/sim/frv ChangeLog arch.h cpu.h decode.c de ...
- From: brolley at sources dot redhat dot com
- To: gdb-cvs at sources dot redhat dot com
- Date: 24 Sep 2003 19:05:39 -0000
- Subject: src/sim/frv ChangeLog arch.h cpu.h decode.c de ...
CVSROOT: /cvs/src
Module name: src
Changes by: brolley@sourceware.org 2003-09-24 19:05:39
Modified files:
sim/frv : ChangeLog arch.h cpu.h decode.c decode.h
model.c profile-fr400.c profile-fr500.c
profile.c profile.h sem.c
Log message:
2003-09-24 Dave Brolley <brolley@redhat.com>
* profile.h (update_FR_ptime): New prototype.
(update_FRdouble_ptime): Ditto.
(update_SPR_ptime): Ditto.
(increase_ACC_busy): Ditto.
(enforce_full_acc_latency): Ditto.
(post_wait_for_SPR): Ditto.
* profile.c (update_FR_ptime): Moved here from profile-fr500.c.
(update_FRdouble_ptime): Ditto.
(update_SPR_ptime): New function.
(increase_ACC_busy): Ditto.
(enforce_full_acc_latency): Ditto.
(vliw_wait_for_fdiv_resource): Correct resource name.
(vliw_wait_for_fsqrt_resource): Ditto.
(post_wait_for_SPR): New function.
* profile-fr500.c (frvbf_model_fr500_u_commit): New function.
(frvbf_model_fr500_u_gr2fr): Pass out_FRk as output register to
adjust_float_register_busy.
(frvbf_model_fr500_u_gr_load): Record latency of SPR registers.
(frvbf_model_fr500_u_fr_load): Wait for and record latency of SPR
registers.
(frvbf_model_fr500_u_float_arith): Ditto.
(frvbf_model_fr500_u_float_dual_arith): Ditto.
(frvbf_model_fr500_u_float_div): Ditto.
(frvbf_model_fr500_u_float_sqrt): Ditto.
(frvbf_model_fr500_u_float_convert): Ditto.
(update_FR_ptime): Moved to profile.c
(update_FRdouble_ptime): Moved to profile.c
* profile-fr400.c (update_FR_ptime): Removed. Identical to functions
for other machines.
(update_FRdouble_ptime): Ditto.
* arch.h,cpu.h,sem.c,decode.[ch],model.c,sem.c: Regenerated.
Patches:
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/frv/ChangeLog.diff?cvsroot=src&r1=1.8&r2=1.9
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/frv/arch.h.diff?cvsroot=src&r1=1.2&r2=1.3
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/frv/cpu.h.diff?cvsroot=src&r1=1.2&r2=1.3
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/frv/decode.c.diff?cvsroot=src&r1=1.3&r2=1.4
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/frv/decode.h.diff?cvsroot=src&r1=1.3&r2=1.4
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/frv/model.c.diff?cvsroot=src&r1=1.3&r2=1.4
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/frv/profile-fr400.c.diff?cvsroot=src&r1=1.1&r2=1.2
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/frv/profile-fr500.c.diff?cvsroot=src&r1=1.2&r2=1.3
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/frv/profile.c.diff?cvsroot=src&r1=1.3&r2=1.4
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/frv/profile.h.diff?cvsroot=src&r1=1.2&r2=1.3
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/sim/frv/sem.c.diff?cvsroot=src&r1=1.3&r2=1.4