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Date: Thu, 11 Jan 1996 11:32:55 -0600 (CST) From: Joel Sherrill <email@example.com> What is the rationale for the maximum alignment supported on a particular CPU family? My current problem is that the SPARC trap table must be on a 4K boundary but that appears to be too large. Note that many of these restrictions eminate from the linkers/assemblers which gcc has to interface with. As for your trap table alignment problem, I have no problem getting mine properly aligned in my kernels at all. I know where I am going to fix the text start address in the final link, so I know where the text segment will be in the first object file I feed to the linker. So this is where I place the trap table etc... this is what all Sparc OS's do btw, check out netbsd/openbsd or Sparc Linux for example. It is not really a problem. Later, David S. Miller firstname.lastname@example.org