Re: strange PowerPc assembler syntax used by gas?

[Ian Lance Taylor <ian@cygnus.com>]

   Date: Thu, 29 Jun 95 13:53:16 +0200
   From: Nick Stephen <stephen@gr.osf.org>

   The Motorola PowerPC Programming Environments book at
   Appendix F-9 defines a simplified branch mnemonic of the
   form :

     bne	cr3,	target

   where `cr3' is defined at F-1 as `symbol cr3' value `3', these
   symbols also being used by the cmp mnemonics etc - I have the
   cr symbols #defined to be the appropriate values.

Thanks.  I agree that gas appears to be handling this type of
instruction incorrectly.  I have checked in this patch to ppc-opc.c to
fix it.  As I understand it, it should not require any gcc changes,
because gcc does not rely on the extended branch mnemonics.  Mike,
please correct me if I am wrong (if I'm wrong, we might not want this
patch after all).

Ian

Index: ppc-opc.c
===================================================================
RCS file: /rel/cvsfiles/devo/opcodes/ppc-opc.c,v
retrieving revision 1.15
diff -p -r1.15 ppc-opc.c
*** ppc-opc.c	1995/07/07 22:49:39	1.15
--- ppc-opc.c	1995/07/11 15:47:39
*************** static unsigned long insert_bo PARAMS ((
*** 49,56 ****
  static long extract_bo PARAMS ((unsigned long, int *));
  static unsigned long insert_boe PARAMS ((unsigned long, long, const char **));
  static long extract_boe PARAMS ((unsigned long, int *));
- static unsigned long insert_cr PARAMS ((unsigned long, long, const char **));
- static long extract_cr PARAMS ((unsigned long, int *));
  static unsigned long insert_ds PARAMS ((unsigned long, long, const char **));
  static long extract_ds PARAMS ((unsigned long, int *));
  static unsigned long insert_li PARAMS ((unsigned long, long, const char **));
--- 49,54 ----
*************** const struct powerpc_operand powerpc_ope
*** 178,184 ****
       conditional branch mnemonics, which set the lower two bits of the
       BI field.  This field is optional.  */
  #define CR (BT + 1)
!   { 5, 16, insert_cr, extract_cr, PPC_OPERAND_CR | PPC_OPERAND_OPTIONAL },
  
    /* The D field in a D form instruction.  This is a displacement off
       a register, and implies that the next operand is a register in
--- 176,182 ----
       conditional branch mnemonics, which set the lower two bits of the
       BI field.  This field is optional.  */
  #define CR (BT + 1)
!   { 3, 18, 0, 0, PPC_OPERAND_CR | PPC_OPERAND_OPTIONAL },
  
    /* The D field in a D form instruction.  This is a displacement off
       a register, and implies that the next operand is a register in
*************** extract_boe (insn, invalid)
*** 621,650 ****
        && ! valid_bo (value))
      *invalid = 1;
    return value & 0x1e;
- }
- 
- /* The condition register number portion of the BI field in a B form
-    or XL form instruction.  This is used for the extended conditional
-    branch mnemonics, which set the lower two bits of the BI field.  It
-    is the BI field with the lower two bits ignored.  */
- 
- /*ARGSUSED*/
- static unsigned long
- insert_cr (insn, value, errmsg)
-      unsigned long insn;
-      long value;
-      const char **errmsg;
- {
-   return insn | ((value & 0x1c) << 16);
- }
- 
- /*ARGSUSED*/
- static long
- extract_cr (insn, invalid)
-      unsigned long insn;
-      int *invalid;
- {
-   return (insn >> 16) & 0x1c;
  }
  
  /* The DS field in a DS form instruction.  This is like D, but the
--- 619,624 ----