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sparc leon3 hal patch


Hi,
I have a patch for the sparc leon hal. The successor of the Leon chip is
the Leon3, so the appended package_hal_sparc.txt.diff &
package_ecos_db.txt.diff adds a packages/hal/sparc/leon3 dir. I added
also -mflat support and fpu context saveing to all sparc hals. The leon3 arch in addition support smp. This is the reason for the other patches, package_hal_i386.txt.diff and package_kernel.txt.diff. Whith
Leon3 you can boot a cpu at runtime. Therefore I had to change the
loops in kernel to distinguish between loop index and active cpu index.
The changes for package_hal_i386.txt.diff and package_kernel.txt.diff
together will leave the kernel unchanged for that architecture (I guess
it is the only one that uses smp?) but for the sparc it'll have the
desired effect that it'll enable to hot boot a cpu. So:
o package_hal_sparc.txt.diff : add sparc/leon3 architecture
o package_ecos_db.txt.diff : add sparc_leon3 or ecosconfig
o package_hal_i386.txt.diff and package_kernel.txt.diff: add cpu
hotboot support (+ a small ifdef patch to test/tm_basic.c)


I think Jiri Gaisler send in the patches before. He told me to
resynchronize with the current cvs. He also sait it's ok that I sign a
possible licence statement if needed. Let me know.
-- Konrad

--- ecos-rep-ori/packages/ecos.db	2005-07-26 17:57:03.000000000 +0200
+++ ecos-rep/packages/ecos.db	2005-07-27 09:42:09.000000000 +0200
@@ -3237,6 +3237,17 @@
     	    with both real hardware and the TSIM/LEON simulator."
 }
 
+package CYGPKG_HAL_SPARC_LEON3 {
+	alias		{ "LEON3 processor" hal_sparc_leon3 sparc_leon3_hal }
+	directory	hal/sparc/leon3
+	script		hal_sparc_leon3.cdl
+	hardware
+        description "
+    	    Grlib's LEON3 processor HAL package is provided for use
+    	    with both real hardware and the Grmon simulator."
+}
+
+
 # --------------------------------------------------------------------------
 # PowerPC packages
 package CYGPKG_HAL_POWERPC {
@@ -4909,6 +4920,16 @@
             on the LEON processor or TSIM/LEON simulator."
 }
 
+target sparc_leon3 {
+	alias		{ "LEON3 processor" leon }
+	packages        { CYGPKG_HAL_SPARC
+                          CYGPKG_HAL_SPARC_LEON3
+        }
+        description "
+    	    The sparc_leon target provides the packages need to run eCos
+            on Grlib's LEON3 processor or the Grmon simulator."
+}
+
 # --------------------------------------------------------------------------
 # PowerPC targets
 target cme555 {
diff -Naur ecos-rep-ori/packages/hal/sparc/arch/current/cdl/hal_sparc.cdl ecos-rep/packages/hal/sparc/arch/current/cdl/hal_sparc.cdl
--- ecos-rep-ori/packages/hal/sparc/arch/current/cdl/hal_sparc.cdl	2005-07-26 17:57:20.000000000 +0200
+++ ecos-rep/packages/hal/sparc/arch/current/cdl/hal_sparc.cdl	2005-07-26 18:08:47.000000000 +0200
@@ -61,7 +61,7 @@
         a specific target platform HAL package."
 
     compile       vectors.S vec_ivsr.S vec_xvsr.S context.S icontext.c
-    compile       hal_intr.c hal_boot.c
+    compile       hal_intr.c hal_boot.c callcons.S
 
     make {
         <PREFIX>/lib/vectors.o : <PACKAGE>/src/vectors.S
@@ -121,6 +121,39 @@
                 This option specifies the set of tests for the SPARC HAL."
         }
     }
+    
+    cdl_component CYGHWR_HAL_SPARC_NOFPU {
+	display       "Disable Sparc FPU support"
+	default_value 1
+	description   "This component disable support for the
+	              Sparc floating point unit using -msoft-float issued
+		      emulation instead."
+
+    }
+    
+    cdl_component CYGHWR_HAL_SPARC_FLAT {
+        display       "Use -mflat gcc mode"
+        default_value 0
+	description   "This will add the -mflat switch to the gcc command line."
+    }
+    
+    cdl_component CYGPKG_HAL_SPARC_REGISTER_WINDOWS {
+	display       "Number of register windows (2 - 32)."
+	flavor        data
+        default_value 8
+	description   "Configure the number of register windows your hardware has. Default is 8."
+    }
+
+    cdl_component CYGPKG_HAL_SMP_SUPPORT {
+	display       "SMP support"
+	default_value 0
+	
+	cdl_option CYGPKG_HAL_SMP_CPU_MAX {
+	    display       "Max number of CPUs supported"
+	    flavor        data
+	    default_value 2
+	}
+    }
 
     cdl_option CYGBLD_LINKER_SCRIPT {
         display "Linker script"
diff -Naur ecos-rep-ori/packages/hal/sparc/arch/current/include/arch.inc ecos-rep/packages/hal/sparc/arch/current/include/arch.inc
--- ecos-rep-ori/packages/hal/sparc/arch/current/include/arch.inc	1970-01-01 01:00:00.000000000 +0100
+++ ecos-rep/packages/hal/sparc/arch/current/include/arch.inc	2005-07-26 18:08:47.000000000 +0200
@@ -0,0 +1,85 @@
+#ifndef CYGONCE_HAL_ARCH_INC
+#define CYGONCE_HAL_ARCH_INC
+##=============================================================================
+##
+##	arch.inc
+##
+##	sparc assembler header file
+##
+##=============================================================================
+#####ECOSGPLCOPYRIGHTBEGIN####
+## -------------------------------------------
+## This file is part of eCos, the Embedded Configurable Operating System.
+## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+##
+## eCos is free software; you can redistribute it and/or modify it under
+## the terms of the GNU General Public License as published by the Free
+## Software Foundation; either version 2 or (at your option) any later version.
+##
+## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+## WARRANTY; without even the implied warranty of MERCHANTABILITY or
+## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+## for more details.
+##
+## You should have received a copy of the GNU General Public License along
+## with eCos; if not, write to the Free Software Foundation, Inc.,
+## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+##
+## As a special exception, if other files instantiate templates or use macros
+## or inline functions from this file, or you compile this file and link it
+## with other works to produce a work based on this file, this file does not
+## by itself cause the resulting work to be covered by the GNU General Public
+## License. However the source code for this file must still be made available
+## in accordance with section (3) of the GNU General Public License.
+##
+## This exception does not invalidate any other reasons why a work based on
+## this file might be covered by the GNU General Public License.
+##
+## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+## at http://sources.redhat.com/ecos/ecos-license/
+## -------------------------------------------
+#####ECOSGPLCOPYRIGHTEND####
+##=============================================================================
+#######DESCRIPTIONBEGIN####
+##
+## Author(s): 	 Gaisler Research (Konrad Eisele<eiselekd@web.de>) 
+## Contributors: 
+## Date:	
+## Purpose:	Architecture definitions.
+## Description:	This file contains definitions and macros that are
+##              useful for writing assembly code for the sparc CPU family.
+## Usage:
+##		#include <cyg/hal/arch.inc>
+##		...
+##		
+##
+######DESCRIPTIONEND####
+##
+##=============================================================================
+
+#define SPARC_PSR_ET_MASK   0x00000020   /* bit   5 */
+#define SPARC_PSR_PS_MASK   0x00000040   /* bit   6 */
+#define SPARC_PSR_S_MASK    0x00000080   /* bit   7 */
+#define SPARC_PSR_PIL_MASK  0x00000F00   /* bits  8 - 11 */
+#define SPARC_PSR_EF_MASK   0x00001000   /* bit  12 */
+#define SPARC_PSR_EC_MASK   0x00002000   /* bit  13 */
+#define SPARC_PSR_ICC_MASK  0x00F00000   /* bits 20 - 23 */
+#define SPARC_PSR_VER_MASK  0x0F000000   /* bits 24 - 27 */
+#define SPARC_PSR_IMPL_MASK 0xF0000000   /* bits 28 - 31 */
+
+#ifdef CYGPKG_HAL_SMP_SUPPORT
+
+#ifndef CYGPKG_HAL_SPARC_LEON3_OPTIONS
+#error SMP only supported for Leon3 
+#endif
+#include <cyg/hal/leon3_arch.inc>
+
+#else
+	
+	.macro hal_smp_cpu reg
+	or	%g0,%g0,\reg
+	.endm
+
+#endif				
+
+#endif // ifndef CYGONCE_HAL_ARCH_INC
diff -Naur ecos-rep-ori/packages/hal/sparc/arch/current/include/hal_arch.h ecos-rep/packages/hal/sparc/arch/current/include/hal_arch.h
--- ecos-rep-ori/packages/hal/sparc/arch/current/include/hal_arch.h	2005-07-26 17:57:20.000000000 +0200
+++ ecos-rep/packages/hal/sparc/arch/current/include/hal_arch.h	2005-07-26 18:08:47.000000000 +0200
@@ -66,6 +66,12 @@
 // All these structures must be doubleword (64 bit) aligned.
 // The code that creates them on the stack will ensure this is so.
 
+typedef struct
+{
+    cyg_uint32  f[32];
+    cyg_uint32  fsr,_dummy;
+} HAL_FPU_Context;
+
 #define HAL_THREAD_CONTEXT_GLOBAL_BASE 0
 #define HAL_THREAD_CONTEXT_OUT_BASE    8
 #define HAL_THREAD_CONTEXT_LOCAL_BASE 16
@@ -93,6 +99,10 @@
     cyg_uint32  o[8] ;                                  /* Outs    r8-r15 */
 //32 words in size
 
+  HAL_FPU_Context *fpucontext; 
+  cyg_uint32 _dummy;
+//32+2 words in size
+
 // There is no need to save any other state; for example, condition codes,
 // the PC and NextPC, and Y, are preserved in local registers in the trap
 // handling window and so preserved in the caller stack frame as viewed
@@ -357,7 +367,7 @@
         (4 * CYGNUM_HAL_STACK_INTERRUPT_SIZE + 2 * CYGNUM_HAL_STACK_FRAME_SIZE)
 
 #define CYGNUM_HAL_STACK_SIZE_TYPICAL \
-        (CYGNUM_HAL_STACK_SIZE_MINIMUM + 8 * CYGNUM_HAL_STACK_FRAME_SIZE)
+        (CYGNUM_HAL_STACK_SIZE_MINIMUM + 60 * CYGNUM_HAL_STACK_FRAME_SIZE)
 
 //--------------------------------------------------------------------------
 // Macros for switching context between two eCos instances (jump from
@@ -365,7 +375,11 @@
 #define CYGARC_HAL_SAVE_GP()
 #define CYGARC_HAL_RESTORE_GP()
 
+
 //-----------------------------------------------------------------------------
 
+#define __GET_FP(fp) __asm__ __volatile__("mov %%i6, %0" : "=r" (fp))
+#define __GET_SP(sp) __asm__ __volatile__("mov %%o6, %0" : "=r" (sp))
+
 #endif // CYGONCE_HAL_ARCH_H
 // End of hal_arch.h
diff -Naur ecos-rep-ori/packages/hal/sparc/arch/current/include/hal_intr.h ecos-rep/packages/hal/sparc/arch/current/include/hal_intr.h
--- ecos-rep-ori/packages/hal/sparc/arch/current/include/hal_intr.h	2005-07-26 17:57:20.000000000 +0200
+++ ecos-rep/packages/hal/sparc/arch/current/include/hal_intr.h	2005-07-26 18:08:47.000000000 +0200
@@ -64,6 +64,7 @@
 #include <pkgconf/hal_sparc.h>
 
 #include <cyg/infra/cyg_type.h>
+#include <cyg/hal/vectors.h>
 
 //---------------------------------------------------------------------------
 // SPARC exception vectors.
@@ -158,6 +159,10 @@
 #define CYGNUM_HAL_ISR_MAX                15
 #define CYGNUM_HAL_ISR_COUNT              16
 
+#ifdef CYGPKG_HAL_SMP_SUPPORT
+#define CYGNUM_HAL_SMP_CPU_INTERRUPT_VECTOR(_n_) 14 
+#endif
+
 // - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
 
 // Exception vectors. These are the values used when passed out to an
@@ -253,19 +258,6 @@
 //---------------------------------------------------------------------------
 // Interrupt control macros
 
-// THIS ONE IS NOT A STANDARD HAL ENTRY (HAL_DISABLE_TRAPS)
-// (so should be unused externally)
-#define HAL_DISABLE_TRAPS(_old_)                \
-    asm volatile (                              \
-        "rd     %%psr, %0;"                     \
-        "andn   %0, 0x20, %%l7;"                \
-        "wr     %%l7, %%psr;"                   \
-        "nop; nop; nop"                         \
-        : "=r"(_old_)                           \
-        :                                       \
-        : "l7"                                  \
-        );
-
 // THIS ONE IS NOT A STANDARD HAL ENTRY (HAL_QUERY_TRAPS)
 // (so should be unused externally)
 #define HAL_QUERY_TRAPS(_old_)                  \
@@ -277,40 +269,38 @@
         : "l7"                                  \
         );
 
-#define HAL_DISABLE_INTERRUPTS(_old_)           \
-    asm volatile (                              \
-        "rd     %%psr, %0;"                     \
-        "or     %0, 0xf00, %%l7;"               \
-        "wr     %%l7, %%psr;"                   \
-        "nop; nop; nop"                         \
-        : "=r"(_old_)                           \
-        :                                       \
-        : "l7"                                  \
-        );
-
-#define HAL_ENABLE_INTERRUPTS()                 \
-    asm volatile (                              \
-        "rd     %%psr, %%l7;"                   \
-        "andn   %%l7, 0xf00, %%l7;"             \
-        "or     %%l7, 0x020, %%l7;"             \
-        "wr     %%l7, %%psr;"                   \
-        "nop; nop; nop"                         \
-        :                                       \
-        :                                       \
-        : "l7"                                  \
-        );
 
-#define HAL_RESTORE_INTERRUPTS(_old_)           \
-    asm volatile (                              \
-        "rd     %%psr, %%l7;"                   \
-        "andn   %%l7, 0xf20, %%l7;"             \
-        "and    %0 , 0xf20, %%l6;"              \
-        "wr     %%l6, %%l7, %%psr;"             \
-        "nop; nop; nop"                         \
-        :                                       \
-        : "r"(_old_)                            \
-        : "l6","l7"                             \
-        );
+//atomical psr set (inside a syscall trap)
+externC inline unsigned long sparc_disable_interrupts(void) {
+  unsigned long _old_;
+  asm volatile (                              
+                "mov	%1, %%o0\n\t"
+                "ta	0\n\t"
+                "mov %%o0,%0\n\t"
+                : "=r"(_old_)                           
+                : "i" (SYS_irqdis)                                      
+                : "o0", "cc"                            
+                );
+  return _old_;
+}
+
+//atomical psr set (inside a syscall trap)
+externC inline void sparc_enable_interrupts(unsigned long old) {
+
+  asm volatile (                               
+                "mov %1,%%o0\n\t"
+                "mov %0,%%o1\n\t"
+                "ta	0\n\t"
+                :                            
+                : "r"(old), "i" (SYS_irqen)                                     
+                : "o0","o1", "cc"                            
+                );
+  
+};
+
+#define HAL_DISABLE_INTERRUPTS(_old_)  _old_ = sparc_disable_interrupts();
+#define HAL_ENABLE_INTERRUPTS()        sparc_enable_interrupts(0);
+#define HAL_RESTORE_INTERRUPTS(_old_)  sparc_enable_interrupts(_old_);
 
 #define HAL_QUERY_INTERRUPTS(_old_)             \
     asm volatile (                              \
@@ -402,6 +392,8 @@
 
 #include <cyg/hal/hal_clock.h>
 
+#define HAL_DELAY_US(n)          hal_delay_us(n)
+
 //---------------------------------------------------------------------------
 #endif // ifndef CYGONCE_HAL_INTR_H
 // End of hal_intr.h
diff -Naur ecos-rep-ori/packages/hal/sparc/arch/current/include/hal_smp.h ecos-rep/packages/hal/sparc/arch/current/include/hal_smp.h
--- ecos-rep-ori/packages/hal/sparc/arch/current/include/hal_smp.h	1970-01-01 01:00:00.000000000 +0100
+++ ecos-rep/packages/hal/sparc/arch/current/include/hal_smp.h	2005-07-26 18:08:47.000000000 +0200
@@ -0,0 +1,77 @@
+#ifndef SPARC_HAL_SMP_H
+#define SPARC_HAL_SMP_H
+
+//===========================================================================
+//
+//      hal_smp.h
+//
+//      HAL SMP support
+//
+//===========================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//===========================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):   nickg
+// Contributors: Gaisler Research,(Konrad Eisele<eislelekd@web.de>)
+// Date:         2004
+// Purpose:     Define SMP support abstractions
+// Description:  
+// Usage:
+//               #include <cyg/hal/hal_smp.h>
+//               ...
+//              
+//
+//####DESCRIPTIONEND####
+//
+//===========================================================================
+
+#include <pkgconf/hal.h>
+
+#ifdef CYGPKG_HAL_SMP_SUPPORT
+
+#include <pkgconf/hal_sparc.h>
+#include <cyg/infra/cyg_type.h>
+
+#ifndef CYGPKG_HAL_SPARC_LEON3
+#error SMP only supported for Leon3
+#else
+#include <cyg/hal/hal_leon3_smp.h>
+#endif
+
+#endif // CYGPKG_HAL_SMP_SUPPORT
+
+//---------------------------------------------------------------------------
+#endif // ifndef SPARC_HAL_SMP_H
+// End of hal_smp.h
diff -Naur ecos-rep-ori/packages/hal/sparc/arch/current/include/vectors.h ecos-rep/packages/hal/sparc/arch/current/include/vectors.h
--- ecos-rep-ori/packages/hal/sparc/arch/current/include/vectors.h	2005-07-26 17:57:20.000000000 +0200
+++ ecos-rep/packages/hal/sparc/arch/current/include/vectors.h	2005-07-26 18:08:47.000000000 +0200
@@ -55,12 +55,37 @@
 //
 //=============================================================================
 
-#define __WINSIZE 8
+#include <pkgconf/hal_sparc.h>
 
-#if __WINSIZE <= 8
-# define __WINBITS 7
+#define __WINSIZE CYGPKG_HAL_SPARC_REGISTER_WINDOWS
+
+#if (__WINSIZE < 2 || __WINSIZE > 32)
+# error CYGPKG_HAL_SPARC_REGISTER_WINDOWS not supported
+#endif
+#if (__WINSIZE == 2 && !defined(CYGHWR_HAL_SPARC_FLAT) )
+# error window size of 2 only works with -mflat option
+#endif
+
+#if (__WINSIZE == 2 || __WINSIZE == 4 || __WINSIZE == 8 || __WINSIZE == 16 || __WINSIZE == 32)
+#define CYGPKG_HAL_SPARC_REGISTER_WINDOWS_POW2 1
+#endif
+
+#if (__WINSIZE <= 2)
+#define __WINBITS (2-1)
 #else
-# error __WINSIZE window size probably not supported
+# if (__WINSIZE <= 4)
+# define __WINBITS (4-1)
+# else
+#  if (__WINSIZE <= 8)
+#  define __WINBITS (8-1)
+#  else
+#   if (__WINSIZE <= 16)
+#   define __WINBITS (16-1)
+#   else
+#    define __WINBITS (32-1)
+#   endif
+#  endif
+# endif
 #endif
 
 // These should be generic to all SPARCs:
@@ -68,12 +93,14 @@
 #define __WINBITS_MAXIMAL 0x1f
 
 #define __WIN_INIT (__WINSIZE - 1)
+
 #define __WIM_INIT (1 << __WIN_INIT)
 
 // ------------------------------------------------------------------------
 
 #define TRAP_WUNDER     6       // Window Underflow trap number
 #define TRAP_WOVER      5       // Window Overflow trap number
+#define TRAP_FPDIS      4       // FPU Disabled trap number
 
 #define TRAP_INTR_MIN   17      // smallest interrupt trap number
 #define TRAP_INTR_MAX   31      // largest interrupt trap number
@@ -109,10 +136,13 @@
 
 
 
-#define SAVE_REGS_SIZE (4 * 32) // 32 words of 4 bytes each
-
+#define SAVE_REGS_SIZE (4 * (32+2)) // 32 words of 4 bytes each + fpu ctx + align
 
+#define SAVE_FPUSTATE_SIZE (4 * (32+2)) // 32 fregs + fsr + _dummy
 
+#define SYS_exit        1
+#define SYS_irqdis      2
+#define SYS_irqen       3
 
 #endif // CYGONCE_HAL_VECTORS_H
 // EOF vectors.h
diff -Naur ecos-rep-ori/packages/hal/sparc/arch/current/src/callcons.S ecos-rep/packages/hal/sparc/arch/current/src/callcons.S
--- ecos-rep-ori/packages/hal/sparc/arch/current/src/callcons.S	1970-01-01 01:00:00.000000000 +0100
+++ ecos-rep/packages/hal/sparc/arch/current/src/callcons.S	2005-07-26 18:08:47.000000000 +0200
@@ -0,0 +1,99 @@
+/*===========================================================================
+//
+//	callcons.S
+//
+//
+//===========================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//===========================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s): 	 hmt
+// Contributors: hmt,
+//               Gaisler Research (Konrad Eisele<eiselekd@web.de>) (fpu support)
+// Date:	 1999-02-20
+// Purpose:	 
+// Description:	 callcons.S
+//
+//####DESCRIPTIONEND####
+//
+//=========================================================================*/
+
+! special treatment for CYGHWR_HAL_SPARC_FLAT case, otherwise hal_zero_bss will clear return address
+                
+	.section ".data"
+	.balign 4
+save_i7:      !avoid .bss (clear)
+        .long 0x100000
+save_o7:      !avoid .bss (clear)
+        .long 0x100000
+        
+	.text
+        .global cyg_hal_start
+        .extern hal_board_prestart 
+        .extern hal_zero_bss
+        .extern cyg_hal_invoke_constructors
+        .extern hal_board_poststart
+        .extern hal_copy_data
+        
+cyg_hal_start:
+        add  %sp, -112, %sp
+        set save_i7,%g1
+        st %i7,[%g1]
+        set save_o7,%g1
+        st %o7,[%g1]
+        
+        call  hal_board_prestart 
+        nop
+#ifdef CYG_HAL_STARTUP_ROM
+        ! Copy data from ROM to RAM 
+        call hal_copy_data
+        nop
+#endif
+        call  hal_zero_bss
+        nop 
+        call  cyg_hal_invoke_constructors
+        nop 
+        call  hal_board_poststart
+        nop 
+        
+        set save_i7,%g1
+        ld [%g1],%i7
+        set save_o7,%g1
+        ld [%g1],%o7
+        retl 
+        add  %sp, 0x70, %sp
+
+        
+// EOF callcons.S
diff -Naur ecos-rep-ori/packages/hal/sparc/arch/current/src/context.S ecos-rep/packages/hal/sparc/arch/current/src/context.S
--- ecos-rep-ori/packages/hal/sparc/arch/current/src/context.S	2005-07-26 17:57:20.000000000 +0200
+++ ecos-rep/packages/hal/sparc/arch/current/src/context.S	2005-07-26 18:08:47.000000000 +0200
@@ -55,9 +55,14 @@
 #include <pkgconf/hal.h>
 
 #include <cyg/hal/vectors.h>
-	
+
+#include <cyg/hal/arch.inc>
+
 #define DELAYS_AFTER_WRPSR_SAME_WINDOW
 #define DELAYS_AFTER_WRWIM
+	
+	.extern cyg_hal_fpustate_owner
+	.extern cyg_hal_fpustate_current
 
 	.text
 
@@ -106,8 +111,18 @@
 #endif // !CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM
 	! and save the CWP in %g0 save place
 	rd	%psr, %g7
+
+	set	0x1000,%g6
+	andn    %g7,%g6,%g7 !disable floating point
 	st	%g7, [%sp + 16 * 4]
-	
+
+	! push current fpu ctx
+	hal_smp_cpu %g7			! Get CPU id
+	sll %g7, 2, %g7
+	set cyg_hal_fpustate_current,%g6	! current state table
+	ld [%g6+%g7],%g6
+	st %g6,[%sp + 32 * 4]
+
 	! Now load the destination thread by dropping through
 	! to hal_thread_load_context
 	
@@ -125,8 +140,15 @@
 	! The stack is still the callers at this point but the register
 	! set is up for grabs.  So we can use globals:
 	
+        !mov    %o0,%l0
+        !
+        !mov	%1, %o0
+        !ta	0
+        !mov     %o0,%g6
+	!ld	[ %l0 ], %g7		! Get the next saved SP
+        
 	ld	[ %o0 ], %g7		! Get the next saved SP
-	
+                
 	! DISABLE INTERRUPTS *ONLY* NOT TRAPS
 	rd	%psr, %g6
 	or	%g6, 0xfe0, %g5		! PIL up to 15 leave traps enabled
@@ -136,16 +158,14 @@
 	! force out all our callers register sets onto the stack
 	! if necessary:	the system will handily take care of this for
 	! us as follows:
-	save	%sp, -16 * 4, %sp	! need all these to preserve
-	save	%sp, -16 * 4, %sp	! the linked list property...
-	save	%sp, -16 * 4, %sp
+        ! need all these to preserve
+        ! the linked list property...
+#if !defined(CYGHWR_HAL_SPARC_FLAT)
+        .rept __WINSIZE-2
 	save	%sp, -16 * 4, %sp
-#if 6 < __WINSIZE
-	save	%sp, -16 * 4, %sp
-#if 7 < __WINSIZE
-	save	%sp, -16 * 4, %sp
-#endif
+	.endr
 #endif
+        
 	! Fewer saves if fewer register windows.  For 8 register windows,
 	! six of these is correct; a seventh would force out the current
 	! set that was already saved manually above.  Note that minimal
@@ -162,9 +182,9 @@
 		
 	! calculate a new WIM...
 	add	%g4, 1, %g3		! required invalid window number
-#if 8 == __WINSIZE
-	and	%g3, __WINBITS, %g3	! modulo 8
-#else   // expect 5 or 6 or 7 windows
+#if CYGPKG_HAL_SPARC_REGISTER_WINDOWS_POW2
+	and	%g3, __WINBITS, %g3	! modulo rw pow2
+#else   // except for rw != pow2
 	cmp	%g3, __WINSIZE
 	bge,a	567f			! taken: do delay slot, handle overflow
 	 mov	0, %g3			! only if .ge. above
@@ -175,7 +195,11 @@
 
 	! DISABLE INTERRUPTS (TRAPS)
 	wr	%g5, %psr		! set CWP to new window, disable traps
+#if (__WINSIZE == 2) && defined(CYGHWR_HAL_SPARC_FLAT)
+	wr	%g0, %wim		
+#else  
 	wr	%g2, %wim		! and WIM to new value
+#endif        
 	nop
 	nop
 	nop
@@ -195,6 +219,14 @@
 	ldd	[%sp + 12 * 4], %i4
 	ldd	[%sp + 14 * 4], %i6
 
+	! set new current fpu ctx
+	ld [%sp + 32 * 4],%g1
+	hal_smp_cpu %g3		! Get CPU id
+	sll %g3, 2, %g3
+	set cyg_hal_fpustate_current,%g2	! current state table
+	st %g1,[%g2+%g3]
+
+	
 	! RESTORE INTERRUPTS to saved state
 	wr	%g6, %psr		! set new CWP and old ET and PIL
 	nop
@@ -269,16 +301,12 @@
 	! force out all our callers register sets onto the stack
 	! if necessary:	the system will handily take care of this for
 	! us as follows:
-	save	%sp, -16 * 4, %sp	! need all these to preserve
-	save	%sp, -16 * 4, %sp	! the linked list property...
+#if !defined(CYGHWR_HAL_SPARC_FLAT)
+        .rept __WINSIZE-2
 	save	%sp, -16 * 4, %sp
-	save	%sp, -16 * 4, %sp
-#if 6 < __WINSIZE
-	save	%sp, -16 * 4, %sp
-#if 7 < __WINSIZE
-	save	%sp, -16 * 4, %sp
-#endif
+	.endr
 #endif
+        
 	! Fewer saves if fewer register windows.  For 8 register windows,
 	! six of these is correct; a seventh would force out the current
 	! set that was already saved manually above.  Note that minimal
@@ -323,9 +351,9 @@
 		
 	! calculate a new WIM...
 	add	%g4, 1, %g3		! required invalid window number
-#if 8 == __WINSIZE
-	and	%g3, __WINBITS, %g3	! modulo 8
-#else   // expect 5 or 6 or 7 windows
+#if CYGPKG_HAL_SPARC_REGISTER_WINDOWS_POW2
+	and	%g3, __WINBITS, %g3	! modulo rw pow2
+#else   // except for rw != pow2
 	cmp	%g3, __WINSIZE
 	bge,a	567f			! taken: do delay slot, handle overflow
 	 mov	0, %g3			! only if .ge. above
@@ -336,7 +364,11 @@
 
 	! DISABLE INTERRUPTS
 	wr	%g5, %g4, %psr		! set CWP to new window, disable traps
+#if (__WINSIZE == 2) && defined(CYGHWR_HAL_SPARC_FLAT)
+	wr	%g0, %wim		
+#else  
 	wr	%g2, %wim		! and WIM to new value
+#endif        
 	nop
 	nop
 	nop
diff -Naur ecos-rep-ori/packages/hal/sparc/arch/current/src/hal_boot.c ecos-rep/packages/hal/sparc/arch/current/src/hal_boot.c
--- ecos-rep-ori/packages/hal/sparc/arch/current/src/hal_boot.c	2005-07-26 17:57:20.000000000 +0200
+++ ecos-rep/packages/hal/sparc/arch/current/src/hal_boot.c	2005-07-26 18:08:47.000000000 +0200
@@ -75,6 +75,8 @@
 }
 #endif
 
+//note: when compiling with -mflat (CYGHWR_HAL_SPARC_FLAT) this routine
+//has to be a leaf routine, otherwise it will clear it's own stack.
 void hal_zero_bss(void)
 {
     extern CYG_ROM_ADDRESS __bss_start;
@@ -134,41 +136,31 @@
 
 extern void hal_board_prestart( void );
 extern void hal_board_poststart( void );
-
+ 
 // This is called with traps enabled, but interrupts masked out:
 // Be sure to enable them in hal_board_poststart() at the latest.
 
+/*
 void cyg_hal_start( void )
 {
-    /* Board specific prestart that's best done in C */
+    // Board specific prestart that's best done in C 
     hal_board_prestart();
 
-    LED( 0xd0 );
-
 #ifdef CYG_HAL_STARTUP_ROM
-    /* Copy data from ROM to RAM */
+    // Copy data from ROM to RAM 
     hal_copy_data();
 #endif
                 
-    LED( 0xd4 );
-
-    /* Zero BSS */
+    // Zero BSS 
     hal_zero_bss();
 
-    LED( 0xd8 );
-
-    /* Call constructors */
+    // Call constructors 
     cyg_hal_invoke_constructors();
 
-    LED( 0xdc );
-
-    /* Board specific late startup that's best done in C */
+    // Board specific late startup that's best done in C 
     hal_board_poststart();
 
-    LED( 0xf8 );
+}*/
 
-    /* Call cyg_start */
-    cyg_start(); /* does not return */
-}
 
 // EOF hal_boot.c
diff -Naur ecos-rep-ori/packages/hal/sparc/arch/current/src/hal_intr.c ecos-rep/packages/hal/sparc/arch/current/src/hal_intr.c
--- ecos-rep-ori/packages/hal/sparc/arch/current/src/hal_intr.c	2005-07-26 17:57:20.000000000 +0200
+++ ecos-rep/packages/hal/sparc/arch/current/src/hal_intr.c	2005-07-26 18:08:47.000000000 +0200
@@ -159,4 +159,51 @@
     0,
 };
 
+
+
+/*------------------------------------------------------------------------*/
+/* Delay for some number of useconds.                                     */
+void 
+hal_delay_us(int us)
+{
+    cyg_uint32 val1, val2;
+    int diff;
+    long usticks;
+    long ticks;
+
+    // Calculate the number of counter register ticks per microsecond.
+    
+    usticks = (CYGNUM_HAL_RTC_PERIOD * CYGNUM_HAL_RTC_DENOMINATOR) / 1000000;
+
+    // Make sure that the value is not zero. This will only happen if the
+    // CPU is running at < 2MHz.
+    if( usticks == 0 ) usticks = 1;
+    
+    while( us > 0 )
+    {
+        int us1 = us;
+
+        // Wait in bursts of less than 10000us to avoid any overflow
+        // problems in the multiply.
+        if( us1 > 10000 )
+            us1 = 10000;
+
+        us -= us1;
+
+        ticks = us1 * usticks;
+
+        HAL_CLOCK_READ(&val1);
+        while (ticks > 0) {
+            do {
+                HAL_CLOCK_READ(&val2);
+            } while (val1 == val2);
+            diff = val2 - val1;
+            if (diff < 0) diff += CYGNUM_HAL_RTC_PERIOD;
+            ticks -= diff;
+            val1 = val2;
+        }
+    }
+}
+
+
 // EOF hal_intr.c
diff -Naur ecos-rep-ori/packages/hal/sparc/arch/current/src/icontext.c ecos-rep/packages/hal/sparc/arch/current/src/icontext.c
--- ecos-rep-ori/packages/hal/sparc/arch/current/src/icontext.c	2005-07-26 17:57:20.000000000 +0200
+++ ecos-rep/packages/hal/sparc/arch/current/src/icontext.c	2005-07-26 18:08:47.000000000 +0200
@@ -42,6 +42,7 @@
 //
 // Author(s):   hmt
 // Contributors:        hmt
+//               Gaisler Research (Konrad Eisele<eiselekd@web.de>) (fpu support)
 // Date:        1998-12-14
 // Purpose:     HAL context initialization function
 // Description: Initialize a HAL context for SPARC; this is in C and out
@@ -62,6 +63,7 @@
 /*---------------------------------------------------------------------------*/
 
 /* We lay out the stack in the manner that the PCS demands:
+ *        fpucontext    -----> Allocate fpu spilling region
  *        frame pointer -----> [top of stack] 
  *                             Argument spill area (6 words)
  *                             Return Arg pointer
@@ -101,22 +103,26 @@
                           CYG_WORD entry,
                           CYG_WORD id )
 {
-    register CYG_WORD fp = sparg;
+    register CYG_WORD fp = 0;
     register CYG_WORD sp = 0;
     register HAL_SavedRegisters *regs;
     register HAL_FrameStructure *frame;
+    register HAL_FPU_Context *fpucontext = (HAL_FPU_Context *)((sparg) & ~15); // round down to double alignment
     int i;
 
     if ( 0 == (id & 0xffff0000) )
         id <<= 16;
 
-    fp &= ~15;                          // round down to double alignment
+    fpucontext = (HAL_FPU_Context *)            // allocate fpu spilling region
+        (((CYG_WORD)fpucontext) - sizeof(HAL_FPU_Context));
+    fp = (CYG_WORD)fpucontext;
 
     frame = (HAL_FrameStructure *)(
         fp - sizeof( HAL_FrameStructure ) );
     
     regs = (HAL_SavedRegisters *)(
         ((CYG_WORD)frame) - sizeof(HAL_SavedRegisters) );
+    regs ->fpucontext = fpucontext;
 
     sp = (CYG_WORD)regs;
     
@@ -279,7 +285,7 @@
         gdb[ Y ]    = trapli->l[4];
         
         scratch = trapli->l[0];         // the PSR in the trap handler
-#if 8 == __WINSIZE
+#if CYGPKG_HAL_SPARC_REGISTER_WINDOWS_POW2
         scratch++;                      // back to interupted thread's window
         scratch &=~ 0x38;               // clear ET and any __WINSIZE overflow
         gdb[ PSR ]  = scratch;
@@ -351,7 +357,7 @@
         
         scratch = eCos_regset->g[ 0 ];  // the PSR in the saved context
         gdb[ PSR ]  = scratch;          // return it verbatim.
-#if 8 == __WINSIZE
+#if CYGPKG_HAL_SPARC_REGISTER_WINDOWS_POW2
         gdb[ WIM ]  = 1 << ((__WINBITS & (1 + scratch)));
 #else  // 6 or 7 windows only
         reg = (int)(scratch & __WINBITS);
diff -Naur ecos-rep-ori/packages/hal/sparc/arch/current/src/vec_ivsr.S ecos-rep/packages/hal/sparc/arch/current/src/vec_ivsr.S
--- ecos-rep-ori/packages/hal/sparc/arch/current/src/vec_ivsr.S	2005-07-26 17:57:20.000000000 +0200
+++ ecos-rep/packages/hal/sparc/arch/current/src/vec_ivsr.S	2005-07-26 18:08:47.000000000 +0200
@@ -41,7 +41,8 @@
 //#####DESCRIPTIONBEGIN####
 //
 // Author(s): 	 hmt
-// Contributors: hmt
+// Contributors: hmt,
+//               Gaisler Research (Konrad Eisele<eiselekd@web.de>) (fpu support)
 // Date:	 1999-02-20
 // Purpose:	 SPARC vector code
 // Description:	 see vectors.S; this is the default vector service routine
@@ -67,6 +68,8 @@
 # undef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
 #endif
 
+#include <cyg/hal/arch.inc>
+	
 !------------------------------------------------------------------------
 
 #include <cyg/hal/vectors.h>
@@ -102,15 +105,35 @@
 	! the next one will need to be saved before we can use it:
 	! ie. this one is the invalid register window.
 
+	set	0x1000,%l7
+	andn	%l0, %l7, %l0	! fpu off
+	
 	! must establish a safe stack before re-enabling interrupts + traps
 	and	%l0, __WINBITS, %l7	! CWP extracted
 	! no inc/dec here, so no need for special measures for not-8-windows
 	mov	1, %l6
 	sll	%l6, %l7, %l6		! 1 << CWP
 	rd	%wim, %l5
+        
+#if (__WINSIZE == 2) && defined(CYGHWR_HAL_SPARC_FLAT)
+        ! ----------------------- 2 window case -------------------
+        restore
+	std	%l0, [%sp + 0 * 4]	! save L & I registers
+	std	%l2, [%sp + 2 * 4]
+	std	%l4, [%sp + 4 * 4]
+	std	%l6, [%sp + 6 * 4]
+
+	std	%i0, [%sp + 8 * 4]
+	std	%i2, [%sp + 10 * 4]
+	std	%i4, [%sp + 12 * 4]
+	std	%i6, [%sp + 14 * 4]
+        save        
+        ! ----------------------- /2 window case -------------------
+#else        
+        ! -----------------------normal case -----------------------     
 	cmp	%l5, %l6		! are they the same?
 	bne	1f			! No, so the stack is OK as is.
-
+        
 	! now do by hand an overflow trap, effectively
 	mov	%g1, %l7		! (DELAY SLOT)
 	srl	%l5, 1, %l5
@@ -138,9 +161,11 @@
 
 	restore				! Go back to trap window.
 	mov	%l7, %g1		! Restore %g1
+#endif
+        ! -----------------------/normal case -----------------------     
 
 1:	! now save away the regs we must preserve
-	sub     %fp, 32 * 4, %sp
+	sub     %fp, (32+2) * 4, %sp
 #ifdef CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
 	std	%g0, [%sp + 16 * 4]	! save G registers
 	std	%g2, [%sp + 18 * 4]	! (set %g0 place to 0 to flag special context)
@@ -168,6 +193,20 @@
 	st	%l0, [%sp + 16 * 4]
 #endif // ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
 
+	! push fpu ctx
+	hal_smp_cpu %g7			! Get CPU id
+	sll %g7, 2, %g7
+	set cyg_hal_fpustate_current,%g6	! current state table
+	ld [%g6+%g7],%g6
+	st %g6,[%sp + 32 * 4]
+
+	sub %sp,SAVE_FPUSTATE_SIZE,%sp         ! allocate fpu flush for irq
+	hal_smp_cpu %g3		       ! Get CPU id
+	sll %g3, 2, %g3
+	set cyg_hal_fpustate_current,%g2 ! current state table
+	st %sp,[%g2+%g3]
+
+	
 	sub	%sp, 24 * 4, %sp	! fresh frame including
 					! arg spill area for callees
 	MARKSTACKUSED			! kilroy was here
@@ -175,11 +214,21 @@
 #ifdef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
 	! we will switch to the interrupt stack unless already running on it
 
+#if !defined(CYGPKG_HAL_SMP_SUPPORT)
 	.extern cyg_interrupt_stack
 	.extern cyg_interrupt_stack_base
 	set	cyg_interrupt_stack, %g1
 	set	cyg_interrupt_stack_base, %g2
-
+#else
+	.extern __interrupt_stack_vector
+	hal_smp_cpu %g1
+	sll %g1,2,%g1
+	set __interrupt_stack_vector,%l7
+	ld [%l7+%g1], %g1
+	set CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE,%l7
+	sub %g1,%l7,%g2
+#endif
+		
 	cmp	%sp, %g2		! below base?
 	blu	1f			! if so, switch.
 	cmp	%sp, %g1		! below top? (DELAY SLOT)
@@ -194,7 +243,8 @@
 	! continue as before, already in the interrupt stack.
 #endif // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
 
-#ifdef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
+#if defined(CYGFUN_HAL_COMMON_KERNEL_SUPPORT) && \
+    !defined(CYGPKG_HAL_SMP_SUPPORT)
 	! Lock the scheduler
 	.extern	SCHED_LOCK_MANGLED_NAME
 	sethi	%hi(SCHED_LOCK_MANGLED_NAME), %l7
@@ -212,10 +262,16 @@
 	rd	%y, %l4
 
 	! Now we can reenable traps and mask off only lower prio interrupts:
+#if defined(CYGPKG_HAL_SMP_SUPPORT)        
+	or	%l0, 0xf00, %l7		! disable irq
+	or	%l7, 0x0e0, %l7		! and ET (+S,PS)
+	wr	%l7, %psr		! and enable!
+#else
 	andn	%l0, 0xf00, %l7		! clear PIL field
 	or	%l7, 0x0e0, %l7		! and ET (+S,PS)
 	sll	%l3, 8, %l6		! trap number (1-15) into PIL bitfield
 	wr	%l7, %l6, %psr		! and enable!
+#endif          
 #ifdef DELAYS_AFTER_WRPSR_SAME_WINDOW
 	nop
 	nop
@@ -260,9 +316,18 @@
 	nop
 #endif
 	
+#if !defined(CYGPKG_HAL_SMP_SUPPORT)
 	.extern cyg_interrupt_stack
 	set	cyg_interrupt_stack - (24 * 4), %g1
-
+#else
+	.extern __interrupt_stack_vector
+	hal_smp_cpu %g1
+	sll %g1,2,%g1
+	set __interrupt_stack_vector,%l7
+	ld [%l7+%g1], %g1
+	sub %g1,(24 * 4),%g1
+#endif
+		
 	cmp	%sp, %g1		! is SP less?
 	blu	1f			! if so, do not change back
 	nop
@@ -318,10 +383,19 @@
 	! HELP_GDB_WITH_BACKTRACE
 	mov	%l5, %i7	! restore (unused) return link
 
+	add %sp,SAVE_FPUSTATE_SIZE,%sp         ! undo fpu flush area
+	
 	! and restore other saved regs
 	! (see CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT)
 	add	%sp, 24 * 4, %sp	! undo fresh frame
 
+	! pop fpu ctx
+	ld [%sp + 32 * 4],%g5
+	hal_smp_cpu %g7			! Get CPU id
+	sll %g7, 2, %g7
+	set cyg_hal_fpustate_current,%g6	! current state table
+	st %g5,[%g6+%g7]
+
 	ld	[%sp + 17 * 4], %g1	! restore G registers
 	ldd	[%sp + 18 * 4], %g2
 	ldd	[%sp + 20 * 4], %g4
@@ -338,7 +412,7 @@
 
 	add	%l0, 1, %l7		! interruptee~s CWP plus noise
 	and	%l7, __WINBITS, %l7	! CWP only
-#if 8 == __WINSIZE
+#ifdef CYGPKG_HAL_SPARC_REGISTER_WINDOWS_POW2
 	! it is in range already
 #else   // expect 5 or 6 or 7 windows
 	cmp	%l7, __WINSIZE
@@ -349,6 +423,23 @@
 	mov	1, %l6
 	sll	%l6, %l7, %l6		! 1 << CWP
 	rd	%wim, %l5
+        
+#if (__WINSIZE == 2) && defined(CYGHWR_HAL_SPARC_FLAT)
+        ! ----------------------- 2 window case -------------------
+	restore				! Interruptee~s window
+	ldd	[%sp + 0 * 4], %l0	! restore L & I registers
+	ldd	[%sp + 2 * 4], %l2
+	ldd	[%sp + 4 * 4], %l4
+	ldd	[%sp + 6 * 4], %l6
+
+	ldd	[%sp + 8 * 4], %i0
+	ldd	[%sp + 10 * 4], %i2
+	ldd	[%sp + 12 * 4], %i4
+	ldd	[%sp + 14 * 4], %i6
+	save				! Back to trap window
+        ! ----------------------- /2 window case -------------------
+#else   
+        ! -----------------------normal case -----------------------     
 	cmp	%l5, %l6		! are they the same?
 	bne	2f			! No, so the stack is OK as is.
 
@@ -373,6 +464,8 @@
 	ldd	[%sp + 14 * 4], %i6
 	save				! Back to trap window
 
+        ! -----------------------/normal case -----------------------     
+#endif        
 2:	! restore the condition codes, PSR and PIL and return from trap.
 	wr	%l0, %psr	! restores flags, disables traps, and old PIL
 #ifdef DELAYS_AFTER_WRPSR_SAME_WINDOW
@@ -394,48 +487,80 @@
 
 	.global hal_interrupt_stack_call_pending_DSRs
 hal_interrupt_stack_call_pending_DSRs:
+#if !defined(CYGHWR_HAL_SPARC_FLAT)
 	save	%sp, -24 * 4, %sp
-
+#else        
+        add  %sp, -24 * 4, %sp
+        st  %i7, [ %sp + 0x0 ]
+        sub  %sp, -24 * 4, %i7
+        st   %o7, [ %sp + 0x4 ]
+        std  %l0, [ %sp + 0x8 ]
+        std  %l2, [ %sp + 0x10 ]
+        std  %l4, [ %sp + 0x18 ]
+        std  %l6, [ %sp + 0x20 ]
+        std  %i0, [ %sp + 0x28 ]
+        std  %i2, [ %sp + 0x30 ]
+        std  %i4, [ %sp + 0x38 ]
+#endif
+                
 	MARKSTACKUSED			! kilroy was here
 
-	! be atomic
-	rd	%psr, %l0
-	andn	%l0, 0x20, %l1		! clear ET to disable traps
-	wr	%l1, %psr		! into the PSR
-	nop
-	nop
-	nop
-
+        mov    %psr,%l0
+        
+        set    SYS_irqdis,%o0
+        ta	0
+        
 	mov	%sp, %l7		! save calling stack location	
 
 	! now switch stack to the interrupt stack, plus some headroom
 	! for saving a register set if we are interrupted
+#if !defined(CYGPKG_HAL_SMP_SUPPORT)
 	.extern cyg_interrupt_stack
 	set	cyg_interrupt_stack - 4 * 24, %sp
-
+#else
+	.extern __interrupt_stack_vector
+	hal_smp_cpu %l2
+	sll %l2,2,%l2
+	set __interrupt_stack_vector,%l3
+	ld [%l2+%l3], %l2
+	sub %l2,(24 * 4),%sp
+#endif
+        
 	MARKSTACKUSED			! kilroy was here
 
-	! and enable interrupts unconditionally to call the DSRs
-	or	%l0, 0x0e0, %l2		! set ET, S, PS
-	andn	%l2, 0xf00, %l2		! PIL to zero
-	wr	%l2, %psr		! into the PSR
-	nop
-	nop
-	nop
-		
+	! enable interrupts unconditionally to call the DSRs
+        set    SYS_irqen,%o0
+        mov    %g0,%o1
+        ta	0
+        
 	.extern cyg_interrupt_call_pending_DSRs
 	call	cyg_interrupt_call_pending_DSRs
 	nop
 
 	mov	%l7, %sp		! restore calling stack
-
-	wr	%l0, %psr		! restore interrupt status
+        wr	%l0, %psr		! restore interrupt status
 	nop
 	nop
 	nop
 
+#if !defined(CYGHWR_HAL_SPARC_FLAT)
 	ret
 	restore
+#else        
+        sub  %i7, 24 * 4, %sp
+        ld   [ %sp + 0x0 ], %i7
+        ld   [ %sp + 0x4 ], %o7
+        ldd  [ %sp + 0x8 ], %l0
+        ldd  [ %sp + 0x10 ], %l2
+        ldd  [ %sp + 0x18 ], %l4
+        ldd  [ %sp + 0x20 ], %l6
+        ldd  [ %sp + 0x28 ], %i0
+        ldd  [ %sp + 0x30 ], %i2
+        ldd  [ %sp + 0x38 ], %i4
+        retl 
+        add  %sp, 24 * 4, %sp
+#endif        
+
 #endif // CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
 
 !----------------------------------------------------------------------------
diff -Naur ecos-rep-ori/packages/hal/sparc/arch/current/src/vec_xvsr.S ecos-rep/packages/hal/sparc/arch/current/src/vec_xvsr.S
--- ecos-rep-ori/packages/hal/sparc/arch/current/src/vec_xvsr.S	2005-07-26 17:57:20.000000000 +0200
+++ ecos-rep/packages/hal/sparc/arch/current/src/vec_xvsr.S	2005-07-26 18:08:47.000000000 +0200
@@ -44,6 +44,7 @@
 // Contributors: hmt
 // Date:	 1999-02-20
 // Purpose:	 SPARC vector code
+//               Gaisler Research (Konrad Eisele<eiselekd@web.de>) (fpu support)
 // Description:	 see vectors.S; this is the default vector service routine
 //               for exceptions.
 //
@@ -64,6 +65,8 @@
 # include <pkgconf/kernel.h>
 #endif
 
+#include <cyg/hal/arch.inc>
+	
 !------------------------------------------------------------------------
 
 #include <cyg/hal/vectors.h>
@@ -91,12 +94,32 @@
 	! the next one will need to be saved before we can use it:
 	! ie. this one is the invalid register window.
 
+	set	0x1000,%l7
+	andn	%l0, %l7, %l0	! fpu off
+
 	! must establish a safe stack before re-enabling interrupts + traps
 	and	%l0, __WINBITS, %l7	! CWP extracted
 	! no inc/dec here, so no need for special measures for not-8-windows
 	mov	1, %l6
 	sll	%l6, %l7, %l6		! 1 << CWP
 	rd	%wim, %l5
+
+#if (__WINSIZE == 2) && defined(CYGHWR_HAL_SPARC_FLAT)
+        ! ----------------------- 2 window case -------------------
+        restore
+	std	%l0, [%sp + 0 * 4]	! save L & I registers
+	std	%l2, [%sp + 2 * 4]
+	std	%l4, [%sp + 4 * 4]
+	std	%l6, [%sp + 6 * 4]
+
+	std	%i0, [%sp + 8 * 4]
+	std	%i2, [%sp + 10 * 4]
+	std	%i4, [%sp + 12 * 4]
+	std	%i6, [%sp + 14 * 4]
+        save        
+        ! ----------------------- /2 window case -------------------
+#else        
+        ! -----------------------normal case -----------------------     
 	cmp	%l5, %l6		! are they the same?
 	bne	1f			! No, so the stack is OK as is.
 
@@ -127,9 +150,11 @@
 
 	restore				! Go back to trap window.
 	mov	%l7, %g1		! Restore %g1
-
+        ! -----------------------/normal case -----------------------     
+#endif
+        
 1:	! now save away the regs we must preserve
-	sub     %fp, 32 * 4, %sp
+	sub     %fp, (32+2) * 4, %sp
 	! save a maximal context regardless: see also
 	! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
 	std	%l0, [%sp + 0 * 4]	! save L & I registers
@@ -147,6 +172,14 @@
 	std	%g4, [%sp + 20 * 4]
 	std	%g6, [%sp + 22 * 4]
 
+	! push fpu ctx
+	hal_smp_cpu %g7			! Get CPU id
+	sll %g7, 2, %g7
+	set cyg_hal_fpustate_current,%g6	! current state table
+	ld [%g6+%g7],%g6
+	st %g6,[%sp + 32 * 4]
+
+	
 	! no point whatsoever in saving O registers
 
 	! and save the CWP in %g0 save place
@@ -221,6 +254,14 @@
 
 	! and restore other saved regs
 	add	%sp, 24 * 4, %sp	! undo fresh frame
+
+	! pop fpu ctx
+	ld [%sp + 32 * 4],%g5
+	hal_smp_cpu %g7			! Get CPU id
+	sll %g7, 2, %g7
+	set cyg_hal_fpustate_current,%g6	! current state table
+	st %g5,[%g6+%g7]
+	
 	! restore a maximal context regardless: see also
 	! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
 	ldd	[%sp + 0 * 4], %l0	! restore L & I registers
@@ -248,7 +289,7 @@
 
 	add	%l0, 1, %l7		! interruptee~s CWP plus noise
 	and	%l7, __WINBITS, %l7	! CWP only
-#if 8 == __WINSIZE
+#ifdef CYGPKG_HAL_SPARC_REGISTER_WINDOWS_POW2
 	! it is in range already
 #else   // expect 5 or 6 or 7 windows
 	cmp	%l7, __WINSIZE
@@ -259,6 +300,23 @@
 	mov	1, %l6
 	sll	%l6, %l7, %l6		! 1 << CWP
 	rd	%wim, %l5
+        
+#if (__WINSIZE == 2) && defined(CYGHWR_HAL_SPARC_FLAT)
+        ! ----------------------- 2 window case -------------------
+	restore				! Interruptee~s window
+	ldd	[%sp + 0 * 4], %l0	! restore L & I registers
+	ldd	[%sp + 2 * 4], %l2
+	ldd	[%sp + 4 * 4], %l4
+	ldd	[%sp + 6 * 4], %l6
+
+	ldd	[%sp + 8 * 4], %i0
+	ldd	[%sp + 10 * 4], %i2
+	ldd	[%sp + 12 * 4], %i4
+	ldd	[%sp + 14 * 4], %i6
+	save				! Back to trap window
+        ! ----------------------- /2 window case -------------------
+#else   
+        ! -----------------------normal case -----------------------     
 	cmp	%l5, %l6		! are they the same?
 	bne	2f			! No, so the stack is OK as is.
 
@@ -282,7 +340,9 @@
 	ldd	[%sp + 12 * 4], %i4
 	ldd	[%sp + 14 * 4], %i6
 	save				! Back to trap window
-
+        
+        ! -----------------------/normal case -----------------------     
+#endif
 2:	! restore the condition codes, PSR and PIL and return from trap.
 	wr	%l0, %psr	! restores flags, disables traps, and old PIL
 #ifdef DELAYS_AFTER_WRPSR_SAME_WINDOW
diff -Naur ecos-rep-ori/packages/hal/sparc/arch/current/src/vectors.S ecos-rep/packages/hal/sparc/arch/current/src/vectors.S
--- ecos-rep-ori/packages/hal/sparc/arch/current/src/vectors.S	2005-07-26 17:57:20.000000000 +0200
+++ ecos-rep/packages/hal/sparc/arch/current/src/vectors.S	2005-07-26 18:08:47.000000000 +0200
@@ -1,5 +1,5 @@
 /*=============================================================================
-//
+//  
 //	vectors.S
 //
 //	SPARC vectors and bootup code
@@ -41,7 +41,8 @@
 //#####DESCRIPTIONBEGIN####
 //
 // Author(s): 	hmt
-// Contributors:hmt
+// Contributors:hmt,
+//              Gaisler Research (Konrad Eisele<eiselekd@web.de>) (fpu support)
 // Date:	1998-12-15
 // Purpose:	SPARC vector code
 // Description:	This file contains the code which hangs off SPARC vectors
@@ -71,10 +72,13 @@
 # undef CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK
 # undef CYGFUN_HAL_COMMON_KERNEL_SUPPORT
 #endif
-			
+
+#include <cyg/hal/arch.inc>
+				
 #if defined( CYGPKG_HAL_SPARCLITE_SIM ) || \
     defined( CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK ) || \
     defined( CYGPKG_HAL_SPARC_LEON ) || \
+    defined( CYGPKG_HAL_SPARC_LEON3 ) || \
     defined( CYGPKG_HAL_SPARC_ERC32 )
 #define BOOTUPSTACK_IS_INTERRUPTSTACK
 #endif
@@ -86,7 +90,11 @@
 #error Single Vector Trapping (SVT) demands ASR17 
 #endif
 #endif
-	
+
+#if !defined(CYGHWR_HAL_SPARC_MULTIPLE_VECTOR_TRAPPING) && !defined(CYGPKG_HAL_SPARC_LEON3)
+#error Single Vector Trapping (SVT) demands Leon3 model 
+#endif
+            	
 #ifdef CYG_HAL_STARTUP_ROM
 # ifndef CYGHWR_HAL_SPARC_MULTIPLE_VECTOR_TRAPPING
 
@@ -111,6 +119,22 @@
 
 #ifdef CYGHWR_HAL_SPARC_MULTIPLE_VECTOR_TRAPPING
 
+	.macro	VECTOR_SYSCALL _vector _handler
+	.p2align 4
+         mov   %psr, %l0 
+         sethi %hi(\_handler), %l4 
+         jmp   %l4+%lo(\_handler)
+         mov   \_vector, %l3
+        .endm
+
+	.macro	VECTOR_DUMMY
+	.p2align 4
+	jmp	%l1
+	rett	%l2
+	nop
+	nop
+        .endm
+	
 	.macro	VECTOR_EXCEPTION
 	.p2align 4
 	rd	%tbr, %l3
@@ -132,31 +156,36 @@
 	ba	__entry_\name
 	 rd	%wim, %l0
 	.endm
-	
+
+	.macro	VECTOR_FPDIS 
+	.p2align 4
+	ba	__entry_fpdis
+ 	 rd	%psr, %l0
+	.endm
+		
 #endif // CYGHWR_HAL_SPARC_MULTIPLE_VECTOR_TRAPPING
 
 !------------------------------------------------------------------------
 ! The start of the code; this is the entry point:
 	
 	.section ".vectors","ax"
-
-	.global rom_vectors
+        
+        .global rom_vectors
 rom_vectors:
-	.global	reset_vector
-reset_vector:	
+trap_table:             
+#ifdef CYGHWR_HAL_SPARC_MULTIPLE_VECTOR_TRAPPING
 	! this code goes to the real reset handler, it will be
 	! overwritten by the start of vectoring handler...
 	b	genuine_reset
 	nop
 	! usually drop through to:
-#ifdef CYGHWR_HAL_SPARC_MULTIPLE_VECTOR_TRAPPING
 	ba	__entry_exception	! reset becomes an exception
 	 and	%l3, TT_MASK, %l4	! once we are running
 	
 	VECTOR_EXCEPTION	 	!   1
 	VECTOR_EXCEPTION	 	!   2
 	VECTOR_EXCEPTION	 	!   3
-	VECTOR_EXCEPTION	 	!   4
+	VECTOR_FPDIS			!   4 fp disabled
 	
 	VECTOR_CODE_WIM wover	 	!   5 window overflow
 	VECTOR_CODE_WIM wunder		!   6 window underflow
@@ -195,18 +224,30 @@
 	VECTOR_EXCEPTION		!  34
 
 	VECTOR_EXCEPTION		!  35
-	VECTOR_EXCEPTION		!  36
+	VECTOR_EXCEPTION		!  36 cp disabled
 	VECTOR_EXCEPTION		!  37
 	VECTOR_EXCEPTION		!  38
 	VECTOR_EXCEPTION		!  39
-	
-	.rept 216			! 40-255 is 216 of them
+
+	.rept 88			! 40-127 is 88 of them
+	VECTOR_EXCEPTION		! whichever
+	.endr
+
+        VECTOR_SYSCALL 0x80 syscall     ! 128 syscall
+        
+	.rept 127			! 129-255 is 127 of them
 	VECTOR_EXCEPTION		! whichever
 	.endr
+
+	
 #endif // CYGHWR_HAL_SPARC_MULTIPLE_VECTOR_TRAPPING
 
+//_______________________________________________
 #ifndef CYGHWR_HAL_SPARC_MULTIPLE_VECTOR_TRAPPING
-real_vector:
+real_vector: 
+	rd	%tbr, %l3
+real_vector_reset: 
+	rd	%psr, %l0
 	! here,locals have been set up as follows:
 	! %l0 = psr
 	! %l1 = pc	
@@ -220,6 +261,8 @@
 	and	%l3, 0x0f0, %l4		! get an interrupt number out
 	srl	%l4, 2, %l5		! to a word address offset
 #endif // !CYGHWR_HAL_SPARC_MULTIPLE_VECTOR_TRAPPING
+//''''''''''''''''''''''''''''''''''''''''''''''''''
+        
 __entry_interrupt:
 	sethi	%hi(hal_vsr_table), %l6
 	or	%l6, %lo(hal_vsr_table), %l6
@@ -229,6 +272,7 @@
 					! interrupts and exceptions/traps
 					! have the same API to VSRs
 
+//_______________________________________________
 #ifndef CYGHWR_HAL_SPARC_MULTIPLE_VECTOR_TRAPPING
 not_an_interrupt:
 	and	%l3, TT_MASK, %l4
@@ -249,11 +293,17 @@
 	! the following instructions delay enough; no need for NOPs
 	rd	%wim, %l0		! get the wim
 #endif // !CYGHWR_HAL_SPARC_MULTIPLE_VECTOR_TRAPPING
+//''''''''''''''''''''''''''''''''''''''''''''''''''
+        
 __entry_wunder:	
 	sll	%l0, 1, %l3		! Rotate wim left
 	srl	%l0, __WINSIZE-1, %l0
+#if __WINSIZE > 3        
 	wr	%l0, %l3, %wim		! Install the new wim
-
+#else
+	wr	%g0, %g0, %wim		! we need 2 windows for save,save
+#endif
+                
 #ifdef DELAYS_AFTER_WRWIM
 	nop				! are these delays needed?
 	nop				! (following restore uses wim)
@@ -269,19 +319,30 @@
 
 	ldd	[%sp + 8 * 4], %i0
 	ldd	[%sp + 10 * 4], %i2
-	ldd	[%sp + 12 * 4], %i4
+	ldd	[%sp + 12 * 4], %i4 
 	ldd	[%sp + 14 * 4], %i6
 
 	save				! Back to trap window
-	save	
-
+	save
+        
+#if __WINSIZE <= 3        
+	wr	%l0, %l3, %wim		! Install the new wim (current)
+#ifdef DELAYS_AFTER_WRWIM
+	nop				! are these delays needed?
+	nop				! 
+	nop
+#endif
+#endif
+        
 	jmp	%l1
 	rett	%l2
 
+//_______________________________________________
 #ifndef CYGHWR_HAL_SPARC_MULTIPLE_VECTOR_TRAPPING
+        .global not_window_underflow
 not_window_underflow:
 	bne,a	not_window_overflow
-	srl	%l4, 4, %l4		! (if taken)
+	cmp	%l4, (TRAP_FPDIS << TT_SHL)	! (if taken)
 
 	! here be the window overflow handler:
 window_overflow:
@@ -294,6 +355,8 @@
 	! the following instructions delay enough; no need for NOPs
 	rd	%wim, %l0
 #endif // !CYGHWR_HAL_SPARC_MULTIPLE_VECTOR_TRAPPING
+//''''''''''''''''''''''''''''''''''''''''''''''''''
+
 __entry_wover:	
 	mov	%g1, %l3		! Save g1, we use it to hold the wim
 	srl	%l0, 1, %g1		! Rotate wim right
@@ -320,12 +383,142 @@
 	jmpl	%l1,  %g0
 	rett	%l2
 
+//_______________________________________________
+#ifndef CYGHWR_HAL_SPARC_MULTIPLE_VECTOR_TRAPPING
+        .global not_window_overflow
+not_window_overflow:
+	bne,a	not_fpdis
+	cmp	%l4, (0x80 << TT_SHL)	! (if taken)
+
+	! here be the entryfpdis handler:
+entryfpdis:
+	wr	%l0, %psr
+	nop
+	nop
+	nop
+	ba __entry_fpdis
+	 nop
+#endif // !CYGHWR_HAL_SPARC_MULTIPLE_VECTOR_TRAPPING
+//''''''''''''''''''''''''''''''''''''''''''''''''''
+
+#ifndef CYGPKG_HAL_SMP_CPU_MAX
+#define CYGPKG_HAL_SMP_CPU_MAX 1
+#endif 
+				
+	.data
+	.global cyg_hal_fpustate_owner
+cyg_hal_fpustate_owner:
+	.rept	CYGPKG_HAL_SMP_CPU_MAX
+	.long	0				! pointer to FPU owning context
+	.endr
+	.global cyg_hal_fpustate_current	
+cyg_hal_fpustate_current:	
+	.rept	CYGPKG_HAL_SMP_CPU_MAX
+	.long	0				! pointer to current threads FPU context
+	.endr
+
+	.section ".vectors","ax"
+	
+	.global __entry_fpdis
+__entry_fpdis:
+
+	set 0x1000,%l3
+	or %l0,%l3,%l0
+	or %l0,0xf00, %l3		! PIL up to 15, enable fpu
+	wr %l3,0, %psr		! restore the condition flags, enable fpu
+	nop
+	nop
+	nop
+
+	hal_smp_cpu %l3			! CPU id
+	sll	%l3, 2, %l3
+	set     cyg_hal_fpustate_current,%l4
+	ld [%l4+%l3],%l4
+	set     cyg_hal_fpustate_owner,%l5
+	ld [%l5+%l3],%l5
+	cmp	%l4,%l5
+	beq	mpfnostore
+	 nop
+	cmp    %g0,%l5
+	 beq	mpfstore
+	nop
+	
+	std	%f0, [%l5 + 0x00]
+	std	%f2, [%l5 + 0x08]
+	std	%f4, [%l5 + 0x10]
+	std	%f6, [%l5 + 0x18]
+	std	%f8, [%l5 + 0x20]
+	std	%f10, [%l5 + 0x28]
+	std	%f12, [%l5 + 0x30]
+	std	%f14, [%l5 + 0x38]
+	std	%f16, [%l5 + 0x40]
+	std	%f18, [%l5 + 0x48]
+	std	%f20, [%l5 + 0x50]
+	std	%f22, [%l5 + 0x58]
+	std	%f24, [%l5 + 0x60]
+	std	%f26, [%l5 + 0x68]
+	std	%f28, [%l5 + 0x70]
+	std	%f30, [%l5 + 0x78]
+	
+	st	%fsr, [%l5 + 0x80]
+	
+mpfstore:	
+	set     cyg_hal_fpustate_owner,%l6
+	st %l4,[%l6+%l3]
+	cmp    %g0,%l4
+	 beq	mpfnostore
+	nop
+	
+	ldd	[%l4 + 0x00], %f0
+	ldd	[%l4 + 0x08], %f2
+	ldd	[%l4 + 0x10], %f4
+	ldd	[%l4 + 0x18], %f6
+	ldd	[%l4 + 0x20], %f8
+	ldd	[%l4 + 0x28], %f10
+	ldd	[%l4 + 0x30], %f12
+	ldd	[%l4 + 0x38], %f14
+	ldd	[%l4 + 0x40], %f16
+	ldd	[%l4 + 0x48], %f18
+	ldd	[%l4 + 0x50], %f20
+	ldd	[%l4 + 0x58], %f22
+	ldd	[%l4 + 0x60], %f24
+	ldd	[%l4 + 0x68], %f26
+	ldd	[%l4 + 0x70], %f28
+	ldd	[%l4 + 0x78], %f30
+	
+	ld	[%l4 + 0x80], %fsr
+
+mpfnostore:	
+	wr	%l0,0, %psr		! restore the condition flags, enable fpu
+	nop
+	nop
+	nop
+	
+	jmpl	%l1,  %g0
+	rett	%l2
+
+
+
+//_______________________________________________
+#ifndef CYGHWR_HAL_SPARC_MULTIPLE_VECTOR_TRAPPING
+        .global not_fpdis
+not_fpdis:      
+	beq,a   syscall
+         srl   %l4,TT_SHL, %l3           ! (if taken)
+        
+        cmp	%l4, (0x0 << TT_SHL)	
+        beq	genuine_reset
+	
+        srl	%l4, 4, %l4		
+#endif // CYGHWR_HAL_SPARC_MULTIPLE_VECTOR_TRAPPING
+//''''''''''''''''''''''''''''''''''''''''''''''''''
+        
 #ifdef CYGHWR_HAL_SPARC_MULTIPLE_VECTOR_TRAPPING
 	// ADDITIONAL code to provide an entry point:
 __entry_exception:
 	srl	%l4, 4, %l4
 #endif // CYGHWR_HAL_SPARC_MULTIPLE_VECTOR_TRAPPING
-not_window_overflow:
+not_exception:      
 	! from here on in, %l4 is the trap number in clear
 	cmp	%l4, 128 
 	bge	1f
@@ -356,8 +549,8 @@
 	
 	! and that is the end of the pre-vector trap handler	
 
-	.global rom_vectors_end
-rom_vectors_end:
+	.global rom_vectors_end, real_vector_instructions
+rom_vectors_end: 
 		
 	! these instructions are copied into the reset vector
 	! after startup to _not_ branch to the genuine_reset code below
@@ -366,48 +559,137 @@
 	rd	%psr, %l0
 
 
-
+	.global	reset_vector
+reset_vector:
+        .global start
+start:
+#ifndef CYGHWR_HAL_SPARC_MULTIPLE_VECTOR_TRAPPING
+        mov %g0,%l3
+        b real_vector_reset
+         nop
+#else
+        b trap_table
+         nop
+#endif
+                        
 	! genuine reset code called from time zero:
 genuine_reset:				! set psr, mask interrupts & traps
-	sethi	%hi(reset_vector), %g1
+	sethi	%hi(trap_table), %g1
 	andn	%g1, 0xfff, %g1		! should not be needed
-	wr	%g1, %tbr		! Traps are at reset_vector
+	wr	%g1, %tbr		! Traps are at trap_table
 	wr	%g0, 0xfc0 + __WIN_INIT, %psr ! mode = prevMode = S, CWP=7
 	wr	%g0, 0, %wim		! No invalid windows (yet)
-#ifdef CYGHWR_HAL_SPARC_HAS_ASR17
-#ifdef CYGHWR_HAL_SPARC_MULTIPLE_VECTOR_TRAPPING
-	wr	%g0, 0, %asr17		! Multiple vector trapping
-#else
-	wr	%g0, 1, %asr17		! Single vector trapping
+        nop
+        nop 
+        nop
+
+#ifndef CYGHWR_HAL_SPARC_MULTIPLE_VECTOR_TRAPPING
+        set     1<<13,%g1       ! Single vector trapping, Leon3: asr17.bit13==1
+        rd      %asr17,%g2
+        or      %g1,%g2,%g2
+	wr	%g2,%asr17	
+        nop 
+	nop
+	nop
+        .global single_vector_trapping_not_active
+single_vector_trapping_not_active:      
+        rd      %asr17,%g2                          !you have to enable Single Vector Trapping in the vhdl model
+        andcc   %g2,%g1,%g2                         !you have to enable Single Vector Trapping in the vhdl model
+         be     single_vector_trapping_not_active   !you have to enable Single Vector Trapping in the vhdl model
+        nop
 #endif // !CYGHWR_HAL_SPARC_MULTIPLE_VECTOR_TRAPPING
-#endif // CYGHWR_HAL_SPARC_HAS_ASR17
+
+// INCLUDE PLATFORM BOOT
+
+#ifdef CYGPKG_HAL_SMP_SUPPORT 
+	 
+	!smp  dbg
+	!set 0x800000, %g2 
+	lda [%g0] 2, %g1          ! cache cfg
+	set 0x800000, %g2         ! snoop enable
+        or %g2,%g1,%g2
+        
+        !set	0x800000, %g2     ! snooping,disable cache for test 
+        
+        sta %g2, [%g0] 2          ! cache cfg
+	
+	rd     %asr17,%g2
+	srl    %g2,28,%g2
+	
+	! trap all cpu's except cpu nr 0
+haltsmp:	
+	cmp %g2,%g0
+	 beq mastergo
 	nop
+
+        
+	! slaves cpus will idle until master cpu (0) will issue a
+	! mctrl->mpstatus write to wake them up. They will here branch to 
+        ! cyg_hal_smp_start then
+	
+cyg_hal_smp_start:	
+	! master called
+	
+	sethi	%hi(trap_table), %g1
+	wr	%g1, %tbr	! Traps are at reset_vector
 	nop
 	nop
+	nop	
+	
+	hal_smp_cpu %fp
+	sll %fp,2,%fp
+	set __interrupt_stack_vector,%i0
+	ld [%i0+%fp], %fp
+	
+	sub	%fp, 16 * 4, %sp	! Stack pointer
 
-// INCLUDE PLATFORM BOOT
+#if (__WINSIZE == 2)
+	wr	%g0, 0, %wim	! 2 windows 
+#else        
+	wr	%g0, __WIM_INIT, %wim	! Window 7 (current) is invalid
+#endif                
+        
+	nop
+	nop
+	nop
+	wr	%g0, 0xfe0 + __WIN_INIT, %psr
+	nop				! Enable traps:             
+	nop				! set psr, _do_ mask interrupts
+	nop				! mode = prevMode = S, CWP=7
 
+	
+	call	cyg_hal_smp_startup
+	 nop
+	
+		
+mastergo:	
+		
+#endif
+	
 // This should set up RAM and caches, and calm down any external interrupt
 // sources.  Also copy two instructions from real_vector_instructions
 // into reset_vector, then invalidate the instruction cache.
 	
 #include <cyg/hal/halboot.si>
-	
+
 // halboot.si returns with %sp all set, in sleb versions.
 // (though we override if there is an interrupt stack)
 
-	led	0x80
-		
 	! now set up a stack and initial frame linkage
 	! so as to be able to make C function calls:
 	! current window is 7, the highest, so we store a
 	! saved frame thingy that refers to itself in the stack,
 	! then another which is valid and drop into main from there.
 
-#ifdef BOOTUPSTACK_IS_INTERRUPTSTACK
-	sethi	%hi(cyg_interrupt_stack), %i6
-	or	%i6, %lo(cyg_interrupt_stack), %i6
-#endif	
+	set cyg_hal_stack_top,%i0
+        st %fp,[%i0]
+        
+	set cyg_interrupt_stack,%fp
+#ifdef CYGPKG_HAL_SMP_SUPPORT
+	set __interrupt_stack_vector,%i0
+	st  %fp,[%i0]
+#endif	 
+	
 	andn	%i6, 7, %i6		! round fp down to double alignment
 	mov	0, %i7			! null return address
 	sethi	%hi(0xb51ac000), %i0	! "BStac" pattern
@@ -430,22 +712,16 @@
 	
 	sub	%fp, 16 * 4, %sp	! Stack pointer
 
-	led	0x90
-	
 	std	%l0, [%sp + 0 * 4]	! save L & I registers
 	std	%l2, [%sp + 2 * 4]	! into new stack frame
 	std	%l4, [%sp + 4 * 4]
 	std	%l6, [%sp + 6 * 4]
 
-	led	0x91
-	
 	std	%i0, [%sp + 8 * 4]
 	std	%i2, [%sp + 10 * 4]
 	std	%i4, [%sp + 12 * 4]
 	std	%i6, [%sp + 14 * 4]
 	
-	led	0x92
-	
 	sethi	%hi(0xb0010000), %o0	! "Boot" pattern
 	or	%o0, 8, %o0	
 	or	%o0, 1, %o1
@@ -453,16 +729,16 @@
 	or	%o0, 3, %o3
 	or	%o0, 4, %o4
 	or	%o0, 5, %o5
-
-	led	0x98
-		
+        
+#if (__WINSIZE == 2)
+	wr	%g0, 0, %wim	! 2 windows 
+#else        
 	wr	%g0, __WIM_INIT, %wim	! Window 7 (current) is invalid
+#endif                
 	nop
 	nop
 	nop
 	
-	led	0x99
-	
 	sethi	%hi(0xb0010000), %g1	! "Boot" pattern
 	or	%g1, 2, %g2
 	or	%g1, 3, %g3
@@ -472,30 +748,86 @@
 	or	%g1, 7, %g7
 	or	%g1, 1, %g1
 
-	led	0xa0
-	
 	wr	%g0, 0xfe0 + __WIN_INIT, %psr
 	nop				! Enable traps:             
 	nop				! set psr, _do_ mask interrupts
 	nop				! mode = prevMode = S, CWP=7
 
-	led	0xb0
+#if defined(CYGHWR_HAL_SPARC_FLAT)
+       	save	%sp, -24 * 4, %sp       ! get valid window
+#endif
 
 	! now we can start calling out and running C code!
 	.extern cyg_hal_start	
 	call	cyg_hal_start		! puts return address in %o7
 	or	%g1, 1, %g1
 	
+#ifdef CYGPKG_HAL_SMP_SUPPORT
+	.extern cyg_hal_smp_init
+	call cyg_hal_smp_init
+	 nop
+#endif
+		
+	call cyg_start /* does not return */
+	 nop
+	
+	
 loop_forever:
 	ta	1
 	b	loop_forever		! if it returns
 	nop
 
-	
+#define SYM(n) n
+#define PUBLIC(n) .globl SYM(n)
+        
+        /*
+         *  system call
+         *
+         *  On entry:
+         *
+         *    l0 = psr (from trap table)
+         *    l1 = pc
+         *    l2 = npc
+         *    i0 = system call id
+         */
+
+        PUBLIC(syscall)
+
+SYM(syscall):
+
+	subcc   %i0, 2, %g0		! syscall 2, disable interrupts
+	bne 	3f
+	or    	%l0, 0x0f00, %l4	! set PIL=15
+	mov   	%l4, %psr
+        or	%l0, SPARC_PSR_ET_MASK, %i0	! return old psr with ET=1
+	ba,a	9f
+3:
+	subcc   %i0, 3, %g0		! syscall 3, enable interrupts
+	bne 	1f
+	and	%i1, SPARC_PSR_PIL_MASK, %l4
+	andn	%l0, SPARC_PSR_PIL_MASK, %l5
+	or	%l5, %l4, %l4
+	mov   	%l4, %psr
+        ba,a	9f
+
+1:					
+	ta	0			! halt 
+9:					! leave
+        jmpl    %l2, %g0
+        rett    %l2 + 4
+
+
+        	
 !---------------------------------------------------------------------------
 ! hal_vsr_table...
 
 	.section ".data"
+
+	.balign 4
+        .global cyg_hal_stack_top
+cyg_hal_stack_top:      !avoid .bss (clear)
+        .long 0x100000
+        
 	.balign 4
 	.global hal_vsr_table
 hal_vsr_table:
@@ -509,12 +841,18 @@
 !---------------------------------------------------------------------------
 ! Bootup stack (only needed explicitly in sim)
 	
-#ifdef BOOTUPSTACK_IS_INTERRUPTSTACK
+#if defined(BOOTUPSTACK_IS_INTERRUPTSTACK) || \
+    defined(CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK)
+	
 	.section ".bss"
-
+        
+        
+#ifndef CYGPKG_HAL_SMP_SUPPORT	
+	
 #ifndef CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE
-#define CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE 4096
+#define CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE 4096  
 #endif
+        
 	.balign 16
 	.global cyg_interrupt_stack_base
 cyg_interrupt_stack_base:
@@ -525,14 +863,41 @@
 	.global cyg_interrupt_stack
 cyg_interrupt_stack:
 	.long	0,0,0,0,0,0,0,0		! here be secret state stored
+
+#else
+	.global __interrupt_stack_vector
+__interrupt_stack_vector:
+	.rept CYGPKG_HAL_SMP_CPU_MAX
+	.long 0
+	.endr
+	
+	.balign 16
+	.global cyg_interrupt_stack_base, __interrupt_stack_first
+cyg_interrupt_stack_base:
+__interrupt_stack_base:
+__interrupt_stack_first:
+	.rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE
+	.byte 0
+	.endr
+	.balign 16
+	.global cyg_interrupt_stack
+cyg_interrupt_stack:
+__interrupt_stack:
+	.rept CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE*(CYGPKG_HAL_SMP_CPU_MAX-1)
+	.byte 0
+	.endr
+	.long	0,0,0,0,0,0,0,0		! here be secret state stored
+	
+#endif
+	
 #endif
 
 !------------------------------------------------------------------------
 ! Define a section that reserves space at the start of RAM for the
 ! vectors to be copied into, for ROM start only.
 	
-	.section ".ram_vectors","awx",@nobits
 #ifdef CYGIMP_HAL_SPARC_COPY_VECTORS_TO_RAM
+	.section ".ram_vectors","awx",@nobits
 	! need a space at base of RAM for copied vector/trampoline code
 	.align 0x1000
 	.space 8			! for fencepost errors
diff -Naur ecos-rep-ori/packages/hal/sparc/erc32/current/cdl/hal_sparc_erc32.cdl ecos-rep/packages/hal/sparc/erc32/current/cdl/hal_sparc_erc32.cdl
--- ecos-rep-ori/packages/hal/sparc/erc32/current/cdl/hal_sparc_erc32.cdl	2005-07-26 17:57:20.000000000 +0200
+++ ecos-rep/packages/hal/sparc/erc32/current/cdl/hal_sparc_erc32.cdl	2005-07-26 18:08:47.000000000 +0200
@@ -115,7 +115,7 @@
             display "Global command prefix"
             flavor  data
             no_define
-            default_value { "sparc-rtems" }
+            default_value { "sparc-elf" }
             description "
                 This option specifies the command prefix used when
                 invoking the build tools."
diff -Naur ecos-rep-ori/packages/hal/sparc/erc32/current/include/hal_xpic.h ecos-rep/packages/hal/sparc/erc32/current/include/hal_xpic.h
--- ecos-rep-ori/packages/hal/sparc/erc32/current/include/hal_xpic.h	2005-07-26 17:57:20.000000000 +0200
+++ ecos-rep/packages/hal/sparc/erc32/current/include/hal_xpic.h	2005-07-26 18:08:47.000000000 +0200
@@ -88,7 +88,7 @@
 
 #define HAL_INTERRUPT_MASK( _vector_ ) CYG_MACRO_START                      \
     cyg_uint32 _traps_, _mask_;                                             \
-    HAL_DISABLE_TRAPS( _traps_ );                                           \
+    HAL_DISABLE_INTERRUPTS( _traps_ );                                      \
     HAL_READ_UINT32( SPARC_MEC_INTCON_MASK, _mask_ );                       \
     _mask_ |= ( 1 << (_vector_) );                                          \
     HAL_WRITE_UINT32(SPARC_MEC_INTCON_MASK,  _mask_ );                      \
@@ -97,7 +97,7 @@
 
 #define HAL_INTERRUPT_UNMASK( _vector_ ) CYG_MACRO_START                    \
     cyg_uint32 _traps_, _mask_;                                             \
-    HAL_DISABLE_TRAPS( _traps_ );                                           \
+    HAL_DISABLE_INTERRUPTS( _traps_ );                                      \
     HAL_READ_UINT32( SPARC_MEC_INTCON_MASK, _mask_ );                       \
     _mask_ &=~ ( 1 << (_vector_) );                                         \
     HAL_WRITE_UINT32( SPARC_MEC_INTCON_MASK, _mask_ );                      \
@@ -106,7 +106,7 @@
 
 #define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ) CYG_MACRO_START               \
     cyg_uint32 _traps_;                                                     \
-    HAL_DISABLE_TRAPS( _traps_ );                                           \
+    HAL_DISABLE_INTERRUPTS( _traps_ );                                      \
     HAL_WRITE_UINT32( SPARC_MEC_INTCON_CLEAR, ( 1 << (_vector_) ) );        \
     HAL_RESTORE_INTERRUPTS( _traps_ );                                      \
 CYG_MACRO_END
diff -Naur ecos-rep-ori/packages/hal/sparc/erc32/current/include/halboot.si ecos-rep/packages/hal/sparc/erc32/current/include/halboot.si
--- ecos-rep-ori/packages/hal/sparc/erc32/current/include/halboot.si	2005-07-26 17:57:20.000000000 +0200
+++ ecos-rep/packages/hal/sparc/erc32/current/include/halboot.si	2005-07-26 18:08:47.000000000 +0200
@@ -119,6 +119,8 @@
 
 
 4:
+
+#ifndef CYGPKG_HAL_SMP_SUPPORT
 	! then copy the branch instructions into the vector
 	rd	%tbr, %g1
 	andn	%g1, 0xfff, %g1		! clear non-address bits
@@ -128,6 +130,7 @@
 	st	%l1, [ %g1 ]		! into the vector
 	ld	[ %l0 + 4 ], %l1
 	st	%l1, [ %g1 + 4 ]	! into the vector
-
+#endif
+        
 #endif  /* CYGONCE_HAL_HALBOOT_SI */
 /* EOF halboot.si */
diff -Naur ecos-rep-ori/packages/hal/sparc/leon/current/cdl/hal_sparc_leon.cdl ecos-rep/packages/hal/sparc/leon/current/cdl/hal_sparc_leon.cdl
--- ecos-rep-ori/packages/hal/sparc/leon/current/cdl/hal_sparc_leon.cdl	2005-07-26 17:57:20.000000000 +0200
+++ ecos-rep/packages/hal/sparc/leon/current/cdl/hal_sparc_leon.cdl	2005-07-26 18:08:47.000000000 +0200
@@ -101,6 +101,7 @@
         }
     }
 
+
     cdl_component CYGBLD_GLOBAL_OPTIONS {
         display "Global build options"
         flavor  none
@@ -115,33 +116,59 @@
             display "Global command prefix"
             flavor  data
             no_define
-            default_value { "sparc-rtems" }
+            default_value { "sparc-elf" }
             description "
                 This option specifies the command prefix used when
                 invoking the build tools."
         }
 
-        cdl_option CYGBLD_GLOBAL_CFLAGS {
+        cdl_option CYGBLD_GLOBAL_CFLAGS_PRE {
             display "Global compiler flags"
             flavor  data
             no_define
-            default_value { "-msoft-float -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" }
+            default_value { "-Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" }
             description   "
                 This option controls the global compiler flags which
                 are used to compile all packages by
                 default. Individual packages may define
                 options which override these global flags."
         }
+    
+        cdl_option CYGBLD_GLOBAL_CFLAGS {
+            display "Final Global compiler flags"
+            flavor  data
+            no_define
+	    calculated {
+		CYGHWR_HAL_SPARC_NOFPU ? 
+		"-msoft-float ".get_data(CYGBLD_GLOBAL_CFLAGS_PRE) :
+		get_data(CYGBLD_GLOBAL_CFLAGS_PRE) }
+            description   "
+		This option append -msoft-float to CFLAGS if no
+		fpu is present "
+        }
 
-        cdl_option CYGBLD_GLOBAL_LDFLAGS {
+        cdl_option CYGBLD_GLOBAL_LDFLAGS_PRE {
             display "Global linker flags"
             flavor  data
             no_define
-            default_value { "-msoft-float -g -nostdlib -Wl,--gc-sections -Wl,-static" }
+            default_value { "-g -nostdlib -fvtable-gc -Wl,--gc-sections -Wl,-static" }
             description   "
                 This option controls the global linker flags. Individual
                 packages may define options which override these global flags."
         }
+	
+        cdl_option CYGBLD_GLOBAL_LDFLAGS {
+            display "Final Global linker flags"
+            flavor  data
+            no_define
+	    calculated {
+		CYGHWR_HAL_SPARC_NOFPU ? 
+		"-msoft-float ".get_data(CYGBLD_GLOBAL_LDFLAGS_PRE) :
+		get_data(CYGBLD_GLOBAL_LDFLAGS_PRE) }
+            description   "
+		This option append -msoft-float to LDFLAGS if no
+		fpu is present "
+        }
     }
 
     cdl_component CYGPKG_HAL_SPARC_LEON_OPTIONS {
diff -Naur ecos-rep-ori/packages/hal/sparc/leon/current/include/hal_xpic.h ecos-rep/packages/hal/sparc/leon/current/include/hal_xpic.h
--- ecos-rep-ori/packages/hal/sparc/leon/current/include/hal_xpic.h	2005-07-26 17:57:20.000000000 +0200
+++ ecos-rep/packages/hal/sparc/leon/current/include/hal_xpic.h	2005-07-26 18:08:47.000000000 +0200
@@ -87,19 +87,19 @@
 
 #define HAL_INTERRUPT_MASK( _vector_ ) CYG_MACRO_START                      \
     cyg_uint32 _traps_, _mask_;                                             \
-    HAL_DISABLE_TRAPS( _traps_ );                                           \
-    HAL_READ_UINT32( SPARC_LEON_INTCON_MASK, _mask_ );                       \
-    _mask_ &= ~( 1 << (_vector_) );                                          \
-    HAL_WRITE_UINT32(SPARC_LEON_INTCON_MASK,  _mask_ );                      \
+    HAL_DISABLE_INTERRUPTS( _traps_ );                                      \
+    HAL_READ_UINT32( SPARC_LEON_INTCON_MASK, _mask_ );                      \
+    _mask_ &= ~( 1 << (_vector_) );                                         \
+    HAL_WRITE_UINT32(SPARC_LEON_INTCON_MASK,  _mask_ );                     \
     HAL_RESTORE_INTERRUPTS( _traps_ );                                      \
 CYG_MACRO_END
 
 #define HAL_INTERRUPT_UNMASK( _vector_ ) CYG_MACRO_START                    \
     cyg_uint32 _traps_, _mask_;                                             \
-    HAL_DISABLE_TRAPS( _traps_ );                                           \
-    HAL_READ_UINT32( SPARC_LEON_INTCON_MASK, _mask_ );                       \
-    _mask_ |= ( 1 << (_vector_) );                                         \
-    HAL_WRITE_UINT32( SPARC_LEON_INTCON_MASK, _mask_ );                      \
+    HAL_DISABLE_INTERRUPTS( _traps_ );                                      \
+    HAL_READ_UINT32( SPARC_LEON_INTCON_MASK, _mask_ );                      \
+    _mask_ |= ( 1 << (_vector_) );                                          \
+    HAL_WRITE_UINT32( SPARC_LEON_INTCON_MASK, _mask_ );                     \
     HAL_RESTORE_INTERRUPTS( _traps_ );                                      \
 CYG_MACRO_END
 
@@ -107,7 +107,7 @@
 /* Interrupts are automatically acknowledged by hardware, not needed ...
 #define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ ) CYG_MACRO_START               \
     cyg_uint32 _traps_;                                                     \
-    HAL_DISABLE_TRAPS( _traps_ );                                           \
+    HAL_DISABLE_INTERRUPTS( _traps_ );                                      \
     HAL_WRITE_UINT32( SPARC_LEON_INTCON_CLEAR, ( 1 << (_vector_) ) );        \
     HAL_RESTORE_INTERRUPTS( _traps_ );                                      \
 CYG_MACRO_END
diff -Naur ecos-rep-ori/packages/hal/sparc/leon/current/include/pkgconf/mlt_sparc_leon_ram.h ecos-rep/packages/hal/sparc/leon/current/include/pkgconf/mlt_sparc_leon_ram.h
--- ecos-rep-ori/packages/hal/sparc/leon/current/include/pkgconf/mlt_sparc_leon_ram.h	2005-07-26 17:57:20.000000000 +0200
+++ ecos-rep/packages/hal/sparc/leon/current/include/pkgconf/mlt_sparc_leon_ram.h	2005-07-26 18:08:47.000000000 +0200
@@ -8,12 +8,12 @@
 
 #endif
 #define CYGMEM_REGION_ram (0x40000000)
-#define CYGMEM_REGION_ram_SIZE (0x80000)
+#define CYGMEM_REGION_ram_SIZE (0x100000)
 #define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
 #ifndef __ASSEMBLER__
 extern char CYG_LABEL_NAME (__heap1) [];
 #endif
 #define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
-#define CYGMEM_SECTION_heap1_SIZE (0x40080000 - (size_t) CYG_LABEL_NAME (__heap1))
+#define CYGMEM_SECTION_heap1_SIZE (0x40100000 - (size_t) CYG_LABEL_NAME (__heap1))
 
 #define CYGHWR_HAL_SPARC_MULTIPLE_VECTOR_TRAPPING
diff -Naur ecos-rep-ori/packages/hal/sparc/leon/current/include/pkgconf/mlt_sparc_leon_ram.ldi ecos-rep/packages/hal/sparc/leon/current/include/pkgconf/mlt_sparc_leon_ram.ldi
--- ecos-rep-ori/packages/hal/sparc/leon/current/include/pkgconf/mlt_sparc_leon_ram.ldi	2005-07-26 17:57:20.000000000 +0200
+++ ecos-rep/packages/hal/sparc/leon/current/include/pkgconf/mlt_sparc_leon_ram.ldi	2005-07-26 18:08:47.000000000 +0200
@@ -6,7 +6,7 @@
 
 MEMORY
 {
-    ram : ORIGIN = 0x40000000, LENGTH = 0x80000
+    ram : ORIGIN = 0x40000000, LENGTH = 0x40000000
 }
 
 SECTIONS
diff -Naur ecos-rep-ori/packages/hal/sparc/leon/current/include/pkgconf/mlt_sparc_leon_ram.mlt ecos-rep/packages/hal/sparc/leon/current/include/pkgconf/mlt_sparc_leon_ram.mlt
--- ecos-rep-ori/packages/hal/sparc/leon/current/include/pkgconf/mlt_sparc_leon_ram.mlt	2005-07-26 17:57:20.000000000 +0200
+++ ecos-rep/packages/hal/sparc/leon/current/include/pkgconf/mlt_sparc_leon_ram.mlt	2005-07-26 18:08:47.000000000 +0200
@@ -1,5 +1,5 @@
 version 0
-region ram 40000000 80000 0 !
+region ram 40000000 40000000 0 !
 section rom_vectors 0 1 0 1 1 1 1 1 40000000 40000000 text text !
 section text 0 1 0 1 0 1 0 1 fini fini !
 section fini 0 1 0 1 0 1 0 1 rodata rodata !
diff -Naur ecos-rep-ori/packages/hal/sparc/leon/current/src/hal_priv.c ecos-rep/packages/hal/sparc/leon/current/src/hal_priv.c
--- ecos-rep-ori/packages/hal/sparc/leon/current/src/hal_priv.c	2005-07-26 17:57:20.000000000 +0200
+++ ecos-rep/packages/hal/sparc/leon/current/src/hal_priv.c	2005-07-26 18:08:47.000000000 +0200
@@ -63,8 +63,20 @@
 extern void hal_board_prestart( void );
 extern void hal_board_poststart( void );
 
+static leon2_eth_init()
+{
+     *((volatile cyg_uint32 *) 0x80000000) |= 0x10f80000;
+     *((volatile cyg_uint32 *) 0x800000A8) |= 
+//     (0xe0 | CYGNUM_DEVS_ETH_SPARC_LEON_IRQ_PIO) << (8*(CYGNUM_DEVS_ETH_SPARC_LEON_IRQ-4));
+     (0xe0 | 4) << (8*(4-4));
+}
+    
+
 void hal_board_prestart( void )
 {
+//#ifdef CYGPKG_DEVS_ETH_SPARC_LEON
+    leon2_eth_init();
+//#endif
 }
 
 void hal_board_poststart( void )
diff -Naur ecos-rep-ori/packages/hal/sparc/leon3/current/ChangeLog ecos-rep/packages/hal/sparc/leon3/current/ChangeLog
--- ecos-rep-ori/packages/hal/sparc/leon3/current/ChangeLog	1970-01-01 01:00:00.000000000 +0100
+++ ecos-rep/packages/hal/sparc/leon3/current/ChangeLog	2005-07-26 18:08:47.000000000 +0200
@@ -0,0 +1,54 @@
+2002-10-19  Jonathan Larmour  <jifl@eCosCentric.com>
+
+	Patch from Jiri Gaisler:
+	* cdl/hal_sparc_leon.cdl: -msoft-float needn't be used in local package
+	since it's defined globally.
+	* include/hal_diag.h: Fix UART TX mask.
+
+2002-03-15  Hugo Tyson  <hmt@redhat.com>
+
+	* cdl/hal_sparc_leon.cdl: Add -msoft-cloat to CYGBLD_GLOBAL_CFLAGS
+	(as well as LDFLAGS) - this gives perfect test coverage in minimal
+	build with the sim.  NB pro tem the tools are called
+	sparc-rtems-gcc et al, but sparc-elf-gcc et al should be OK.
+
+2002-03-14  Jiri Gaisler  <jiri@gaisler.com>
+
+	* Initial version based on the SPARClite SIM HAL.
+
+//===========================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//===========================================================================
+
+//EOF ChangeLog
diff -Naur ecos-rep-ori/packages/hal/sparc/leon3/current/cdl/hal_sparc_leon3.cdl ecos-rep/packages/hal/sparc/leon3/current/cdl/hal_sparc_leon3.cdl
--- ecos-rep-ori/packages/hal/sparc/leon3/current/cdl/hal_sparc_leon3.cdl	1970-01-01 01:00:00.000000000 +0100
+++ ecos-rep/packages/hal/sparc/leon3/current/cdl/hal_sparc_leon3.cdl	2005-07-26 18:08:47.000000000 +0200
@@ -0,0 +1,242 @@
+# ====================================================================
+#
+#      hal_sparc_leon.cdl
+#
+#      SPARC LEON target HAL package configuration data
+#
+# ====================================================================
+#####ECOSGPLCOPYRIGHTBEGIN####
+## -------------------------------------------
+## This file is part of eCos, the Embedded Configurable Operating System.
+## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+##
+## eCos is free software; you can redistribute it and/or modify it under
+## the terms of the GNU General Public License as published by the Free
+## Software Foundation; either version 2 or (at your option) any later version.
+##
+## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+## WARRANTY; without even the implied warranty of MERCHANTABILITY or
+## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+## for more details.
+##
+## You should have received a copy of the GNU General Public License along
+## with eCos; if not, write to the Free Software Foundation, Inc.,
+## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+##
+## As a special exception, if other files instantiate templates or use macros
+## or inline functions from this file, or you compile this file and link it
+## with other works to produce a work based on this file, this file does not
+## by itself cause the resulting work to be covered by the GNU General Public
+## License. However the source code for this file must still be made available
+## in accordance with section (3) of the GNU General Public License.
+##
+## This exception does not invalidate any other reasons why a work based on
+## this file might be covered by the GNU General Public License.
+##
+## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+## at http://sources.redhat.com/ecos/ecos-license/
+## -------------------------------------------
+#####ECOSGPLCOPYRIGHTEND####
+# ====================================================================
+######DESCRIPTIONBEGIN####
+#
+# Author(s):      jskov
+# Original data:  hmt
+# Contributors:
+# Date:           2000-02-10
+#
+#####DESCRIPTIONEND####
+#
+# ====================================================================
+
+cdl_package CYGPKG_HAL_SPARC_LEON3 {
+    display  "Grlib's LEON3 processor"
+    parent        CYGPKG_HAL_SPARC
+    define_header hal_sparc_leon3.h
+    include_dir   cyg/hal
+    description   "
+           Grlib's LEON3 processor HAL package is provided for use
+    	   with both real hardware and the Grmon simulator."
+
+    compile       hal_priv.c boot.S hal_amba.c hal_amba_driver.c hal_diag.c hal_clock.c hal_irq.c
+    compile       leon3_smp.c boot_smp.S hal_help.cxx
+
+    define_proc {
+        puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H   <pkgconf/hal_sparc.h>"
+        puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_sparc_leon3.h>"
+	puts $::cdl_header "//#define CYGHWR_HAL_SPARC_MULTIPLE_VECTOR_TRAPPING /* true for LEON3 */"
+	puts $::cdl_header "#define CYGHWR_HAL_SPARC_HAS_ASR17 /* true for LEON3 */"
+	puts $::cdl_header "#define HAL_IDLE_THREAD_ACTION hal_idle_thread_action /* true for LEON3 */"
+    }
+
+    cdl_component CYG_HAL_STARTUP {
+        display       "Startup type"
+        flavor        data
+        legal_values  {"RAM"}
+        default_value {"RAM"}
+	no_define
+	define -file system.h CYG_HAL_STARTUP
+        description   "
+           When targetting the LEON3 processor only the RAM startup type
+           is usable."
+    }
+
+    # Real-time clock/counter specifics
+    cdl_component CYGNUM_HAL_RTC_CONSTANTS {
+        display       "Real-time clock constants."
+        flavor        none
+    
+        cdl_option CYGNUM_HAL_RTC_NUMERATOR {
+            display       "Real-time clock numerator"
+            flavor        data
+            calculated    1000000000
+        }
+        cdl_option CYGNUM_HAL_RTC_DENOMINATOR {
+            display       "Real-time clock denominator"
+            flavor        data
+            calculated    100
+        }
+        cdl_option CYGNUM_HAL_RTC_PERIOD {
+            display       "Real-time clock period"
+            flavor        data
+            calculated    9999
+        }
+    }
+
+    cdl_component CYGBLD_GLOBAL_OPTIONS {
+        display "Global build options"
+        flavor  none
+        description   "
+	    Global build options including control over
+	    compiler flags, linker flags and choice of toolchain."
+
+
+        parent  CYGPKG_NONE
+
+        cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX {
+            display "Global command prefix"
+            flavor  data
+            no_define
+            default_value { "sparc-elf" }
+            description "
+                This option specifies the command prefix used when
+                invoking the build tools."
+        }
+
+        cdl_option CYGBLD_GLOBAL_CFLAGS_PRE {
+            display "Global compiler flags"
+            flavor  data
+            no_define
+            default_value { "-Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -g -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" }
+            description   "
+                This option controls the global compiler flags which
+                are used to compile all packages by
+                default. Individual packages may define
+                options which override these global flags."
+        }
+    
+        cdl_option CYGBLD_GLOBAL_CFLAGS {
+            display "Final Global compiler flags"
+            flavor  data
+            no_define
+	    calculated {
+                (CYGHWR_HAL_SPARC_FLAT ? " -mflat " : " ") .
+		(CYGHWR_HAL_SPARC_NOFPU ? "-msoft-float ".get_data(CYGBLD_GLOBAL_CFLAGS_PRE) : get_data(CYGBLD_GLOBAL_CFLAGS_PRE)) }
+            description   "
+		This option append -msoft-float to CFLAGS if no
+		fpu is present "
+        }
+
+        cdl_option CYGBLD_GLOBAL_LDFLAGS_PRE {
+            display "Global linker flags"
+            flavor  data
+            no_define
+            default_value { "-g -nostdlib -fvtable-gc -Wl,--gc-sections -Wl,-static" }
+            description   "
+                This option controls the global linker flags. Individual
+                packages may define options which override these global flags."
+        }
+	
+        cdl_option CYGBLD_GLOBAL_LDFLAGS {
+            display "Final Global linker flags"
+            flavor  data
+            no_define
+	    calculated {
+                (CYGHWR_HAL_SPARC_FLAT ? " -mflat " : " ") .
+		(CYGHWR_HAL_SPARC_NOFPU ? "-msoft-float ".get_data(CYGBLD_GLOBAL_LDFLAGS_PRE) : get_data(CYGBLD_GLOBAL_LDFLAGS_PRE)) }
+            description   "
+		This option append -msoft-float to LDFLAGS if no
+		fpu is present "
+        }
+    }
+
+    cdl_option CYGHWR_HAL_SPARC_MULTIPLE_VECTOR_TRAPPING {
+        display       "Multiple vector trapping (MVT)"
+        default_value 1
+        description   "
+            Use Multiple Vector Trapping (MVT) rather than Single Vector
+            Trapping (SVT); SVT is a feature of SPARClite CPUs which saves
+            code RAM at a cost of perhaps slower interrupt and trap dispatch
+            time, depending on cache behavior.  This includes speed of
+            handling register window underflow and overflow, a feature of
+            deep function call stacks on SPARC.  MVT requires 4kB of code
+            space for trap vectors; in contrast SVT uses fewer than 20
+            instructions for trap decoding."
+    }
+
+
+    cdl_component CYGPKG_HAL_SPARC_LEON3_OPTIONS {
+        display "LEON processor build options"
+        flavor  none
+        description   "
+	    Package specific build options including control over
+	    compiler flags used only in building this package,
+	    and details of which tests are built."
+
+
+        cdl_option CYGPKG_HAL_SPARC_LEON3_CFLAGS_ADD {
+            display "Additional compiler flags"
+            flavor  data
+            no_define
+            default_value { "" }
+            description   "
+                This option modifies the set of compiler flags for
+                building the LEON processor HAL. These flags are
+                used in addition to the set of global flags."
+        }
+
+        cdl_option CYGPKG_HAL_SPARC_LEON3_CFLAGS_REMOVE {
+            display "Suppressed compiler flags"
+            flavor  data
+            no_define
+            default_value { "" }
+            description   "
+                This option modifies the set of compiler flags for
+                building the LEON processor HAL. These flags are
+                removed from the set of global flags if present."
+        }
+    }
+
+    cdl_component CYGHWR_MEMORY_LAYOUT {
+        display "Memory layout"
+        flavor data
+        no_define
+        calculated { "sparc_leon3_ram" }
+
+        cdl_option CYGHWR_MEMORY_LAYOUT_LDI {
+            display "Memory layout linker script fragment"
+            flavor data
+            no_define
+            define -file system.h CYGHWR_MEMORY_LAYOUT_LDI
+            calculated { "<pkgconf/mlt_sparc_leon3_ram.ldi>" }
+        }
+
+        cdl_option CYGHWR_MEMORY_LAYOUT_H {
+            display "Memory layout header file"
+            flavor data
+            no_define
+            define -file system.h CYGHWR_MEMORY_LAYOUT_H
+            calculated { "<pkgconf/mlt_sparc_leon3_ram.h>" }
+        }
+    }
+}
diff -Naur ecos-rep-ori/packages/hal/sparc/leon3/current/include/hal_amba.h ecos-rep/packages/hal/sparc/leon3/current/include/hal_amba.h
--- ecos-rep-ori/packages/hal/sparc/leon3/current/include/hal_amba.h	1970-01-01 01:00:00.000000000 +0100
+++ ecos-rep/packages/hal/sparc/leon3/current/include/hal_amba.h	2005-07-26 18:08:47.000000000 +0200
@@ -0,0 +1,234 @@
+#ifndef CYGONCE_HAL_AMBA_H
+#define CYGONCE_HAL_AMBA_H
+
+//=============================================================================
+//
+//      hal_amba.h
+//
+//      HAL AMBA defined 
+//
+//=============================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//=============================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):   Gaisler Research (Konrad Eisele <eiselekd@web.de>)
+// Contributors: 
+// Date:        2004-01-12
+// Purpose:     Define Interrupt support
+// Description: 
+// Usage:
+//              #include <cyg/hal/hal_amba.h>
+//              ...
+//              
+//
+//####DESCRIPTIONEND####
+//
+//=============================================================================
+
+#define LEON3_IO_AREA 0xfff00000
+#define LEON3_CONF_AREA 0xff000
+#define LEON3_AHB_SLAVE_CONF_AREA (1 << 11)
+
+#define LEON3_AHB_CONF_WORDS 8
+#define LEON3_APB_CONF_WORDS 2
+#define LEON3_AHB_MASTERS 8
+#define LEON3_AHB_SLAVES 8
+#define LEON3_APB_SLAVES 16
+#define LEON3_APBUARTS 8
+
+/* Vendor codes */ 
+#define VENDOR_GAISLER   1
+#define VENDOR_PENDER    2
+#define VENDOR_ESA       4 
+#define VENDOR_OPENCORES 8 
+
+/* Gaisler Research device id's */
+#define GAISLER_LEON3    0x003
+#define GAISLER_LEON3DSU 0x004
+#define GAISLER_ETHAHB   0x005
+#define GAISLER_APBMST   0x006
+#define GAISLER_AHBUART  0x007
+#define GAISLER_SRCTRL   0x008
+#define GAISLER_SDCTRL   0x009
+#define GAISLER_APBUART  0x00C
+#define GAISLER_IRQMP    0x00D
+#define GAISLER_AHBRAM   0x00E
+#define GAISLER_GPTIMER  0x011
+#define GAISLER_PCITRG   0x012
+#define GAISLER_PCISBRG  0x013
+#define GAISLER_PCIFBRG  0x014
+#define GAISLER_PCITRACE 0x015
+#define GAISLER_PCIDMA   0x016
+#define GAISLER_AHBTRACE 0x017
+#define GAISLER_ETHDSU   0x018
+#define GAISLER_PIOPORT  0x01A
+   
+#define GAISLER_L2TIME   0xffd /* internal device: leon2 timer */
+#define GAISLER_L2C      0xffe /* internal device: leon2compat */
+#define GAISLER_PLUGPLAY 0xfff /* internal device: plug & play configarea */
+
+
+#ifndef __ASSEMBLER__
+
+extern inline char *gaisler_device_str(int id) {
+  switch(id) {
+  case GAISLER_LEON3:    return "GAISLER_LEON3";
+  case GAISLER_LEON3DSU: return "GAISLER_LEON3DSU";
+  case GAISLER_ETHAHB:   return "GAISLER_ETHAHB";
+  case GAISLER_APBMST:   return "GAISLER_APBMST";
+  case GAISLER_AHBUART:  return "GAISLER_AHBUART";
+  case GAISLER_SRCTRL:   return "GAISLER_SRCTRL";  
+  case GAISLER_SDCTRL:   return "GAISLER_SDCTRL"; 
+  case GAISLER_APBUART:  return "GAISLER_APBUART"; 
+  case GAISLER_IRQMP:    return "GAISLER_IRQMP"; 
+  case GAISLER_AHBRAM:   return "GAISLER_AHBRAM"; 
+  case GAISLER_GPTIMER:  return "GAISLER_GPTIMER";
+  case GAISLER_PCITRG:   return "GAISLER_PCITRG"; 
+  case GAISLER_PCISBRG:  return "GAISLER_PCISBRG"; 
+  case GAISLER_PCIFBRG:  return "GAISLER_PCIFBRG"; 
+  case GAISLER_PCITRACE: return "GAISLER_PCITRACE"; 
+  case GAISLER_AHBTRACE: return "GAISLER_AHBTRACE";
+  case GAISLER_ETHDSU:   return "GAISLER_ETHDSU";
+  case GAISLER_PIOPORT:  return "GAISLER_PIOPORT";
+ 
+  case GAISLER_L2TIME:   return "GAISLER_L2TIME";
+  case GAISLER_L2C:      return "GAISLER_L2C";
+  case GAISLER_PLUGPLAY: return "GAISLER_PLUGPLAY";
+    
+  default: break;
+  }
+  return 0;
+}
+
+#endif
+
+/* European Space Agency device id's */
+#define ESA_LEON2        0x2 
+#define ESA_MCTRL        0xF 
+
+
+#ifndef __ASSEMBLER__
+
+extern inline char *esa_device_str(int id) {
+  switch(id) {
+  case ESA_LEON2:  return "ESA_LEON2";
+  case ESA_MCTRL:  return "ESA_MCTRL";
+  default: break;
+  }
+  return 0;
+}
+
+#endif
+
+/* Opencores device id's */
+#define OPENCORES_PCIBR  0x4  
+#define OPENCORES_ETHMAC 0x5
+
+
+#ifndef __ASSEMBLER__
+
+extern inline char *opencores_device_str(int id) {
+  switch(id) {
+  case OPENCORES_PCIBR:  return "OPENCORES_PCIBR";
+  case OPENCORES_ETHMAC:  return "OPENCORES_ETHMAC";
+  default: break;
+  }
+  return 0;
+}
+
+extern inline char *device_id2str(int vendor, int id) {
+  switch(vendor) {
+  case VENDOR_GAISLER:    return gaisler_device_str(id);
+  case VENDOR_ESA:        return esa_device_str(id);
+  case VENDOR_OPENCORES:  return opencores_device_str(id);
+  case VENDOR_PENDER:
+  default: break;
+  }
+  return 0;
+}
+
+extern inline char *vendor_id2str(int vendor) {
+  switch(vendor) {
+  case VENDOR_GAISLER:    return "VENDOR_GAISLER";
+  case VENDOR_ESA:        return "VENDOR_ESA";
+  case VENDOR_OPENCORES:  return "VENDOR_OPENCORES";
+  case VENDOR_PENDER:     return "VENDOR_PENDER";
+  default: break;
+  }
+  return 0;
+}
+
+#endif
+
+/* Vendor codes */ 
+
+
+
+/* 
+ *
+ * Macros for manipulating Configuration registers  
+ *
+ */
+
+#define LEON3_BYPASS_LOAD_PA(x)	((unsigned long)*((volatile unsigned long*)(x))) 
+#define LEON3_BYPASS_STORE_PA(x,v) (*((volatile unsigned long*)(x)) = (unsigned long)(v)) 
+
+#define amba_get_confword(tab, index, word) (LEON3_BYPASS_LOAD_PA((tab).addr[(index)]+(word)))
+
+#define amba_vendor(x) (((x) >> 24) & 0xff)
+
+#define amba_device(x) (((x) >> 12) & 0xfff)
+
+#define amba_ahb_get_membar(tab, index, nr) (LEON3_BYPASS_LOAD_PA((tab).addr[(index)]+4+(nr)))
+
+#define amba_apb_get_membar(tab, index) (LEON3_BYPASS_LOAD_PA((tab).addr[(index)]+1))
+
+#define amba_membar_start(mbar) (((mbar) & 0xfff00000) & (((mbar) & 0xfff0) << 16))
+
+#define amba_iobar_start(base, iobar) ((base) | ((((iobar) & 0xfff00000)>>12) & (((iobar) & 0xfff0)<<4)) )
+
+#define amba_irq(conf) ((conf) & 0xf)
+
+#define amba_membar_type(mbar) ((mbar) & 0xf)
+
+#define AMBA_TYPE_APBIO 0x1
+#define AMBA_TYPE_MEM   0x2
+#define AMBA_TYPE_AHBIO 0x3
+
+#define AMBA_TYPE_AHBIO_ADDR(addr) (LEON3_IO_AREA | ((addr) >> 12))
+
+//-----------------------------------------------------------------------------
+#endif // ifndef CYGONCE_HAL_AMBA_H
+// End of hal_amba.h
diff -Naur ecos-rep-ori/packages/hal/sparc/leon3/current/include/hal_cache.h ecos-rep/packages/hal/sparc/leon3/current/include/hal_cache.h
--- ecos-rep-ori/packages/hal/sparc/leon3/current/include/hal_cache.h	1970-01-01 01:00:00.000000000 +0100
+++ ecos-rep/packages/hal/sparc/leon3/current/include/hal_cache.h	2005-07-26 18:08:47.000000000 +0200
@@ -0,0 +1,214 @@
+#ifndef CYGONCE_HAL_CACHE_H
+#define CYGONCE_HAL_CACHE_H
+
+//=============================================================================
+//
+//      hal_cache.h
+//
+//      HAL Cache control support (such as it is in the simulator)
+//
+//=============================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//=============================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):   nickg, gthomas, hmt
+// Contributors:        nickg, gthomas, hmt
+// Date:        1999-01-28
+// Purpose:     Define Interrupt support
+// Description: The macros defined here provide the HAL APIs for handling
+//              the caches.
+//              
+// Usage:
+//              #include <cyg/hal/hal_cache.h>
+//              ...
+//              
+//
+//####DESCRIPTIONEND####
+//
+//=============================================================================
+
+#include <pkgconf/hal.h>
+#include <pkgconf/hal_sparc.h>
+#include <cyg/hal/hal_leon3.h>
+
+#include <cyg/infra/cyg_type.h>
+
+//-----------------------------------------------------------------------------
+// LEON cache macros
+
+//-----------------------------------------------------------------------------
+// Cache dimensions
+
+// Data cache
+#define HAL_DCACHE_SIZE                 0x4000    // Size of data cache in bytes
+#define HAL_DCACHE_LINE_SIZE            16        // Size of a data cache line
+#define HAL_DCACHE_WAYS                 1        // Associativity of the cache
+
+// Instruction cache
+#define HAL_ICACHE_SIZE                 0x4000    // Size of cache in bytes
+#define HAL_ICACHE_LINE_SIZE            16        // Size of a cache line
+#define HAL_ICACHE_WAYS                 1        // Associativity of the cache
+
+#define HAL_DCACHE_SETS (HAL_DCACHE_SIZE/(HAL_DCACHE_LINE_SIZE*HAL_DCACHE_WAYS))
+#define HAL_ICACHE_SETS (HAL_ICACHE_SIZE/(HAL_ICACHE_LINE_SIZE*HAL_ICACHE_WAYS))
+
+//-----------------------------------------------------------------------------
+// Global control of data cache
+
+// Enable the data cache
+#define HAL_DCACHE_ENABLE()  
+// Disable the data cache
+#define HAL_DCACHE_DISABLE()
+// Invalidate the entire cache
+#define HAL_DCACHE_INVALIDATE_ALL() __asm__ __volatile__(" flush "); \
+                                    __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t": : \
+			     "i" (ASI_LEON3_DFLUSH) : "memory");
+// Synchronize the contents of the cache with memory.
+#define HAL_DCACHE_SYNC() 
+
+// Set the data cache refill burst size
+//#define HAL_DCACHE_BURST_SIZE(_size_)
+
+// Set the data cache write mode
+//#define HAL_DCACHE_WRITE_MODE( _mode_ )
+
+//#define HAL_DCACHE_WRITETHRU_MODE       0
+//#define HAL_DCACHE_WRITEBACK_MODE       1
+
+// Load the contents of the given address range into the data cache
+// and then lock the cache so that it stays there.
+//#define HAL_DCACHE_LOCK(_base_, _size_)
+
+// Undo a previous lock operation
+//#define HAL_DCACHE_UNLOCK(_base_, _size_)
+
+// Unlock entire cache
+//#define HAL_DCACHE_UNLOCK_ALL()
+
+//-----------------------------------------------------------------------------
+// Data cache line control
+
+// Allocate cache lines for the given address range without reading its
+// contents from memory.
+//#define HAL_DCACHE_ALLOCATE( _base_ , _size_ )
+
+// Write dirty cache lines to memory and invalidate the cache entries
+// for the given address range.
+//#define HAL_DCACHE_FLUSH( _base_ , _size_ )
+
+// Invalidate cache lines in the given range without writing to memory.
+//#define HAL_DCACHE_INVALIDATE( _base_ , _size_ )
+
+// Write dirty cache lines to memory for the given address range.
+//#define HAL_DCACHE_STORE( _base_ , _size_ )
+
+// Preread the given range into the cache with the intention of reading
+// from it later.
+//#define HAL_DCACHE_READ_HINT( _base_ , _size_ )
+
+// Preread the given range into the cache with the intention of writing
+// to it later.
+//#define HAL_DCACHE_WRITE_HINT( _base_ , _size_ )
+
+// Allocate and zero the cache lines associated with the given range.
+//#define HAL_DCACHE_ZERO( _base_ , _size_ )
+
+//-----------------------------------------------------------------------------
+// Global control of Instruction cache - use Data cache controls since they
+// are not separatable.
+
+// Enable the instruction cache
+#define HAL_ICACHE_ENABLE()      HAL_DCACHE_ENABLE()
+
+// Disable the instruction cache
+#define HAL_ICACHE_DISABLE()     HAL_DCACHE_DISABLE()
+
+// Invalidate the entire cache
+#define HAL_ICACHE_INVALIDATE_ALL()  HAL_DCACHE_SYNC();  HAL_DCACHE_INVALIDATE_ALL()
+
+// Synchronize the contents of the cache with memory.
+#define HAL_ICACHE_SYNC()
+
+// Set the instruction cache refill burst size
+//#define HAL_ICACHE_BURST_SIZE(_size_)
+
+// Load the contents of the given address range into the instruction cache
+// and then lock the cache so that it stays there.
+//#define HAL_ICACHE_LOCK(_base_, _size_)
+
+// Undo a previous lock operation
+//#define HAL_ICACHE_UNLOCK(_base_, _size_)
+
+// Unlock entire cache
+//#define HAL_ICACHE_UNLOCK_ALL()
+
+//-----------------------------------------------------------------------------
+// Instruction cache line control
+
+// Invalidate cache lines in the given range without writing to memory.
+//#define HAL_ICACHE_INVALIDATE( _base_ , _size_ )
+
+//-----------------------------------------------------------------------------
+
+externC inline unsigned long sparc_leon3_get_dcachecfg(void) {
+	unsigned int retval;
+	__asm__ __volatile__("lda [%1] %2, %0\n\t" :
+			     "=r" (retval) :
+			     "r" (ASI_LEON3_SYSCTRL_DCFG),
+			     "i" (ASI_LEON3_SYSCTRL));
+	return (retval);
+}
+
+externC inline void sparc_leon3_enable_snooping(void) {
+  //enable snooping
+  __asm__ volatile ("lda [%%g0] 2, %%l1\n\t"  \
+                    "set 0x800000, %%l2\n\t"  \
+                    "or  %%l2, %%l1, %%l2\n\t" \
+                    "sta %%l2, [%%g0] 2\n\t"  \
+                    : : : "l1", "l2");	
+};
+
+externC inline void sparc_leon3_disable_cache(void) {
+  __asm__ volatile ("lda [%%g0] 2, %%l1\n\t"  \
+                    "set 0x00000f, %%l2\n\t"  \
+                    "andn  %%l2, %%l1, %%l2\n\t" \
+                    "sta %%l2, [%%g0] 2\n\t"  \
+                    : : : "l1", "l2");	
+};
+
+
+
+#endif // ifndef CYGONCE_HAL_CACHE_H
+// End of hal_cache.h
diff -Naur ecos-rep-ori/packages/hal/sparc/leon3/current/include/hal_clock.h ecos-rep/packages/hal/sparc/leon3/current/include/hal_clock.h
--- ecos-rep-ori/packages/hal/sparc/leon3/current/include/hal_clock.h	1970-01-01 01:00:00.000000000 +0100
+++ ecos-rep/packages/hal/sparc/leon3/current/include/hal_clock.h	2005-07-26 18:08:47.000000000 +0200
@@ -0,0 +1,86 @@
+#ifndef CYGONCE_HAL_CLOCK_H
+#define CYGONCE_HAL_CLOCK_H
+
+//=============================================================================
+//
+//      hal_clock.h
+//
+//      HAL clock support
+//
+//=============================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//=============================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):   nickg, gthomas, hmt
+// Contributors:        nickg, gthomas, hmt
+// Date:        1999-01-28
+// Purpose:     Define clock support
+// Description: The macros defined here provide the HAL APIs for handling
+//              the clock.
+//              
+// Usage:
+//              #include <cyg/hal/hal_clock.h> // which includes this file
+//              ...
+//              
+//
+//####DESCRIPTIONEND####
+//
+//=============================================================================
+
+#include <cyg/hal/hal_io.h>
+
+
+//-----------------------------------------------------------------------------
+// Clock control
+
+externC cyg_int32 cyg_hal_sparc_clock_period;
+externC void hal_sparc_leon3_clock_init(cyg_uint32 period);
+externC cyg_uint32 hal_sparc_leon3_clock_read(void);
+
+#define HAL_CLOCK_INITIALIZE( _period_ ) hal_sparc_leon3_clock_init(_period_);     
+#define HAL_CLOCK_RESET( _vector_, _period_ ) 
+#define HAL_CLOCK_READ( _pvalue_ ) {                                  \
+   cyg_uint32 _read_;                                                 \
+   _read_ = hal_sparc_leon3_clock_read();                             \
+   *((cyg_uint32 *)(_pvalue_)) =                                      \
+                 (cyg_hal_sparc_clock_period - _read_ ); }
+
+#ifdef CYGVAR_KERNEL_COUNTERS_CLOCK_LATENCY
+#define HAL_CLOCK_LATENCY( _pvalue_ )         HAL_CLOCK_READ( _pvalue_ )
+#endif
+
+//-----------------------------------------------------------------------------
+#endif // ifndef CYGONCE_HAL_CLOCK_H
+// End of hal_clock.h
diff -Naur ecos-rep-ori/packages/hal/sparc/leon3/current/include/hal_diag.h ecos-rep/packages/hal/sparc/leon3/current/include/hal_diag.h
--- ecos-rep-ori/packages/hal/sparc/leon3/current/include/hal_diag.h	1970-01-01 01:00:00.000000000 +0100
+++ ecos-rep/packages/hal/sparc/leon3/current/include/hal_diag.h	2005-07-26 18:08:47.000000000 +0200
@@ -0,0 +1,93 @@
+#ifndef CYGONCE_HAL_HAL_DIAG_H
+#define CYGONCE_HAL_HAL_DIAG_H
+
+/*=============================================================================
+//
+//      hal_diag.h
+//
+//      HAL Support for Kernel Diagnostic Routines
+//
+//=============================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//=============================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):   hmt
+// Contributors:        hmt
+// Date:        1999-01-11
+// Purpose:     HAL Support for Kernel Diagnostic Routines
+// Description: Diagnostic routines for use during kernel development.
+// Usage:       #include <cyg/hal/hal_diag.h>
+//
+//####DESCRIPTIONEND####
+//
+//===========================================================================*/
+
+#include <pkgconf/hal.h>
+
+#include <cyg/infra/cyg_type.h>
+
+/*---------------------------------------------------------------------------*/
+
+#define CYG_DIAG_USE_LEON
+
+/*---------------------------------------------------------------------------*/
+
+#ifdef  CYG_DIAG_USE_LEON
+
+#define HAL_DIAG_INIT()
+
+externC void hal_sparc_leon3_write_char(char c, int wait);
+#define HAL_DIAG_WRITE_CHAR(_c_) hal_sparc_leon3_write_char(_c_,1);
+#define XHAL_DIAG_WRITE_CHAR(_c_) hal_sparc_leon3_write_char(_c_,0);
+
+externC char hal_sparc_leon3_read_char(int wait);
+#define HAL_DIAG_READ_CHAR(_c_) _c_ = hal_sparc_leon3_read_char(1);
+#define XHAL_DIAG_READ_CHAR(_c_) _c_ = = hal_sparc_leon3_read_char(0);
+
+#else
+/*---------------------------------------------------------------------------*/
+/* There is no diagnostic output on LEON processor                      */
+
+#define HAL_DIAG_INIT()
+
+#define HAL_DIAG_WRITE_CHAR(_c_)
+
+#define HAL_DIAG_READ_CHAR(_c_) (_c_) = 0
+
+#endif
+
+/*---------------------------------------------------------------------------*/
+/* end of hal_diag.h                                                         */
+#endif /* CYGONCE_HAL_HAL_DIAG_H */
diff -Naur ecos-rep-ori/packages/hal/sparc/leon3/current/include/hal_leon3.h ecos-rep/packages/hal/sparc/leon3/current/include/hal_leon3.h
--- ecos-rep-ori/packages/hal/sparc/leon3/current/include/hal_leon3.h	1970-01-01 01:00:00.000000000 +0100
+++ ecos-rep/packages/hal/sparc/leon3/current/include/hal_leon3.h	2005-07-26 18:08:47.000000000 +0200
@@ -0,0 +1,229 @@
+#ifndef CYGONCE_HAL_LEON3_H
+#define CYGONCE_HAL_LEON3_H
+
+//=============================================================================
+//
+//      hal_leon3.h
+//
+//      HAL AMBA defined 
+//
+//=============================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//=============================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):   Gaisler Research (Konrad Eisele <eiselekd@web.de>)
+// Contributors: 
+// Date:        2004-01-12
+// Purpose:     Define Interrupt support
+// Description: 
+// Usage:
+//              #include <cyg/hal/hal_leon3.h>
+//              ...
+//              
+//
+//####DESCRIPTIONEND####
+//
+//=============================================================================
+
+
+#include <cyg/infra/cyg_type.h>         // Base types
+#include <pkgconf/hal_sparc.h>
+#include <cyg/hal/hal_amba.h>
+
+/* ASI codes */
+#define ASI_LEON_CACHEMISS      0x01
+#define ASI_LEON_PCI		0x04
+#define ASI_LEON_IFLUSH		0x05
+#define ASI_LEON_DFLUSH		0x06
+#define ASI_LEON_ITAG		0x0c
+#define ASI_LEON_IDATA		0x0d
+#define ASI_LEON_DTAG		0x0e
+#define ASI_LEON_DDATA		0x0f
+#define ASI_LEON_MMUFLUSH	0x18
+#define ASI_LEON_MMUREGS	0x19
+#define ASI_LEON_BYPASS		0x1c
+#define ASI_LEON_FLUSH_PAGE	0x10
+/*
+#define ASI_LEON_FLUSH_SEGMENT	0x11
+#define ASI_LEON_FLUSH_REGION	0x12
+*/
+#define ASI_LEON_FLUSH_CTX	0x13
+#define ASI_LEON_DCTX		0x14
+#define ASI_LEON_ICTX		0x15
+#define ASI_MMU_DIAG		0x1d
+
+#define ASI_LEON3_IFLUSH		0x10
+#define ASI_LEON3_DFLUSH		0x11
+
+#define ASI_LEON3_SYSCTRL		0x02
+
+#define ASI_LEON3_SYSCTRL_ICFG		0x08
+#define ASI_LEON3_SYSCTRL_DCFG		0x0c
+#define ASI_LEON3_SYSCTRL_CFG_SNOOPING (1<<27)
+
+/*
+ *  The following defines the bits in the LEON UART Status Registers.
+ */
+
+#define LEON_REG_UART_STATUS_DR   0x00000001 /* Data Ready */
+#define LEON_REG_UART_STATUS_TSE  0x00000002 /* TX Send Register Empty */
+#define LEON_REG_UART_STATUS_THE  0x00000004 /* TX Hold Register Empty */
+#define LEON_REG_UART_STATUS_BR   0x00000008 /* Break Error */
+#define LEON_REG_UART_STATUS_OE   0x00000010 /* RX Overrun Error */
+#define LEON_REG_UART_STATUS_PE   0x00000020 /* RX Parity Error */
+#define LEON_REG_UART_STATUS_FE   0x00000040 /* RX Framing Error */
+#define LEON_REG_UART_STATUS_ERR  0x00000078 /* Error Mask */
+
+ 
+/*
+ *  The following defines the bits in the LEON UART Ctrl Registers.
+ */
+
+#define LEON_REG_UART_CTRL_RE     0x00000001 /* Receiver enable */
+#define LEON_REG_UART_CTRL_TE     0x00000002 /* Transmitter enable */
+#define LEON_REG_UART_CTRL_RI     0x00000004 /* Receiver interrupt enable */
+#define LEON_REG_UART_CTRL_TI     0x00000008 /* Transmitter interrupt enable */
+#define LEON_REG_UART_CTRL_PS     0x00000010 /* Parity select */
+#define LEON_REG_UART_CTRL_PE     0x00000020 /* Parity enable */
+#define LEON_REG_UART_CTRL_FL     0x00000040 /* Flow control enable */
+#define LEON_REG_UART_CTRL_LB     0x00000080 /* Loop Back enable */
+
+#define LEON3_GPTIMER_EN 1
+#define LEON3_GPTIMER_RL 2
+#define LEON3_GPTIMER_LD 4
+#define LEON3_GPTIMER_IRQEN 8
+
+
+/* irq masks */
+#define LEON_HARD_INT(x)	(1 << (x)) /* irq 0-15 */
+#define LEON_IRQMASK_R		0x0000fffe /* bit 15- 1   */
+
+#define LEON3_IRQMPSTATUS_CPUNR 28
+
+#ifndef __ASSEMBLER__
+
+typedef struct {
+  volatile unsigned int ilevel;
+  volatile unsigned int ipend;
+  volatile unsigned int iforce;
+  volatile unsigned int iclear;
+  volatile unsigned int mpstatus;
+  volatile unsigned int notused01;
+  volatile unsigned int notused02;
+  volatile unsigned int notused03;
+  volatile unsigned int notused10;
+  volatile unsigned int notused11;
+  volatile unsigned int notused12;
+  volatile unsigned int notused13;
+  volatile unsigned int notused20;
+  volatile unsigned int notused21;
+  volatile unsigned int notused22;
+  volatile unsigned int notused23;
+  volatile unsigned int mask[16];
+  volatile unsigned int force[16];
+} LEON3_IrqCtrl_Regs_Map; 
+externC volatile LEON3_IrqCtrl_Regs_Map *LEON3_IrqCtrl_Regs; 
+
+typedef struct {
+  volatile unsigned int data;
+  volatile unsigned int status;
+  volatile unsigned int ctrl;
+  volatile unsigned int scaler;
+} LEON3_APBUART_Regs_Map;
+
+
+typedef struct {
+  volatile unsigned int val;
+  volatile unsigned int rld;
+  volatile unsigned int ctrl;
+  volatile unsigned int unused;
+} LEON3_GpTimerElem_Regs_Map; 
+
+typedef struct {
+  volatile unsigned int scalar;
+  volatile unsigned int scalar_reload;
+  volatile unsigned int config;
+  volatile unsigned int unused;
+  volatile LEON3_GpTimerElem_Regs_Map e[8];
+} LEON3_GpTimer_Regs_Map; 
+
+typedef struct {
+  volatile unsigned int iodata;
+  volatile unsigned int ioout;
+  volatile unsigned int iodir;
+  volatile unsigned int irqmask;
+  volatile unsigned int irqpol;
+  volatile unsigned int irqedge;
+} LEON3_IOPORT_Regs_Map;
+
+/*
+ *  Types and structure used for AMBA Plug & Play bus scanning 
+ */
+
+typedef struct amba_device_table {
+  int            devnr;           /* numbrer of devices on AHB or APB bus */
+  unsigned int   *addr[16];       /* addresses to the devices configuration tables */
+  unsigned int   allocbits[1];       /* 0=unallocated, 1=allocated driver */
+} amba_device_table;
+
+typedef struct amba_confarea_type {
+  amba_device_table ahbmst;
+  amba_device_table ahbslv;
+  amba_device_table apbslv;
+  unsigned int      apbmst;
+} amba_confarea_type;
+
+extern unsigned long amba_find_apbslv_addr(unsigned long vendor, unsigned long device, unsigned long *irq);
+
+// collect apb slaves
+typedef struct amba_apb_device {
+  unsigned int   start, irq;
+} amba_apb_device;
+extern int amba_get_free_apbslv_devices (int vendor, int device, amba_apb_device *dev,int nr);
+
+// collect ahb slaves
+typedef struct amba_ahb_device {
+  unsigned int   start[4], irq;
+} amba_ahb_device;
+extern int amba_get_free_ahbslv_devices (int vendor, int device, amba_ahb_device *dev,int nr);
+extern void amba_init(void);
+
+#endif //!__ASSEMBLER__
+
+
+
+//-----------------------------------------------------------------------------
+#endif // ifndef CYGONCE_HAL_LEON3_H
+// End of hal_leon3.h
diff -Naur ecos-rep-ori/packages/hal/sparc/leon3/current/include/hal_leon3_smp.h ecos-rep/packages/hal/sparc/leon3/current/include/hal_leon3_smp.h
--- ecos-rep-ori/packages/hal/sparc/leon3/current/include/hal_leon3_smp.h	1970-01-01 01:00:00.000000000 +0100
+++ ecos-rep/packages/hal/sparc/leon3/current/include/hal_leon3_smp.h	2005-07-26 18:08:47.000000000 +0200
@@ -0,0 +1,240 @@
+#ifndef CYGONCE_HAL_LEON3_SMP_H
+#define CYGONCE_HAL_LEON3_SMP_H
+
+//=============================================================================
+//
+//      hal_leon3_cmp.h
+//
+//      HAL smp defined 
+//
+//=============================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//=============================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):   Gaisler Research (Konrad Eisele <eiselekd@web.de>)
+// Contributors: 
+// Date:        2004-01-12
+// Purpose:     Define Interrupt support
+// Description: 
+// Usage:
+//              #include <cyg/hal/hal_leon3.h>
+//              ...
+//              
+//
+//####DESCRIPTIONEND####
+//
+//=============================================================================
+
+
+#include <cyg/infra/cyg_type.h>         // Base types
+#include <pkgconf/hal_sparc.h>
+#include <cyg/hal/hal_leon3.h>
+
+#ifdef CYGPKG_HAL_SMP_SUPPORT
+
+//-----------------------------------------------------------------------------
+// CPU numbering macros
+
+externC cyg_uint32 cyg_hal_smp_cpu_running_count;
+
+#define HAL_SMP_CPU_TYPE        cyg_uint32
+
+#define HAL_SMP_CPU_MAX         CYGPKG_HAL_SMP_CPU_MAX
+
+#define HAL_SMP_CPU_COUNT()     cyg_hal_smp_cpu_running_count
+
+#define HAL_SMP_CPU_START_COUNT() HAL_SMP_CPU_MAX
+
+
+externC cyg_uint32 cyg_hal_smp_cpu_count2idx(cyg_uint32 n);
+externC cyg_uint32 cyg_hal_smp_cpu_idx2count(cyg_uint32 n);
+#define HAL_SMP_CPU_COUNT2IDX(n)  cyg_hal_smp_cpu_count2idx(n)
+#define HAL_SMP_CPU_IDX2COUNT(n)  cyg_hal_smp_cpu_idx2count(n)
+
+externC cyg_uint32 sparc_leon3_get_cpuid(void);
+
+#define HAL_SMP_CPU_THIS()                      \
+({                                              \
+    HAL_SMP_CPU_TYPE __id;                      \
+    __asm__ __volatile__(                       \
+         "rd     %%asr17,%0\n\t"                \
+	: "=r" (__id) : );                      \
+    ((__id >> 28) & 0xff);                      \
+})
+
+#define HAL_SMP_CPU_NONE        (CYGPKG_HAL_SMP_CPU_MAX+1)
+
+//-----------------------------------------------------------------------------
+// CPU startup
+
+__externC void cyg_hal_cpu_reset(HAL_SMP_CPU_TYPE cpu);
+
+#define HAL_SMP_CPU_START( __cpu ) cyg_hal_cpu_reset( __cpu );
+
+#define HAL_SMP_CPU_RESCHEDULE_INTERRUPT( __cpu, __wait ) \
+        cyg_hal_cpu_message( __cpu, HAL_SMP_MESSAGE_RESCHEDULE, 0, __wait);
+
+#define HAL_SMP_CPU_TIMESLICE_INTERRUPT( __cpu, __wait ) \
+        cyg_hal_cpu_message( __cpu, HAL_SMP_MESSAGE_TIMESLICE, 0, __wait);
+
+//-----------------------------------------------------------------------------
+// CPU message exchange
+
+__externC void cyg_hal_cpu_message( HAL_SMP_CPU_TYPE cpu,
+                                    CYG_WORD32 msg,
+                                    CYG_WORD32 arg,
+                                    CYG_WORD32 wait);
+
+#define HAL_SMP_MESSAGE_TYPE            0xF0000000
+#define HAL_SMP_MESSAGE_ARG             (~HAL_SMP_MESSAGE_TYPE)
+
+#define HAL_SMP_MESSAGE_RESCHEDULE      0x10000000
+#define HAL_SMP_MESSAGE_MASK            0x20000000
+#define HAL_SMP_MESSAGE_UNMASK          0x30000000
+#define HAL_SMP_MESSAGE_REVECTOR        0x40000000
+#define HAL_SMP_MESSAGE_TIMESLICE       0x50000000
+
+
+//-----------------------------------------------------------------------------
+// Test-and-set support
+// These macros provide test-and-set support for the least significant bit
+// in a word. 
+
+#define HAL_TAS_TYPE    volatile CYG_WORD32
+
+#define HAL_TAS_SET( _tas_, _oldb_ )                    \
+CYG_MACRO_START                                         \
+{                                                       \
+    register CYG_WORD32 __old = 1;                      \
+    __asm__ volatile ("swapa [%2] %3, %0" :             \
+			      "=r" (__old) :            \
+			      "0" (__old),              \
+			      "r" (&_tas_),             \
+			      "i" (1));                 \
+    _oldb_ = ( __old & 1 ) != 0;                        \
+}                                                       \
+CYG_MACRO_END
+
+#define HAL_TAS_CLEAR( _tas_, _oldb_ )                  \
+CYG_MACRO_START                                         \
+{                                                       \
+    register CYG_WORD32 __old = 0;                      \
+    __asm__ volatile ("swapa [%2] %3, %0" :             \
+			      "=r" (__old) :            \
+			      "0" (__old),              \
+			      "r" (&_tas_),             \
+			      "i" (1));                 \
+    _oldb_ = ( __old & 1 ) != 0;                        \
+}                                                       \
+CYG_MACRO_END
+
+
+
+//-----------------------------------------------------------------------------
+// Spinlock support.
+// Built on top of test-and-set code.
+
+#define HAL_SPINLOCK_TYPE       volatile CYG_WORD32
+
+#define HAL_SPINLOCK_INIT_CLEAR 0
+
+#define HAL_SPINLOCK_INIT_SET   1
+
+#define HAL_SPINLOCK_SPIN( _lock_ )             \
+CYG_MACRO_START                                 \
+{                                               \
+    cyg_bool _val_;                             \
+    do                                          \
+    {                                           \
+        HAL_TAS_SET( _lock_, _val_ );           \
+    } while( _val_ );                           \
+}                                               \
+CYG_MACRO_END
+
+#define HAL_SPINLOCK_CLEAR( _lock_ )            \
+CYG_MACRO_START                                 \
+{                                               \
+    cyg_bool _val_;                             \
+    HAL_TAS_CLEAR( _lock_ , _val_ );            \
+}                                               \
+CYG_MACRO_END
+
+#define HAL_SPINLOCK_TRY( _lock_, _val_ )       \
+    HAL_TAS_SET( _lock_, _val_ );               \
+    (_val_) = (((_val_) & 1) == 0)
+
+#define HAL_SPINLOCK_TEST( _lock_, _val_ )      \
+    (_val_) = (((_lock_) & 1) != 0)
+
+//-----------------------------------------------------------------------------
+// Diagnostic output serialization
+
+__externC HAL_SPINLOCK_TYPE cyg_hal_smp_diag_lock;
+
+#define CYG_HAL_DIAG_LOCK_DATA_DEFN \
+        HAL_SPINLOCK_TYPE cyg_hal_smp_diag_lock = HAL_SPINLOCK_INIT_CLEAR
+
+#define CYG_HAL_DIAG_LOCK() HAL_SPINLOCK_SPIN( cyg_hal_smp_diag_lock )
+
+#define CYG_HAL_DIAG_UNLOCK() HAL_SPINLOCK_CLEAR( cyg_hal_smp_diag_lock )
+
+#define leon3smp_diag_printf(fmt,arg...)  \
+    CYG_HAL_DIAG_LOCK();    \
+    diag_printf(fmt,##arg); \
+    CYG_HAL_DIAG_UNLOCK();                      
+
+//-----------------------------------------------------------------------------
+// Some extra definitions
+
+__externC HAL_SPINLOCK_TYPE cyg_hal_ioapic_lock;
+
+//-----------------------------------------------------------------------------
+
+//--------------------------------------------------------------------------
+// irqmp interrupt configuration
+// Additional SMP interrupt configuration support.
+
+externC void leon3_interrupt_set_cpu( CYG_WORD32 vector, HAL_SMP_CPU_TYPE cpu );
+externC void leon3_interrupt_get_cpu( CYG_WORD32 vector, HAL_SMP_CPU_TYPE *cpu );
+externC void leon3_smpirq_raise(CYG_WORD32 cpu);
+
+#define HAL_INTERRUPT_SET_CPU( _vector_, _cpu_ )  leon3_interrupt_set_cpu( _vector_, _cpu_ );
+#define HAL_INTERRUPT_GET_CPU( _vector_, _cpu_ )  leon3_interrupt_get_cpu( _vector_, &(_cpu_) );
+
+#endif // CYGPKG_HAL_SMP_SUPPORT
+
+//-----------------------------------------------------------------------------
+#endif // ifndef CYGONCE_HAL_LEON3_SMP_H
+// End of hal_leon3_smp.h
diff -Naur ecos-rep-ori/packages/hal/sparc/leon3/current/include/hal_xpic.h ecos-rep/packages/hal/sparc/leon3/current/include/hal_xpic.h
--- ecos-rep-ori/packages/hal/sparc/leon3/current/include/hal_xpic.h	1970-01-01 01:00:00.000000000 +0100
+++ ecos-rep/packages/hal/sparc/leon3/current/include/hal_xpic.h	2005-07-26 18:08:47.000000000 +0200
@@ -0,0 +1,101 @@
+#ifndef CYGONCE_HAL_XPIC_H
+#define CYGONCE_HAL_XPIC_H
+
+//=============================================================================
+//
+//      hal_xpic.h
+//
+//      HAL eXternal Programmable Interrupt Controller support
+//
+//=============================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//=============================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):   nickg, gthomas, hmt
+// Contributors:        nickg, gthomas, hmt
+// Date:        1999-01-28
+// Purpose:     Define Interrupt support
+// Description: The macros defined here provide the HAL APIs for handling
+//              an external interrupt controller, and which interrupt is
+//              used for what.
+//              
+// Usage:
+//              #include <cyg/hal/hal_intr.h> // which includes this file
+//              ...
+//              
+//
+//####DESCRIPTIONEND####
+//
+//=============================================================================
+
+#include <cyg/hal/hal_io.h>
+#include <cyg/hal/hal_smp.h>
+#include <cyg/hal/hal_leon3.h>
+
+//-----------------------------------------------------------------------------
+// Interrupt controller access
+
+// The vector used by the Real time clock
+externC cyg_uint32 hal_sparc_leon3_clock_irqnr(void);
+#define CYGNUM_HAL_INTERRUPT_RTC hal_sparc_leon3_clock_irqnr()
+
+
+externC void leon3_disable_irq(unsigned int irq_nr);
+externC void leon3_enable_irq(unsigned int irq_nr);
+
+#define HAL_INTERRUPT_MASK( _vector_ ) CYG_MACRO_START                      \
+    cyg_uint32 _traps_, _mask_;                                             \
+    HAL_DISABLE_INTERRUPTS( _traps_ );                                      \
+    leon3_disable_irq(_vector_);                                            \
+    HAL_RESTORE_INTERRUPTS( _traps_ );                                      \
+CYG_MACRO_END
+
+#define HAL_INTERRUPT_UNMASK( _vector_ ) CYG_MACRO_START                    \
+    cyg_uint32 _traps_, _mask_;                                             \
+    HAL_DISABLE_INTERRUPTS( _traps_ );                                      \
+    leon3_enable_irq(_vector_);                                             \
+    HAL_RESTORE_INTERRUPTS( _traps_ );                                      \
+CYG_MACRO_END
+
+#define HAL_INTERRUPT_ACKNOWLEDGE( _vector_ )              /* nothing */
+
+#define HAL_INTERRUPT_CONFIGURE( _vector_, _level_, _up_ ) /* nothing */
+
+#define HAL_INTERRUPT_SET_LEVEL( _vector_, _level_ ) /* nothing */
+
+
+//-----------------------------------------------------------------------------
+#endif // ifndef CYGONCE_HAL_XPIC_H
+// End of hal_xpic.h
diff -Naur ecos-rep-ori/packages/hal/sparc/leon3/current/include/halboot.si ecos-rep/packages/hal/sparc/leon3/current/include/halboot.si
--- ecos-rep-ori/packages/hal/sparc/leon3/current/include/halboot.si	1970-01-01 01:00:00.000000000 +0100
+++ ecos-rep/packages/hal/sparc/leon3/current/include/halboot.si	2005-07-26 18:08:47.000000000 +0200
@@ -0,0 +1,75 @@
+#ifndef CYGONCE_HAL_HALBOOT_SI /* -*-asm-*- */
+#define CYGONCE_HAL_HALBOOT_SI
+// ====================================================================
+//
+//	<platform>/halboot.si
+//
+//	HAL bootup platform-oriented code (assembler)
+//
+// ====================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+// ====================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s): 	        hmt
+// Contributors:	hmt
+// Date:	        1999-02-01
+// Purpose:	        Bootup code, platform oriented.
+// Description:
+//
+//####DESCRIPTIONEND####
+//
+// ====================================================================
+
+// External Platform Initial Setup
+//
+// This should set up RAM and caches, and calm down any external
+// interrupt sources.
+//
+// It is just plain included in vectors.S
+//
+// RAM has not yet been touched at all; in fact all you have is a
+// register window selected.
+
+
+	! Empty macro for debugging vectors.S
+	.macro led val
+        .endm
+
+	call hal_sparc_leon_init
+	 nop
+	
+	
+#endif  /* CYGONCE_HAL_HALBOOT_SI */
+/* EOF halboot.si */
diff -Naur ecos-rep-ori/packages/hal/sparc/leon3/current/include/leon3_arch.inc ecos-rep/packages/hal/sparc/leon3/current/include/leon3_arch.inc
--- ecos-rep-ori/packages/hal/sparc/leon3/current/include/leon3_arch.inc	1970-01-01 01:00:00.000000000 +0100
+++ ecos-rep/packages/hal/sparc/leon3/current/include/leon3_arch.inc	2005-07-26 18:08:47.000000000 +0200
@@ -0,0 +1,70 @@
+#ifndef CYGONCE_HAL_LEON3_ARCH_INC
+#define CYGONCE_HAL_LEON3_ARCH_INC
+##=============================================================================
+##
+##	arch.inc
+##
+##	sparc assembler header file
+##
+##=============================================================================
+#####ECOSGPLCOPYRIGHTBEGIN####
+## -------------------------------------------
+## This file is part of eCos, the Embedded Configurable Operating System.
+## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+##
+## eCos is free software; you can redistribute it and/or modify it under
+## the terms of the GNU General Public License as published by the Free
+## Software Foundation; either version 2 or (at your option) any later version.
+##
+## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+## WARRANTY; without even the implied warranty of MERCHANTABILITY or
+## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+## for more details.
+##
+## You should have received a copy of the GNU General Public License along
+## with eCos; if not, write to the Free Software Foundation, Inc.,
+## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+##
+## As a special exception, if other files instantiate templates or use macros
+## or inline functions from this file, or you compile this file and link it
+## with other works to produce a work based on this file, this file does not
+## by itself cause the resulting work to be covered by the GNU General Public
+## License. However the source code for this file must still be made available
+## in accordance with section (3) of the GNU General Public License.
+##
+## This exception does not invalidate any other reasons why a work based on
+## this file might be covered by the GNU General Public License.
+##
+## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+## at http://sources.redhat.com/ecos/ecos-license/
+## -------------------------------------------
+#####ECOSGPLCOPYRIGHTEND####
+##=============================================================================
+#######DESCRIPTIONBEGIN####
+##
+## Author(s): 	 Gaisler Research (Konrad Eisele<eiselekd@web.de>) 
+## Contributors: 
+## Date:	
+## Purpose:	Architecture definitions.
+## Description:	This file contains definitions and macros that are
+##              useful for writing assembly code for the sparc CPU family.
+## Usage:
+##		#include <cyg/hal/arch.inc>
+##		...
+##		
+##
+######DESCRIPTIONEND####
+##
+##=============================================================================
+
+#ifdef CYGPKG_HAL_SMP_SUPPORT
+
+	// Put CPU number in register
+	.macro	hal_smp_cpu reg
+ 	rd     %asr17,\reg
+	srl	\reg,28,\reg	
+	.endm
+
+#endif				
+
+#endif // ifndef CYGONCE_HAL_LEON3_ARCH_INC
diff -Naur ecos-rep-ori/packages/hal/sparc/leon3/current/include/pkgconf/mlt_sparc_leon3_ram.h ecos-rep/packages/hal/sparc/leon3/current/include/pkgconf/mlt_sparc_leon3_ram.h
--- ecos-rep-ori/packages/hal/sparc/leon3/current/include/pkgconf/mlt_sparc_leon3_ram.h	1970-01-01 01:00:00.000000000 +0100
+++ ecos-rep/packages/hal/sparc/leon3/current/include/pkgconf/mlt_sparc_leon3_ram.h	2005-07-26 18:08:47.000000000 +0200
@@ -0,0 +1,21 @@
+// eCos memory layout - Fri Oct 20 08:18:20 2000
+
+// This is a generated file - do not edit
+
+#ifndef __ASSEMBLER__
+#include <cyg/infra/cyg_type.h>
+#include <stddef.h>
+#endif
+
+externC unsigned int cyg_hal_stack_top;
+#define CYGHAL_DSUSUPPLIED_STACK_TOP cyg_hal_stack_top
+
+#define CYGMEM_REGION_ram (0x40000000)
+#define CYGMEM_REGION_ram_SIZE (CYGHAL_DSUSUPPLIED_STACK_TOP-CYGMEM_REGION_ram)
+#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__heap1) [];
+#endif
+#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
+#define CYGMEM_SECTION_heap1_SIZE (CYGHAL_DSUSUPPLIED_STACK_TOP - (size_t) CYG_LABEL_NAME (__heap1))
+
diff -Naur ecos-rep-ori/packages/hal/sparc/leon3/current/include/pkgconf/mlt_sparc_leon3_ram.h.bck ecos-rep/packages/hal/sparc/leon3/current/include/pkgconf/mlt_sparc_leon3_ram.h.bck
--- ecos-rep-ori/packages/hal/sparc/leon3/current/include/pkgconf/mlt_sparc_leon3_ram.h.bck	1970-01-01 01:00:00.000000000 +0100
+++ ecos-rep/packages/hal/sparc/leon3/current/include/pkgconf/mlt_sparc_leon3_ram.h.bck	2005-07-26 18:08:47.000000000 +0200
@@ -0,0 +1,19 @@
+// eCos memory layout - Fri Oct 20 08:18:20 2000
+
+// This is a generated file - do not edit
+
+#ifndef __ASSEMBLER__
+#include <cyg/infra/cyg_type.h>
+#include <stddef.h>
+
+#endif
+#define CYGMEM_REGION_ram (0x40000000)
+#define CYGMEM_REGION_ram_SIZE (0x100000)
+#define CYGMEM_REGION_ram_ATTR (CYGMEM_REGION_ATTR_R | CYGMEM_REGION_ATTR_W)
+#ifndef __ASSEMBLER__
+extern char CYG_LABEL_NAME (__heap1) [];
+#endif
+#define CYGMEM_SECTION_heap1 (CYG_LABEL_NAME (__heap1))
+#define CYGMEM_SECTION_heap1_SIZE (0x40100000 - (size_t) CYG_LABEL_NAME (__heap1))
+
+#define CYGHWR_HAL_SPARC_MULTIPLE_VECTOR_TRAPPING
diff -Naur ecos-rep-ori/packages/hal/sparc/leon3/current/include/pkgconf/mlt_sparc_leon3_ram.ldi ecos-rep/packages/hal/sparc/leon3/current/include/pkgconf/mlt_sparc_leon3_ram.ldi
--- ecos-rep-ori/packages/hal/sparc/leon3/current/include/pkgconf/mlt_sparc_leon3_ram.ldi	1970-01-01 01:00:00.000000000 +0100
+++ ecos-rep/packages/hal/sparc/leon3/current/include/pkgconf/mlt_sparc_leon3_ram.ldi	2005-07-26 18:08:47.000000000 +0200
@@ -0,0 +1,26 @@
+// eCos memory layout - Fri Oct 20 08:18:20 2000
+
+// This is a generated file - do not edit
+
+#include <cyg/infra/cyg_type.inc>
+
+MEMORY
+{
+    ram : ORIGIN = 0x40000000, LENGTH = 0x40000000
+}
+
+SECTIONS
+{
+    SECTIONS_BEGIN
+    SECTION_rom_vectors (ram, 0x40000000, LMA_EQ_VMA)
+    SECTION_text (ram, ALIGN (0x1), LMA_EQ_VMA)
+    SECTION_fini (ram, ALIGN (0x1), LMA_EQ_VMA)
+    SECTION_rodata (ram, ALIGN (0x1), LMA_EQ_VMA)
+    SECTION_rodata1 (ram, ALIGN (0x1), LMA_EQ_VMA)
+    SECTION_fixup (ram, ALIGN (0x1), LMA_EQ_VMA)
+    SECTION_gcc_except_table (ram, ALIGN (0x1), LMA_EQ_VMA)
+    SECTION_data (ram, ALIGN (0x1), LMA_EQ_VMA)
+    SECTION_bss (ram, ALIGN (0x8), LMA_EQ_VMA)
+    CYG_LABEL_DEFN(__heap1) = ALIGN (0x8);
+    SECTIONS_END
+}
diff -Naur ecos-rep-ori/packages/hal/sparc/leon3/current/include/pkgconf/mlt_sparc_leon3_ram.mlt ecos-rep/packages/hal/sparc/leon3/current/include/pkgconf/mlt_sparc_leon3_ram.mlt
--- ecos-rep-ori/packages/hal/sparc/leon3/current/include/pkgconf/mlt_sparc_leon3_ram.mlt	1970-01-01 01:00:00.000000000 +0100
+++ ecos-rep/packages/hal/sparc/leon3/current/include/pkgconf/mlt_sparc_leon3_ram.mlt	2005-07-26 18:08:47.000000000 +0200
@@ -0,0 +1,12 @@
+version 0
+region ram 40000000 40000000 0 !
+section rom_vectors 0 1 0 1 1 1 1 1 40000000 40000000 text text !
+section text 0 1 0 1 0 1 0 1 fini fini !
+section fini 0 1 0 1 0 1 0 1 rodata rodata !
+section rodata 0 1 0 1 0 1 0 1 rodata1 rodata1 !
+section rodata1 0 1 0 1 0 1 0 1 fixup fixup !
+section fixup 0 1 0 1 0 1 0 1 gcc_except_table gcc_except_table !
+section gcc_except_table 0 1 0 1 0 1 0 1 data data !
+section data 0 1 0 1 0 1 0 1 bss bss !
+section bss 0 8 0 1 0 1 0 1 heap1 heap1 !
+section heap1 0 8 0 0 0 0 0 0 !
diff -Naur ecos-rep-ori/packages/hal/sparc/leon3/current/src/boot.S ecos-rep/packages/hal/sparc/leon3/current/src/boot.S
--- ecos-rep-ori/packages/hal/sparc/leon3/current/src/boot.S	1970-01-01 01:00:00.000000000 +0100
+++ ecos-rep/packages/hal/sparc/leon3/current/src/boot.S	2005-07-26 18:08:47.000000000 +0200
@@ -0,0 +1,430 @@
+// ====================================================================
+//
+//	HAL bootup platform-oriented code (assembler)
+//
+// ====================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+// ====================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s): 	        Gaisler Research, (Konrad Eisele<eiselekd@web.de>)
+// Contributors:	
+// Date:	        1999-02-01
+// Purpose:	        Bootup code, platform oriented.
+// Description:
+//
+//####DESCRIPTIONEND####
+//
+// ====================================================================
+
+#include <pkgconf/system.h>	
+#include <pkgconf/hal.h>
+#include <cyg/hal/hal_amba.h>
+#include <pkgconf/hal_sparc_leon3.h>
+
+!unsigned int ahbslv_scan(register unsigned int vendor,register unsigned int driver) {
+!  register unsigned int conf, mbar,i, *confp;
+!  register unsigned int cfg_area = (unsigned int ) (LEON3_IO_AREA | LEON3_CONF_AREA | LEON3_AHB_SLAVE_CONF_AREA);
+!  for (i = 0; i < LEON3_AHB_SLAVES; i++) 
+!  {
+!    confp = (unsigned int*)(cfg_area + (i * LEON3_AHB_CONF_WORDS * 4));
+!    conf = *confp;
+!    //mbar = *(unsigned int*)(i * LEON3_AHB_CONF_WORDS+ (4 * 4));
+!    if ((amba_vendor(conf) == vendor) && (amba_device(conf) == driver)) {
+!      return (unsigned int)confp;
+!    }
+!  }
+!  return 0;
+!}
+        
+	.section	".text"
+	.align 4
+ahbslv_scan:
+	mov	%o0, %g1
+	mov	-2048, %o5
+	mov	0, %o3
+	sll	%o3, 5, %o0
+.LL11:
+	add	%o5, %o0, %o4
+	ld	[%o5+%o0], %o2
+	srl	%o2, 24, %o0
+	cmp	%o0, %g1
+	bne,a	.LL10
+	add	%o3, 1, %o3
+	srl	%o2, 12, %o0
+	and	%o0, 4095, %o0
+	cmp	%o0, %o1
+	be	.LL1
+	mov	%o4, %o2
+	add	%o3, 1, %o3
+.LL10:
+	cmp	%o3, 7
+	bleu,a	.LL11
+	sll	%o3, 5, %o0
+	mov	0, %o2
+.LL1:
+	retl
+	mov	%o2, %o0
+
+
+!unsigned int apbslv_scan(register unsigned int base,register unsigned int vendor, register unsigned int driver) {
+!  register unsigned int conf, mbar,i, *confp;
+!  for (i = 0; i < LEON3_APB_SLAVES; i++) 
+!  {
+!    confp = (unsigned int*)(base + (i * LEON3_APB_CONF_WORDS * 4));
+!    conf = *confp;
+!    //mbar = *(unsigned int*)(i * LEON3_AHB_CONF_WORDS+ (4 * 4));
+!    if ((amba_vendor(conf) == vendor) && (amba_device(conf) == driver)) {
+!      return (unsigned int)confp;
+!    }
+!  }
+!  return 0;
+!}
+
+
+         
+	.section	".text"
+	.align 4
+
+apbslv_scan:
+	mov	%o0, %g1
+	mov	0, %o4
+	sll	%o4, 3, %o0
+.LL22:
+	add	%g1, %o0, %o5
+	ld	[%g1+%o0], %o3
+	srl	%o3, 24, %o0
+	cmp	%o0, %o1
+	bne,a	.LL21
+	add	%o4, 1, %o4
+	srl	%o3, 12, %o0
+	and	%o0, 4095, %o0
+	cmp	%o0, %o2
+	be	.LL12
+	mov	%o5, %o3
+	add	%o4, 1, %o4
+.LL21:
+	cmp	%o4, 15
+	bleu,a	.LL22
+	sll	%o4, 3, %o0
+	mov	0, %o3
+.LL12:
+	retl
+	mov	%o3, %o0
+
+
+
+!unsigned int getbase(register unsigned int *mbar,register unsigned int iobase) {
+!  register unsigned int conf = mbar[1];
+!  return ((iobase & 0xfff00000) |
+!          ((conf & 0xfff00000)>> 12)) & (((conf & 0x0000fff0) <<4) | 0xfff00000);
+!  
+!}
+        
+         
+	.section	".text"
+	.align 4
+
+getbase:
+	ld	[%o0+4], %o2
+	sethi	%hi(-1048576), %o3
+	and	%o1, %o3, %o1
+	and	%o2, %o3, %o0
+	srl	%o0, 12, %o0
+	or	%o1, %o0, %o1
+	sethi	%hi(64512), %o0
+	or	%o0, 1008, %o0
+	and	%o2, %o0, %o2
+	sll	%o2, 4, %o2
+	or	%o2, %o3, %o2
+	and	%o1, %o2, %o1
+	retl
+	mov	%o1, %o0
+
+
+#define BOOTLOADER_FREQ_KHZ 40000
+#define BOOTLOADER_SRAMSZ_KB 4096
+#define BOOTLOADER_SDRAMSZ_MB 0
+#define BOOTLOADER_BAUD 38400
+
+#define BOOTLOADER_memcfg1  0x28022
+#define BOOTLOADER_memcfg2  0x4201220
+#define BOOTLOADER_uart     0xa2
+#define BOOTLOADER_loopback 0x0
+#define BOOTLOADER_flow     0x0
+#define BOOTLOADER_ftreg    0x0
+
+#define BOOTLOADER_grlib_sdram 0x420013b
+
+#define BOOTLOADER_freq      40500000
+
+#define BOOTLOADER_ramsize   0x3ff000
+#define BOOTLOADER_romsize   0x800000
+#define BOOTLOADER_stack     0x403fefe0
+
+#define START_USING_DSU
+
+
+
+        
+	.global hal_sparc_leon_init
+	.global LEON3_IrqCtrl_Regs, LEON3_GpTimer_Regs, LEON3_APBUART_Regs
+hal_sparc_leon_init:
+
+	flush
+
+#ifdef CYGPKG_HAL_SMP_SUPPORT
+        !lda [%g0] 2, %g1           ! init cache
+	!set 0x800000, %g2          ! snooping enable
+        !or  %g2, %g1, %g2
+ 
+        !set	0x800000, %g2   ! snooping,disable cache for test
+          
+        !sta %g2, [%g0] 2          ! init cache
+       
+	!set	0x81000f, %g2   ! snooping enable
+        !set	0x800000, %g2   ! snooping enable
+#else
+	!set	0x01000f, %g2
+        !set	0x000000, %g2 
+        !sta %g2, [%g0] 2          ! init cache
+#endif	
+
+	clr	%g1
+	clr	%g2
+	clr	%g3
+	clr	%g4
+	clr	%g5
+	clr	%g6
+	mov	%o7,%g7
+        
+        set VENDOR_GAISLER, %o0
+        set GAISLER_APBMST, %o1
+        call ahbslv_scan
+        nop
+        
+        cmp %g0,%o0
+        be .goonhardreset
+         nop
+        
+        ld [%o0+16],%g1
+        set LEON3_IO_AREA,%o0
+        and %g1,%o0,%g1            !g1: apb base
+
+        set LEON3_CONF_AREA,%o0
+        or %g1,%o0,%g2             !g2: apb conf base
+
+	! *********** irq *****************
+        mov %g2,%o0
+        set VENDOR_GAISLER, %o1
+        set GAISLER_IRQMP,%o2
+        call apbslv_scan
+         nop
+        cmp %g0,%o0
+        be .goonhardreset
+         nop
+        
+        call getbase
+         mov %g1,%o1
+        
+        st    %g0, [%o1 + 0x0]  !irq pri   
+        st    %g0, [%o1 + 0x4]  !irq pend  
+        st    %g0, [%o1 + 0x8]  !irq force 
+        st    %g0, [%o1 + 0xC]  !irq clear
+        st    %g0, [%o1 + 0x40]  !irq mask
+	
+	set   LEON3_IrqCtrl_Regs,%o0
+	st    %o1,[%o0]
+				
+	! *********** timer *****************
+	
+        mov %g2,%o0
+        set VENDOR_GAISLER, %o1
+        set GAISLER_GPTIMER,%o2
+        call apbslv_scan
+         nop
+        cmp %g0,%o0
+        be .goonhardreset
+         nop
+        
+        call getbase
+         mov %g1,%o1
+        
+	set	(BOOTLOADER_FREQ_KHZ+500)/1000, %o0		! Load timer scaler register
+	sub	%o0, 1, %o0
+  	st	%o0, [%o1 + 0x00] ! scaler
+  	st	%o0, [%o1 + 0x04] ! scaler reload
+
+	set   LEON3_GpTimer_Regs,%o0
+	st    %o1,[%o0]
+
+#ifndef START_USING_DSU
+                
+	! ************ mctrl ************
+	
+        mov %g2,%o0
+        set VENDOR_ESA, %o1
+        set ESA_MCTRL,%o2
+        call apbslv_scan
+         nop
+        cmp %g0,%o0
+        be .LL1mctlsdram
+         nop
+
+        call getbase
+         mov %g1,%o1
+
+#define MCTRLBASE %g4        
+        mov %o1,MCTRLBASE             !mctrl base address
+
+	set	BOOTLOADER_memcfg1, %o0		! Load memory config register 1
+	ld	[%o1+0x00], %o2		! 
+	and	%o2, 0x300, %o2
+	or	%o0, %o2, %o0
+  	st	%o0, [%o1 + 0x00]
+	
+	set	BOOTLOADER_memcfg2, %o0		! Load memory config register 2
+#if !( defined(TSIM) || !defined(BZIMAGE))
+	st	%o0, [%o1 + 0x04]		! only for prom version, else done by "dumon -i"	
+#endif 
+	set	BOOTLOADER_ftreg, %o0		! Init FT register
+	st	%o0, [%o1 + 0x08]
+  	ld	[%o1 + 0x08], %o0
+	srl	%o0, 30, %o0
+	andcc	%o0, 3, %g6
+	bne,a	1f
+	mov	%g0, %asr16		! clear err_reg
+1:
+	ba	.LL1mctlok
+	nop
+	
+
+	! ************ gaisler sdram mctrl ************
+	
+.LL1mctlsdram:
+
+        set VENDOR_GAISLER, %o0
+        set GAISLER_SDCTRL, %o1
+        call ahbslv_scan
+        nop
+        
+        cmp %g0,%o0
+        be .LL1mctlok                ! assuming sram/prom ctrl
+         nop
+
+        ld [%o0+16+4],%g1            ! get io bar
+        set LEON3_IO_AREA,%o0
+        and %g1,%o0,%g1
+	srl %g1,12,%g1
+        or  %g1,%o0,%g1
+	
+
+	set	BOOTLOADER_grlib_sdram, %o0
+	st	%o0, [%g1 + 0x100]
+
+	! ************ uart ************
+
+#endif //!START_USING_DSU
+        
+.LL1mctlok:		
+        mov %g2,%o0
+        set VENDOR_GAISLER, %o1
+        set GAISLER_APBUART,%o2
+        call apbslv_scan
+         nop
+        cmp %g0,%o0
+        be .goonhardreset
+         nop
+        
+        call getbase
+         mov %g1,%o1
+        
+#define UARTBASE %g5       
+        mov %o1,UARTBASE             !uart base address
+                
+        
+        !########################################################
+        ! initialization: protect g5 (uartbase)
+        
+	!set	BOOTLOADER_uart, %g2		! Load UART scaler register
+	!st	%g2, [UARTBASE + 0x0c]  ! uart scalar !st	%g2, [%g1 + 0x0c]
+
+        ld [UARTBASE + 0x08], %o0
+        or %o0,0x3,%o0
+#if defined(CONFIG_UARTLOOPBACK) || (BOOTLOADER_loopback==1)
+	!set	0x83|(BOOTLOADER_flow<<6), %g2			! Enable uarts, (flow ctrl), loopback
+#else
+	!set	0x03|(BOOTLOADER_flow<<6), %g2			! Enable uarts, (flow ctrl)
+#endif
+  	st	%o0, [UARTBASE + 0x08]
+        
+        !set	0xc3|(BOOTLOADER_flow<<6), %g2			! Enable uarts, (flow ctrl)
+  	!st	%g2, [UARTBASE + 0x08]
+	
+	set LEON3_APBUART_Regs,%o0
+	st UARTBASE,[%o0]
+
+
+	!#######################################################
+	! end
+	
+        ! then copy the branch instructions into the vector
+	
+	rd	%tbr, %g1
+	andn	%g1, 0xfff, %g1		! clear non-address bits
+	sethi	%hi(real_vector_instructions), %l0
+	or	%l0, %lo(real_vector_instructions), %l0
+
+#if CYGHWR_HAL_SPARC_MULTIPLE_VECTOR_TRAPPING        
+#if !defined(CYGPKG_HAL_SMP_SUPPORT)
+	ld	[ %l0 ], %l1
+	st	%l1, [ %g1 ]		! into the vector
+	ld	[ %l0 + 4 ], %l1
+	st	%l1, [ %g1 + 4 ]	! into the vector
+#endif
+#endif
+        	
+.goonhardreset:
+
+#ifndef START_USING_DSU        
+	set	BOOTLOADER_stack, %fp
+	andn	%fp, 0x0f, %fp
+	sub	%fp, 64, %sp
+#endif
+        
+	mov	%g7,%o7
+        retl
+	 nop
+		
+	
diff -Naur ecos-rep-ori/packages/hal/sparc/leon3/current/src/boot_smp.S ecos-rep/packages/hal/sparc/leon3/current/src/boot_smp.S
--- ecos-rep-ori/packages/hal/sparc/leon3/current/src/boot_smp.S	1970-01-01 01:00:00.000000000 +0100
+++ ecos-rep/packages/hal/sparc/leon3/current/src/boot_smp.S	2005-07-26 18:08:47.000000000 +0200
@@ -0,0 +1,68 @@
+// ====================================================================
+//
+//	<platform>/halboot.si
+//
+//	HAL bootup platform-oriented code (assembler)
+//
+// ====================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+// ====================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s): 	        Gaisler Research, (Konrad Eisele<eiselekd@web.de>)
+// Contributors:	
+// Date:	        1999-02-01
+// Purpose:	        Bootup code, platform oriented.
+// Description:
+//
+//####DESCRIPTIONEND####
+//
+// ====================================================================
+
+#include <cyg/hal/hal_amba.h>
+
+	.global hal_sparc_leon_smpinit
+	
+hal_sparc_leon_smpinit:
+
+	rd     %asr17,%g2
+	srl    %g2,28,%g2
+	
+	! trap all cpu's except cpu nr 0
+1:	cmp %g2,%g0
+	 bne .1b
+	nop
+	   
+			
+	
diff -Naur ecos-rep-ori/packages/hal/sparc/leon3/current/src/hal_amba.c ecos-rep/packages/hal/sparc/leon3/current/src/hal_amba.c
--- ecos-rep-ori/packages/hal/sparc/leon3/current/src/hal_amba.c	1970-01-01 01:00:00.000000000 +0100
+++ ecos-rep/packages/hal/sparc/leon3/current/src/hal_amba.c	2005-07-26 18:08:47.000000000 +0200
@@ -0,0 +1,232 @@
+//===========================================================================
+//
+//      hal_amba.c
+//
+//      SPARC Architecture LEON3-specific private variables
+//
+//===========================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//===========================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):    Gaisler Research (Konrad Eisele<eiselekd@web.de>)
+// Contributors: 
+// Date:         2004
+// Purpose:      private amba for LEON3 processor.
+//              
+//####DESCRIPTIONEND####
+//
+//===========================================================================
+
+#include <stdlib.h>
+#include <string.h>
+#include <stdio.h>
+#include <stdarg.h>
+#include <cyg/hal/hal_leon3.h>
+#include <cyg/infra/diag.h>
+
+//#define DEBUG_CONFIG
+
+/* Structure containing address to devices found on the Amba Plug&Play bus */
+amba_confarea_type amba_conf;
+
+/* Pointers to Interrupt Controller configuration registers */
+volatile LEON3_IrqCtrl_Regs_Map *LEON3_IrqCtrl_Regs = 0;
+volatile LEON3_GpTimer_Regs_Map *LEON3_GpTimer_Regs = 0;
+volatile LEON3_APBUART_Regs_Map *LEON3_APBUART_Regs = 0;
+unsigned long LEON3_GpTimer_Irq = 0;
+
+static void vendor_dev_string(unsigned long conf, char *vendorbuf,char *devbuf) {
+  int vendor = amba_vendor(conf); int dev = amba_device(conf);
+  char *devstr; char *vendorstr; 
+  sprintf(vendorbuf, "Unknown vendor %2x",vendor);
+  sprintf(devbuf, "Unknown device %2x",dev);
+  vendorstr = vendor_id2str(vendor);
+  if (vendorstr) {
+    sprintf(vendorbuf, "%s",vendorstr);
+  } 
+  devstr = device_id2str(vendor,dev);
+  if (devstr) {
+    sprintf(devbuf, "%s",devstr);
+  }
+}
+
+void amba_prinf_config(void)  
+{
+  char devbuf[128]; char vendorbuf[128]; unsigned int conf;
+  int i = 0; int j = 0; 
+  unsigned int addr; unsigned int m;
+  diag_printf("             Vendors         Slaves\n");
+  diag_printf("Ahb masters:\n");
+  i = 0;
+  while (i < amba_conf.ahbmst.devnr) 
+  {
+    conf = amba_get_confword(amba_conf.ahbmst, i, 0);
+    vendor_dev_string(conf,vendorbuf,devbuf);
+    diag_printf("%2i(%2x:%3x|%2i): %16s %16s \n", i, amba_vendor(conf), amba_device(conf), amba_irq(conf), vendorbuf, devbuf);
+    for (j = 0;j < 4;j++) {
+      m = amba_ahb_get_membar(amba_conf.ahbmst,i,j);
+      if (m) {
+        addr = amba_membar_start(m);
+        diag_printf(" +%i: 0x%x \n", j, addr);
+      }
+    }
+    i++;
+  }
+  diag_printf("Ahb slaves:\n");
+  i = 0;
+  while (i < amba_conf.ahbslv.devnr) 
+  {
+    conf = amba_get_confword(amba_conf.ahbslv, i, 0);
+    vendor_dev_string(conf,vendorbuf,devbuf);
+    diag_printf("%2i(%2x:%3x|%2i): %16s %16s \n", i, amba_vendor(conf), amba_device(conf), amba_irq(conf), vendorbuf, devbuf);
+    for (j = 0;j < 4;j++) {
+      m = amba_ahb_get_membar(amba_conf.ahbslv,i,j);
+      if (m) {
+        addr = amba_membar_start(m);
+	if (amba_membar_type(m) == AMBA_TYPE_AHBIO) {
+	  addr = AMBA_TYPE_AHBIO_ADDR(addr);
+	} else if (amba_membar_type(m) == AMBA_TYPE_APBIO) {
+	  diag_printf("Warning: apbio membar\n");
+	}
+	diag_printf(" +%i: 0x%x (raw:0x%x)\n", j, addr, m);
+      }
+    }
+    i++;
+  }
+  diag_printf("Apb slaves:\n");
+  i = 0;
+  while (i < amba_conf.apbslv.devnr) 
+  {
+    
+    conf = amba_get_confword(amba_conf.apbslv, i, 0);
+    vendor_dev_string(conf,vendorbuf,devbuf);
+    diag_printf("%2i(%2x:%3x|%2i): %16s %16s \n", i, amba_vendor(conf), amba_device(conf), amba_irq(conf), vendorbuf, devbuf);
+    
+    m = amba_apb_get_membar(amba_conf.apbslv, i);
+    addr = amba_iobar_start(amba_conf.apbmst, m);
+    diag_printf(" +%2i: 0x%x (raw:0x%x) \n", 0, addr, m);
+    
+    i++;
+    
+  }
+  
+}
+
+#define amba_insert_device(tab, address) \
+{ \
+  if (LEON3_BYPASS_LOAD_PA(address)) \
+  { \
+    (tab)->addr[(tab)->devnr] = (address); \
+    (tab)->devnr ++; \
+  } \
+} while(0)
+
+/*
+ *  Used to scan system bus. Probes for AHB masters, AHB slaves and 
+ *  APB slaves. Addresses to configuration areas of the AHB masters,
+ *  AHB slaves, APB slaves and APB master are storeds in 
+ *  amba_ahb_masters, amba_ahb_slaves and amba.
+ */
+
+void amba_init(void) 
+{
+  unsigned int *cfg_area;  /* address to configuration area */
+  unsigned int mbar, conf;
+  int i, j;
+  
+#ifdef DEBUG_CONFIG
+  diag_printf("Reading AMBA Plug&Play configuration area\n");
+#endif
+
+  memset(&amba_conf,0,sizeof(amba_conf));
+  //amba_conf.ahbmst.devnr = 0; amba_conf.ahbslv.devnr = 0; amba_conf.apbslv.devnr = 0;
+  
+  cfg_area = (unsigned int *) (LEON3_IO_AREA | LEON3_CONF_AREA);
+
+  for (i = 0; i < LEON3_AHB_MASTERS; i++) 
+  {
+    amba_insert_device(&amba_conf.ahbmst, cfg_area);
+    cfg_area += LEON3_AHB_CONF_WORDS;
+  }
+
+  cfg_area = (unsigned int *) (LEON3_IO_AREA | LEON3_CONF_AREA | LEON3_AHB_SLAVE_CONF_AREA);
+  for (i = 0; i < LEON3_AHB_SLAVES; i++) 
+  {
+    amba_insert_device(&amba_conf.ahbslv, cfg_area);
+    cfg_area += LEON3_AHB_CONF_WORDS;
+  }  
+
+  for (i = 0; i < amba_conf.ahbslv.devnr; i ++) 
+  {
+    conf = amba_get_confword(amba_conf.ahbslv, i, 0);
+    mbar = amba_ahb_get_membar(amba_conf.ahbslv, i, 0);
+    if ((amba_vendor(conf) == VENDOR_GAISLER) && (amba_device(conf) == GAISLER_APBMST))
+    {
+      amba_conf.apbmst = amba_membar_start(mbar);
+      cfg_area = (unsigned int *) (amba_conf.apbmst | LEON3_CONF_AREA);
+      
+      //diag_printf("Found apbmst, cfg: 0x%x\n",(unsigned int)cfg_area);
+      
+      for (j = amba_conf.apbslv.devnr; j < LEON3_APB_SLAVES; j++)
+      {
+	amba_insert_device(&amba_conf.apbslv, cfg_area);
+	cfg_area += LEON3_APB_CONF_WORDS;
+      }
+    }
+  }    
+ 
+  /* Find LEON3 Interrupt controler */
+  LEON3_IrqCtrl_Regs = (volatile LEON3_IrqCtrl_Regs_Map *) amba_find_apbslv_addr(VENDOR_GAISLER, GAISLER_IRQMP, 0);
+  LEON3_GpTimer_Regs = (volatile LEON3_GpTimer_Regs_Map *) amba_find_apbslv_addr(VENDOR_GAISLER, GAISLER_GPTIMER, &LEON3_GpTimer_Irq);
+  if (LEON3_IrqCtrl_Regs) {
+    //LEON3_BYPASS_STORE_PA(&(LEON3_IrqCtrl_Regs ->mask[0]),0);
+  }
+}
+
+unsigned long amba_find_apbslv_addr(unsigned long vendor, unsigned long device, unsigned long *irq) {
+  unsigned int i,conf,iobar;
+  for (i = 0; i < amba_conf.apbslv.devnr; i++) {
+    conf = amba_get_confword(amba_conf.apbslv, i, 0);
+    if ((amba_vendor(conf) == vendor) && (amba_device(conf) == device))
+    {
+      if (irq) {
+        *irq = amba_irq(conf);
+      }
+      iobar = amba_apb_get_membar(amba_conf.apbslv, i);
+      return amba_iobar_start(amba_conf.apbmst, iobar);
+    }
+  }
+  return 0;
+}
diff -Naur ecos-rep-ori/packages/hal/sparc/leon3/current/src/hal_amba_driver.c ecos-rep/packages/hal/sparc/leon3/current/src/hal_amba_driver.c
--- ecos-rep-ori/packages/hal/sparc/leon3/current/src/hal_amba_driver.c	1970-01-01 01:00:00.000000000 +0100
+++ ecos-rep/packages/hal/sparc/leon3/current/src/hal_amba_driver.c	2005-07-26 18:08:47.000000000 +0200
@@ -0,0 +1,124 @@
+//===========================================================================
+//
+//      hal_amba_driver.c
+//
+//      SPARC Architecture LEON3-specific private variables
+//
+//===========================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//===========================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):    Gaisler Research (Konrad Eisele<eiselekd@web.de>)
+// Contributors: 
+// Date:         2004
+// Purpose:      private amba for LEON3 processor.
+//              
+//####DESCRIPTIONEND####
+//
+//===========================================================================
+
+#include <cyg/hal/hal_leon3.h>
+#include <cyg/infra/cyg_ass.h>
+
+//#define DEBUG_CONFIG
+
+/* Structure containing address to devices found on the Amba Plug&Play bus */
+extern amba_confarea_type amba_conf;
+ 
+//collect apb slaves
+int amba_get_free_apbslv_devices (int vendor, int device, amba_apb_device *dev,int nr) {
+  unsigned int i,conf,iobar,j = 0;
+#ifdef DEBUG_CONFIG
+    diag_printf("Apbslv: search for apdslv devices\n");
+#endif
+  for (i = 0; i < amba_conf.apbslv.devnr && j < nr; i++) {
+    conf = amba_get_confword(amba_conf.apbslv, i, 0);
+#ifdef DEBUG_CONFIG
+    diag_printf("Apbslv: check(%x:%x)==(%x:%x)\n",vendor,device,amba_vendor(conf),amba_device(conf));
+#endif
+    if ((amba_vendor(conf) == vendor) && (amba_device(conf) == device)) {
+      if (!(amba_conf.apbslv.allocbits[i / 32] & (1 << (i & (32-1))))) {
+#ifdef DEBUG_CONFIG
+        diag_printf("Apbslv: alloc device idx %i (%x:%x)\n",j,vendor,device);
+#endif
+        amba_conf.apbslv.allocbits[i / 32] |= (1 << (i & (32-1)));
+        dev[j].irq = amba_irq(conf);
+        iobar = amba_apb_get_membar(amba_conf.apbslv, i);
+        dev[j].start = amba_iobar_start(amba_conf.apbmst, iobar);
+#ifdef DEBUG_CONFIG
+	diag_printf(" +bar: 0x%x \n", k, dev[j].start);
+#endif
+        j++;
+      }
+    }
+  }
+  return j;
+}
+
+//collect ahb slaves
+int amba_get_free_ahbslv_devices (int vendor, int device, amba_ahb_device *dev,int nr) {
+  unsigned int addr, i,conf,iobar,j = 0,k;
+#ifdef DEBUG_CONFIG
+    diag_printf("Ahbslv: search for ahdslv devices\n");
+#endif
+  for (i = 0; i < amba_conf.ahbslv.devnr && j < nr; i++) {
+    conf = amba_get_confword(amba_conf.ahbslv, i, 0);
+#ifdef DEBUG_CONFIG
+    diag_printf("Ahbslv: check(%x:%x)==(%x:%x)\n",vendor,device,amba_vendor(conf),amba_device(conf));
+#endif
+    if ((amba_vendor(conf) == vendor) && (amba_device(conf) == device)) {
+      if (!(amba_conf.ahbslv.allocbits[i / 32] & (1 << (i & (32-1))))) {
+#ifdef DEBUG_CONFIG
+        diag_printf("Ahbslv: alloc device idx %i (%x:%x)\n",j,vendor,device);
+#endif
+        amba_conf.ahbslv.allocbits[i / 32] |= (1 << (i & (32-1)));
+        dev[j].irq = amba_irq(conf);
+	for (k = 0; k < 4; k ++) {
+	  iobar = amba_ahb_get_membar(amba_conf.ahbslv, i, k);
+	  addr = amba_membar_start(iobar);
+	  if (amba_membar_type(iobar) == AMBA_TYPE_AHBIO) {
+	    addr = AMBA_TYPE_AHBIO_ADDR(addr);
+	  }
+	  dev[j].start[k] = addr;
+#ifdef DEBUG_CONFIG
+	  diag_printf(" +%i: 0x%x \n", k, dev[j].start[k]);
+#endif
+	}
+        j++;
+      }
+    }
+  }
+  return j;
+}
diff -Naur ecos-rep-ori/packages/hal/sparc/leon3/current/src/hal_clock.c ecos-rep/packages/hal/sparc/leon3/current/src/hal_clock.c
--- ecos-rep-ori/packages/hal/sparc/leon3/current/src/hal_clock.c	1970-01-01 01:00:00.000000000 +0100
+++ ecos-rep/packages/hal/sparc/leon3/current/src/hal_clock.c	2005-07-26 18:08:47.000000000 +0200
@@ -0,0 +1,96 @@
+//===========================================================================
+//
+//      hal_amba.c
+//
+//      SPARC Architecture LEON3-specific private variables
+//
+//===========================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//===========================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):    Gaisler Research (Konrad Eisele<eiselekd@web.de>)
+// Contributors: 
+// Date:         2004
+// Purpose:      private amba for LEON3 processor.
+//              
+//####DESCRIPTIONEND####
+//
+//===========================================================================
+
+#include <stdlib.h>
+#include <string.h>
+#include <stdio.h>
+#include <stdarg.h>
+#include <cyg/hal/hal_leon3.h>
+#include <cyg/infra/diag.h>
+#include <cyg/hal/hal_amba.h>
+#include <cyg/infra/cyg_trac.h>         // tracing macros
+#include <cyg/hal/hal_clock.h> // which includes this file
+
+extern volatile LEON3_GpTimer_Regs_Map *LEON3_GpTimer_Regs;
+
+void hal_sparc_leon3_clock_init(cyg_uint32 period) {
+  cyg_hal_sparc_clock_period = (period);                        \
+  
+  if (LEON3_GpTimer_Regs) {
+    
+    LEON3_BYPASS_STORE_PA(&LEON3_GpTimer_Regs ->e[0].val,(period));
+    LEON3_BYPASS_STORE_PA(&LEON3_GpTimer_Regs ->e[0].rld,(period));
+    LEON3_BYPASS_STORE_PA(&LEON3_GpTimer_Regs ->e[0].ctrl,0);
+    
+    LEON3_BYPASS_STORE_PA(&LEON3_GpTimer_Regs ->e[0].ctrl,
+			  LEON3_GPTIMER_EN |
+			  LEON3_GPTIMER_RL |
+			  LEON3_GPTIMER_IRQEN |
+			  LEON3_GPTIMER_LD);
+  } else {
+    diag_printf("Clock init failed");
+  }
+}
+
+cyg_uint32 hal_sparc_leon3_clock_read(void) {
+  if (LEON3_GpTimer_Regs) {
+    return LEON3_BYPASS_LOAD_PA(&LEON3_GpTimer_Regs ->e[0].val);
+  }
+  return 1;
+}
+
+extern unsigned long LEON3_GpTimer_Irq;
+cyg_uint32 hal_sparc_leon3_clock_irqnr(void) {
+  if (!LEON3_GpTimer_Irq) {
+    amba_init();
+  }
+  return LEON3_GpTimer_Irq;
+}
diff -Naur ecos-rep-ori/packages/hal/sparc/leon3/current/src/hal_diag.c ecos-rep/packages/hal/sparc/leon3/current/src/hal_diag.c
--- ecos-rep-ori/packages/hal/sparc/leon3/current/src/hal_diag.c	1970-01-01 01:00:00.000000000 +0100
+++ ecos-rep/packages/hal/sparc/leon3/current/src/hal_diag.c	2005-07-26 18:08:47.000000000 +0200
@@ -0,0 +1,90 @@
+//===========================================================================
+//
+//      hal_amba.c
+//
+//      SPARC Architecture LEON3-specific private variables
+//
+//===========================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//===========================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):    Gaisler Research (Konrad Eisele<eiselekd@web.de>)
+// Contributors: 
+// Date:         2004
+// Purpose:      private amba for LEON3 processor.
+//              
+//####DESCRIPTIONEND####
+//
+//===========================================================================
+
+#include <stdlib.h>
+#include <string.h>
+#include <stdio.h>
+#include <stdarg.h>
+#include <cyg/hal/hal_leon3.h>
+#include <cyg/infra/diag.h>
+#include <cyg/hal/hal_io.h>
+
+extern volatile LEON3_APBUART_Regs_Map *LEON3_APBUART_Regs;
+
+void hal_sparc_leon3_write_char(char c, int wait) {
+  //if( c != '\r' ) {      
+    if (LEON3_APBUART_Regs) {
+      if (wait) {
+	unsigned int status;
+	do {
+	  HAL_READ_UINT32( &(LEON3_APBUART_Regs->status), status );
+	} while (!(status & LEON_REG_UART_STATUS_THE));
+      }                                                    
+      HAL_WRITE_UINT32(&(LEON3_APBUART_Regs->data),c);
+    } 
+    //}                                                                       
+}
+
+char hal_sparc_leon3_read_char(int wait) {
+  char c = 0;
+  if (LEON3_APBUART_Regs) {
+    if (wait) {
+      unsigned int status;
+      do {
+	HAL_READ_UINT32( &(LEON3_APBUART_Regs->status), status );
+      } while (!(status & LEON_REG_UART_STATUS_DR));
+    }
+    HAL_READ_UINT32(&(LEON3_APBUART_Regs-> data),c);
+  }
+  return c;
+}
+
+
diff -Naur ecos-rep-ori/packages/hal/sparc/leon3/current/src/hal_help.cxx ecos-rep/packages/hal/sparc/leon3/current/src/hal_help.cxx
--- ecos-rep-ori/packages/hal/sparc/leon3/current/src/hal_help.cxx	1970-01-01 01:00:00.000000000 +0100
+++ ecos-rep/packages/hal/sparc/leon3/current/src/hal_help.cxx	2005-07-26 18:08:47.000000000 +0200
@@ -0,0 +1,94 @@
+//==========================================================================
+//
+// access some c++ values
+//
+//==========================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+// Copyright (C) 2002 Nick Garnett
+// Copyright (C) 2003 Jonathan Larmour
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//==========================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):   
+// Contributors: 
+// Date:        
+// Purpose:     
+// Description: 
+//              
+//
+//####DESCRIPTIONEND####
+//
+//==========================================================================
+
+#include <pkgconf/kernel.h>
+
+#ifdef CYGFUN_KERNEL_API_C
+
+#include <cyg/kernel/ktypes.h>         // base kernel types
+#include <cyg/infra/cyg_trac.h>        // tracing macros
+#include <cyg/infra/cyg_ass.h>         // assertion macros
+#include <cyg/kernel/instrmnt.h>       // instrumentation
+#include <cyg/kernel/diag.h>
+
+#include <cyg/kernel/thread.hxx>
+#include <cyg/kernel/thread.inl>       // thread inlines
+#include <cyg/kernel/sched.hxx>
+#include <cyg/kernel/intr.hxx>
+#include <cyg/kernel/clock.hxx>
+
+#include <cyg/kernel/sema.hxx>
+#include <cyg/kernel/flag.hxx>
+#include <cyg/kernel/mutex.hxx>
+#include <cyg/kernel/mbox.hxx>
+
+#include <cyg/kernel/sched.inl>        // scheduler inlines
+#include <cyg/kernel/clock.inl>        // clock inlines
+
+#include <cyg/kernel/kapi.h>           // C API
+
+externC int cyg_hal_get_current_threadid() 
+{
+  Cyg_Thread *current = Cyg_Scheduler_Base::get_current_thread();
+  return current ->get_unique_id();
+}
+
+externC int cyg_hal_get_current_cpuid() 
+{
+  return CYG_KERNEL_CPU_THIS();
+}
+
+
+          
+
+#endif //CYGFUN_KERNEL_API_C
diff -Naur ecos-rep-ori/packages/hal/sparc/leon3/current/src/hal_irq.c ecos-rep/packages/hal/sparc/leon3/current/src/hal_irq.c
--- ecos-rep-ori/packages/hal/sparc/leon3/current/src/hal_irq.c	1970-01-01 01:00:00.000000000 +0100
+++ ecos-rep/packages/hal/sparc/leon3/current/src/hal_irq.c	2005-07-26 18:08:47.000000000 +0200
@@ -0,0 +1,227 @@
+//===========================================================================
+//
+//      hal_irq.c
+//
+//      SPARC Architecture LEON3-specific private variables
+//
+//===========================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//===========================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):    Gaisler Research (Konrad Eisele<eiselekd@web.de>)
+// Contributors: 
+// Date:         2004
+// Purpose:      private amba for LEON3 processor.
+//              
+//####DESCRIPTIONEND####
+//
+//===========================================================================
+
+#ifdef CYGPKG_KERNEL
+#include <pkgconf/kernel.h>
+#endif
+
+#include <cyg/infra/cyg_type.h>         // Base types
+#include <cyg/infra/cyg_trac.h>         // tracing macros
+#include <cyg/infra/cyg_ass.h>          // assertion macros
+#include <cyg/infra/diag.h>
+
+#include <cyg/hal/hal_intr.h>
+#include <cyg/hal/hal_io.h>
+#include <cyg/hal/hal_leon3.h>
+#include <cyg/hal/hal_smp.h>
+
+#define LEON_HARD_INT(x) (1 << (x)) 
+externC volatile LEON3_IrqCtrl_Regs_Map *LEON3_IrqCtrl_Regs; 
+#define LEON_IMASK(i) ((&LEON3_IrqCtrl_Regs ->mask[i]))
+#define LEON_IFORCE(i) ((&LEON3_IrqCtrl_Regs ->iforce[i]))
+
+#define get_irqmask(irq) LEON_HARD_INT(irq)
+
+/*static inline unsigned long get_irqmask(unsigned int irq)
+{
+	unsigned long mask;
+	if (!irq || irq > 0xf) {
+	  //diag_printf("leon_get_irqmask: false irq number\n");
+	  mask = 0;
+	} else {
+	  mask = LEON_HARD_INT(irq);
+	}
+	return mask;
+}*/
+
+#ifndef CYGPKG_HAL_SMP_SUPPORT
+
+void leon3_disable_irq(unsigned int irq_nr)
+{
+	unsigned long mask, v;
+	mask = get_irqmask(irq_nr) & LEON_IRQMASK_R;
+	HAL_READ_UINT32(LEON_IMASK(0),v);
+	HAL_WRITE_UINT32(LEON_IMASK(0), (v & ~(mask)));
+	
+}
+
+void leon3_enable_irq(unsigned int irq_nr)
+{
+	unsigned long mask,v;
+	mask = get_irqmask(irq_nr) & LEON_IRQMASK_R;
+	HAL_READ_UINT32(LEON_IMASK(0),v);
+	HAL_WRITE_UINT32(LEON_IMASK(0), (v | (mask)));
+}
+
+#else
+
+unsigned long irq_mask;
+unsigned long cpu_route_mask[CYGPKG_HAL_SMP_CPU_MAX];
+HAL_SPINLOCK_TYPE cyg_hal_smp_smpirq_lock = HAL_SPINLOCK_INIT_CLEAR;
+
+/* route all irq to 0 */
+void leon3_smpirq_init(void) {
+  cpu_route_mask[0] = -1;
+}
+
+void leon3_disable_irq(unsigned int irq_nr)
+{
+  unsigned long mask, cpu;
+
+  //diag_printf("disable %d\n",irq_nr);
+  
+  mask = get_irqmask(irq_nr) & LEON_IRQMASK_R;
+  irq_mask &= ~mask;
+  HAL_SPINLOCK_SPIN( cyg_hal_smp_smpirq_lock );
+  for (cpu = 0; cpu < HAL_SMP_CPU_COUNT(); cpu++) {
+    mask = cpu_route_mask[cpu] & irq_mask;
+    HAL_WRITE_UINT32(LEON_IMASK(cpu), mask);
+  }
+  HAL_SPINLOCK_CLEAR( cyg_hal_smp_smpirq_lock );
+}
+
+void leon3_enable_irq(unsigned int irq_nr)
+{
+  unsigned long mask, cpu, v = 0;
+  mask = get_irqmask(irq_nr) & LEON_IRQMASK_R;
+
+  //diag_printf("enable %d\n",irq_nr);
+
+  
+  for (cpu = 0; cpu < HAL_SMP_CPU_COUNT(); cpu++) {
+    v |= cpu_route_mask[cpu] & mask;
+  }
+  if (!v) {
+    cpu_route_mask[0] |= mask;
+  }
+
+  irq_mask |= mask;
+  HAL_SPINLOCK_SPIN( cyg_hal_smp_smpirq_lock );
+  for (cpu = 0; cpu < HAL_SMP_CPU_COUNT(); cpu++) {
+    mask = cpu_route_mask[cpu] & irq_mask;
+    HAL_WRITE_UINT32(LEON_IMASK(cpu), mask);
+  }
+  HAL_SPINLOCK_CLEAR( cyg_hal_smp_smpirq_lock );
+}
+
+void leon3_interrupt_set_cpu( CYG_WORD32 vector, HAL_SMP_CPU_TYPE cpu ) {
+  unsigned long mask, i;
+
+  HAL_SPINLOCK_SPIN( cyg_hal_smp_smpirq_lock );
+  mask = get_irqmask(vector) & LEON_IRQMASK_R;
+  for (i = 0; i < HAL_SMP_CPU_COUNT(); i++) {
+    if ( i == cpu) {
+      cpu_route_mask[i] |= mask;
+    } else {
+      cpu_route_mask[i] &= ~mask;
+    }
+    //mask = cpu_route_mask[i] & irq_mask;
+    HAL_WRITE_UINT32(LEON_IMASK(i), cpu_route_mask[i] & irq_mask);
+  }
+  HAL_SPINLOCK_CLEAR( cyg_hal_smp_smpirq_lock );
+}
+
+void leon3_interrupt_get_cpu( CYG_WORD32 vector, HAL_SMP_CPU_TYPE *cpu ){
+  unsigned long mask, i;
+
+  mask = get_irqmask(vector) & LEON_IRQMASK_R;
+  *cpu = 0;
+  for (i = 0; i < HAL_SMP_CPU_COUNT(); i++) {
+    if (cpu_route_mask[i] & mask) {
+      *cpu = i;
+    }
+  }
+}
+
+
+void leon3_smpirq_raise(CYG_WORD32 cpu) {
+    unsigned long mask = get_irqmask(CYGNUM_HAL_SMP_CPU_INTERRUPT_VECTOR(cpu)) & LEON_IRQMASK_R;
+    unsigned long  i, v;
+    unsigned long masksaved[HAL_SMP_CPU_MAX];
+    HAL_SMP_CPU_TYPE me = HAL_SMP_CPU_THIS();
+    CYG_INTERRUPT_STATE istate = 0;    
+    
+    HAL_DISABLE_INTERRUPTS( istate );
+
+    /*if (cpu == me) {
+      while(1);
+      }*/
+    
+    HAL_SPINLOCK_SPIN( cyg_hal_smp_smpirq_lock );
+    
+    HAL_WRITE_UINT32(LEON_IFORCE(cpu), (mask));
+    
+    
+    /* for (i = 0; i < HAL_SMP_CPU_COUNT(); i++) { */
+/*       HAL_READ_UINT32(LEON_IMASK(i),v); */
+/*       masksaved[i] = v; */
+/*       HAL_WRITE_UINT32(LEON_IMASK(i), (v & ~(mask))); */
+/*     } */
+    
+/*     HAL_READ_UINT32(LEON_IMASK(cpu),v); */
+/*     HAL_WRITE_UINT32(LEON_IMASK(cpu), (v | (mask))); */
+/*     HAL_READ_UINT32(LEON_IFORCE(cpu),v); */
+/*     HAL_WRITE_UINT32(LEON_IFORCE(cpu), (v | (mask))); */
+
+/*     /\*do { */
+/*       HAL_READ_UINT32(LEON_IFORCE(cpu),force); */
+/*       } while( (force & mask) != 0 ); *\/ */
+
+/*     for (i = 0; i < HAL_SMP_CPU_COUNT(); i++) { */
+/*       HAL_WRITE_UINT32(LEON_IMASK(i), (masksaved[i])); */
+/*     } */
+    
+    HAL_SPINLOCK_CLEAR( cyg_hal_smp_smpirq_lock );
+    
+    HAL_RESTORE_INTERRUPTS( istate );
+}
+    
+#endif
diff -Naur ecos-rep-ori/packages/hal/sparc/leon3/current/src/hal_priv.c ecos-rep/packages/hal/sparc/leon3/current/src/hal_priv.c
--- ecos-rep-ori/packages/hal/sparc/leon3/current/src/hal_priv.c	1970-01-01 01:00:00.000000000 +0100
+++ ecos-rep/packages/hal/sparc/leon3/current/src/hal_priv.c	2005-07-26 18:08:47.000000000 +0200
@@ -0,0 +1,117 @@
+//===========================================================================
+//
+//      hal_priv.c
+//
+//      SPARC Architecture LEON3-specific private variables
+//
+//===========================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//===========================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):    hmt
+// Contributors: hmt
+// Date:         1999-02-20
+// Purpose:      private vars for LEON3 processor.
+//              
+//####DESCRIPTIONEND####
+//
+//===========================================================================
+
+
+#include <cyg/hal/hal_intr.h>
+#include <cyg/hal/hal_arch.h>
+#include <cyg/hal/hal_leon3.h>
+#include <cyg/hal/hal_smp.h>
+
+// ------------------------------------------------------------------------
+// Clock static to keep period recorded.
+cyg_int32 cyg_hal_sparc_clock_period = 0;
+
+// ------------------------------------------------------------------------
+// Board specific startups.
+
+extern void hal_board_prestart( void );
+extern void hal_board_poststart( void );
+
+static void leon2_eth_init(void)
+{
+     
+}
+    
+void hal_board_prestart( void )
+{
+
+//#ifdef CYGPKG_DEVS_ETH_SPARC_LEON
+    leon2_eth_init();
+//#endif
+}
+
+void hal_board_poststart( void )
+{
+
+  amba_init();
+
+  HAL_ENABLE_INTERRUPTS();
+}
+
+cyg_uint32
+hal_lsbit_index(cyg_uint32 mask)
+{
+    int i;
+    for (i = 0;  i < 32;  i++) {
+	if (mask & (1<<i)) return ((cyg_uint32)i);
+    }
+    return ((cyg_uint32)-1);
+}
+
+cyg_uint32
+hal_msbit_index(cyg_uint32 mask)
+{
+    int i;
+    for (i = 31;  i >= 0;  i--) {
+        if (mask & (1<<i)) return ((cyg_uint32)i);
+    }
+    return ((cyg_uint32)-1);
+}
+
+void
+hal_idle_thread_action(cyg_uint32 loop_count)
+{
+  __asm__ volatile ("mov %g0, %asr19");
+   
+  //*((volatile cyg_uint32 *) 0x80000018) = 0;
+}
+
+// EOF hal_priv.c
diff -Naur ecos-rep-ori/packages/hal/sparc/leon3/current/src/leon3_smp.c ecos-rep/packages/hal/sparc/leon3/current/src/leon3_smp.c
--- ecos-rep-ori/packages/hal/sparc/leon3/current/src/leon3_smp.c	1970-01-01 01:00:00.000000000 +0100
+++ ecos-rep/packages/hal/sparc/leon3/current/src/leon3_smp.c	2005-07-26 18:08:47.000000000 +0200
@@ -0,0 +1,385 @@
+//===========================================================================
+//
+//      hal_amba.c
+//
+//      SPARC Architecture LEON3-specific private variables
+//
+//===========================================================================
+//####ECOSGPLCOPYRIGHTBEGIN####
+// -------------------------------------------
+// This file is part of eCos, the Embedded Configurable Operating System.
+// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
+//
+// eCos is free software; you can redistribute it and/or modify it under
+// the terms of the GNU General Public License as published by the Free
+// Software Foundation; either version 2 or (at your option) any later version.
+//
+// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
+// WARRANTY; without even the implied warranty of MERCHANTABILITY or
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+// for more details.
+//
+// You should have received a copy of the GNU General Public License along
+// with eCos; if not, write to the Free Software Foundation, Inc.,
+// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+//
+// As a special exception, if other files instantiate templates or use macros
+// or inline functions from this file, or you compile this file and link it
+// with other works to produce a work based on this file, this file does not
+// by itself cause the resulting work to be covered by the GNU General Public
+// License. However the source code for this file must still be made available
+// in accordance with section (3) of the GNU General Public License.
+//
+// This exception does not invalidate any other reasons why a work based on
+// this file might be covered by the GNU General Public License.
+//
+// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
+// at http://sources.redhat.com/ecos/ecos-license/
+// -------------------------------------------
+//####ECOSGPLCOPYRIGHTEND####
+//===========================================================================
+//#####DESCRIPTIONBEGIN####
+//
+// Author(s):    Gaisler Research (Konrad Eisele<eiselekd@web.de>)
+// Contributors: 
+// Date:         2004
+// Purpose:      private amba for LEON3 processor.
+//              
+//####DESCRIPTIONEND####
+//
+//===========================================================================
+
+#ifdef CYGPKG_KERNEL
+#include <pkgconf/kernel.h>
+#endif
+
+#include <cyg/infra/cyg_type.h>         // Base types
+#include <cyg/infra/cyg_trac.h>         // tracing macros
+#include <cyg/infra/cyg_ass.h>          // assertion macros
+#include <cyg/infra/diag.h>
+
+#include <cyg/hal/hal_intr.h>
+#include <cyg/hal/hal_io.h> 
+#include <cyg/hal/hal_smp.h>
+#include <cyg/hal/hal_cache.h> 
+
+#ifndef BUG
+#define BUG() do { diag_printf("BUG() at %s %d\n", __FILE__, __LINE__);  while(1); } while (1)
+#endif
+
+__externC void cyg_scheduler_set_need_reschedule(void);
+__externC void cyg_scheduler_timeslice_cpu(void);
+
+cyg_uint32 sparc_leon3_get_cpuid(void)
+{
+	unsigned int id;
+	__asm__ __volatile__(
+		"rd     %%asr17,%0\n\t"
+	: "=r" (id) : );
+
+	return ((id >> 28) & 0xff);
+}
+
+
+extern __inline__ void __delay(unsigned long loops)
+{
+	__asm__ __volatile__("cmp %0, 0\n\t"
+			     "1: bne 1b\n\t"
+			     "subcc %0, 1, %0\n" :
+			     "=&r" (loops) :
+			     "0" (loops) :
+			     "cc");
+}
+ 
+#ifdef CYGPKG_HAL_SMP_SUPPORT
+
+volatile unsigned int cyg_hal_smp_cpu_running;
+CYG_WORD32 cyg_hal_smp_cpu_running_count;
+externC CYG_WORD32 *__interrupt_stack_vector[HAL_SMP_CPU_MAX];
+externC CYG_WORD32 __interrupt_stack_first;
+
+#define CYG_HAL_CPU_MARKRUNNING(c) cyg_hal_smp_cpu_running |= (1 << c);
+#define CYG_HAL_CPU_ISRUNNING(c) (cyg_hal_smp_cpu_running & (1 << c))
+
+/* master(cpu 0) coming up from arch/vector.S: after locore init, before cyg_start(). */
+__externC void cyg_hal_smp_init(void) {
+    HAL_SMP_CPU_TYPE cpu;
+    unsigned long cfg = sparc_leon3_get_dcachecfg();
+    cyg_hal_smp_cpu_running = 0;
+
+    //leon3smp_diag_printf("Master Cpu %d came up\n",HAL_SMP_CPU_THIS());
+    
+    if (cfg & ASI_LEON3_SYSCTRL_CFG_SNOOPING) {
+      sparc_leon3_enable_snooping();
+    } else {
+      leon3smp_diag_printf("You have to enable snooping in the vhdl model or disable caches\n");     
+      sparc_leon3_disable_cache();
+    }
+
+    for( cpu = 0; cpu < HAL_SMP_CPU_MAX; cpu++ )  {
+        if( cpu == HAL_SMP_CPU_THIS() ) {
+          CYG_HAL_CPU_MARKRUNNING(cpu);
+          cyg_hal_smp_cpu_running_count++;
+	}
+	__interrupt_stack_vector[cpu] = (((unsigned int)(&__interrupt_stack_first)) + 
+					 (CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE * cpu) + 
+					 CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE);
+        diag_printf("Interrupt stack(%d): 0x%x-0x%x\n",cpu,
+                    __interrupt_stack_vector[cpu], 
+                    ((unsigned int)__interrupt_stack_vector[cpu])+CYGNUM_HAL_COMMON_INTERRUPTS_STACK_SIZE);
+    }
+
+}
+ 
+/* release the slaves that are idling , they'll come up at cyg_hal_smp_startup() */
+void cyg_hal_cpu_reset(HAL_SMP_CPU_TYPE cpu) {
+
+  //leon3smp_diag_printf("Try to bring Cpu %d up\n",cpu);
+
+  if (!CYG_HAL_CPU_ISRUNNING(cpu)) {
+    //reset cpu
+    LEON3_IrqCtrl_Regs->mpstatus = 1<<cpu;
+    //while(cyg_hal_smp_cpu_running[cpu] == 0) {
+    //  continue;
+    //}
+  }
+}
+
+cyg_uint32 cyg_hal_smp_cpu_count2idx(cyg_uint32 n) {
+  int idx = -1;
+  if (n >= cyg_hal_smp_cpu_running_count) {
+    BUG();
+  }
+  do {
+    idx++;
+    while(! CYG_HAL_CPU_ISRUNNING(idx)) {
+      idx++;
+    }
+  } while (n--);
+  if (idx >= HAL_SMP_CPU_MAX) {
+    diag_printf("idx(%d)>=HAL_SMP_CPU_MAX(%d)\n",idx,HAL_SMP_CPU_MAX);
+    BUG();
+  }
+  return idx;
+}
+
+cyg_uint32 cyg_hal_smp_cpu_idx2count(cyg_uint32 n) {
+  int i, c = 0;
+  if (n >= HAL_SMP_CPU_MAX || !CYG_HAL_CPU_ISRUNNING(n)) {
+    diag_printf("n(%d)>=HAL_SMP_CPU_MAX(%d) || !CYG_HAL_CPU_ISRUNNING(n)\n",n,HAL_SMP_CPU_MAX);
+    BUG();
+  }
+  for (i = 0; i < n;i++) {
+    if (CYG_HAL_CPU_ISRUNNING(i)) {
+      c++;
+    }
+  }
+  if (c >= cyg_hal_smp_cpu_running_count) {
+    diag_printf("c(%d)>=cyg_hal_smp_cpu_running_count(%d)\n",c,cyg_hal_smp_cpu_running_count);
+    BUG(); }
+  return c;
+}
+
+int cyg_hal_smp_cpu_count(void) {
+  int i = 0,cpu = 0;
+  for( cpu = 0; cpu < HAL_SMP_CPU_MAX; cpu++ )  {
+    if (CYG_HAL_CPU_ISRUNNING(cpu)) {
+      i++;
+    };
+  }
+  return i;
+}
+
+
+externC void cyg_kernel_smp_startup(void);
+
+/* slave cpus coming from vector.S:wakeup write to mpirq->mpstatus */
+__externC void cyg_hal_smp_startup(void)
+{
+    HAL_SMP_CPU_TYPE cpu = HAL_SMP_CPU_THIS();
+    CYG_HAL_CPU_MARKRUNNING(cpu);
+    unsigned long cfg = sparc_leon3_get_dcachecfg();
+
+    //leon3smp_diag_printf("Slave Cpu %d came up\n",cpu);
+    
+    if (cfg & ASI_LEON3_SYSCTRL_CFG_SNOOPING) {
+      sparc_leon3_enable_snooping();
+    } else {
+      leon3smp_diag_printf("You have to enable snooping in the vhdl model or disable caches\n");
+      sparc_leon3_disable_cache();
+    }
+
+    cyg_hal_smp_cpu_running_count++;
+    cyg_kernel_smp_startup();
+}
+
+
+/*------------------------------------------------------------------------*/
+// SMP message buffers.
+// SMP CPUs pass messages to eachother via a small circular buffer
+// protected by a spinlock. Each message is a single 32 bit word with
+// a type code in the top 4 bits and any argument in the remaining
+// 28 bits.
+
+#define SMP_MSGBUF_SIZE 4
+
+static struct smp_msg_t
+{
+    HAL_SPINLOCK_TYPE           lock;           // protecting spinlock
+    volatile CYG_WORD32         msgs[SMP_MSGBUF_SIZE]; // message buffer
+    volatile CYG_WORD32         head;           // head of list
+    volatile CYG_WORD32         tail;           // tail of list
+    volatile CYG_WORD32         reschedule;     // reschedule request
+    volatile CYG_WORD32         timeslice;      // timeslice request
+} smp_msg[HAL_SMP_CPU_MAX];
+
+void cyg_hal_cpu_message( HAL_SMP_CPU_TYPE cpu,
+			  CYG_WORD32 msg,
+			  CYG_WORD32 arg,
+			  CYG_WORD32 wait) {
+    CYG_INTERRUPT_STATE istate;    
+    struct smp_msg_t *m = &smp_msg[cpu];
+    int i;
+    //HAL_SMP_CPU_TYPE me = HAL_SMP_CPU_THIS();
+
+    //leon3smp_diag_printf("Cpu %d send to %d: %x \n",HAL_SMP_CPU_THIS(),cpu,msg);
+
+    
+    HAL_DISABLE_INTERRUPTS( istate );
+    
+    // Get access to the message buffer for the selected CPU
+    HAL_SPINLOCK_SPIN( m->lock );
+    
+    if( msg == HAL_SMP_MESSAGE_RESCHEDULE )
+        m->reschedule = true;
+    else if( msg == HAL_SMP_MESSAGE_TIMESLICE )
+        m->timeslice = true;
+    else
+    {
+        CYG_WORD32 next = (m->tail + 1) & (SMP_MSGBUF_SIZE-1);
+        // If the buffer is full, wait for space to appear in it.
+        // This should only need to be done very rarely.
+        while( next == m->head ) {
+            HAL_SPINLOCK_CLEAR( m->lock );
+            for( i = 0; i < 1000; i++ );
+            HAL_SPINLOCK_SPIN( m->lock );        
+        }
+        m->msgs[m->tail] = msg | arg;
+        m->tail = next;
+    }
+    
+    // Now send an interrupt to the CPU.
+    //if( cyg_hal_smp_cpu_running[cpu] ) {
+    leon3_smpirq_raise(cpu);
+    //}
+    
+    HAL_SPINLOCK_CLEAR( m->lock );
+    
+    // If we are expected to wait for the command to complete, then
+    // spin here until it does. We actually wait for the destination
+    // CPU to empty its input buffer. So we might wait for messages
+    // from other CPUs as well. But this is benign.
+    
+    while(wait) {
+        for( i = 0; i < 1000; i++ );
+        HAL_SPINLOCK_SPIN( m->lock );
+        if( m->head == m->tail )
+            wait = false;
+        HAL_SPINLOCK_CLEAR( m->lock );
+    } 
+
+    HAL_RESTORE_INTERRUPTS( istate );
+  
+}
+
+
+/*------------------------------------------------------------------------*/
+__externC CYG_WORD32 cyg_hal_cpu_message_isr( CYG_WORD32 vector, CYG_ADDRWORD data )
+{
+    HAL_SMP_CPU_TYPE me = HAL_SMP_CPU_THIS();
+    struct smp_msg_t *m = &smp_msg[me];
+    CYG_WORD32 ret = 1;
+    CYG_INTERRUPT_STATE istate;
+    
+    HAL_DISABLE_INTERRUPTS( istate );
+    
+    HAL_SPINLOCK_SPIN( m->lock );
+
+    // First, acknowledge the interrupt.
+    
+    HAL_INTERRUPT_ACKNOWLEDGE( vector );
+
+    if( m->reschedule || m->timeslice )
+        ret |= 2;               // Ask for the DSR to be called.
+    
+    // Now pick messages out of the buffer and handle them
+    
+    while( m->head != m->tail )
+    {
+        CYG_WORD32 msg = m->msgs[m->head];
+
+        switch( msg & HAL_SMP_MESSAGE_TYPE )
+        {
+        case HAL_SMP_MESSAGE_RESCHEDULE:
+            ret |= 2;           // Ask for the DSR to be called.
+            break;
+        case HAL_SMP_MESSAGE_MASK:
+            break;
+        case HAL_SMP_MESSAGE_UNMASK:
+            break;
+        case HAL_SMP_MESSAGE_REVECTOR:
+            break;
+        }
+
+        // Update the head pointer after handling the message, so that
+        // the wait in cyg_hal_cpu_message() completes after the action
+        // requested.
+        m->head = (m->head + 1) & (SMP_MSGBUF_SIZE-1);
+    }
+
+    HAL_SPINLOCK_CLEAR( m->lock );    
+
+    HAL_RESTORE_INTERRUPTS( istate );
+
+    return ret;
+}
+
+
+/*------------------------------------------------------------------------*/
+// CPU message DSR.
+// This is only executed if the message was
+// HAL_SMP_MESSAGE_RESCHEDULE. It calls up into the kernel to effect a
+// reschedule.
+
+__externC CYG_WORD32 cyg_hal_cpu_message_dsr( CYG_WORD32 vector, CYG_ADDRWORD data )
+{
+    HAL_SMP_CPU_TYPE me = HAL_SMP_CPU_THIS();
+    struct smp_msg_t *m = &smp_msg[me];
+    CYG_INTERRUPT_STATE istate;
+    CYG_WORD32 reschedule, timeslice;
+    
+    HAL_DISABLE_INTERRUPTS( istate );
+    HAL_SPINLOCK_SPIN( m->lock );
+
+    reschedule = m->reschedule;
+    timeslice = m->timeslice;
+    m->reschedule = m->timeslice = false;
+
+    HAL_SPINLOCK_CLEAR( m->lock );    
+    HAL_RESTORE_INTERRUPTS( istate );
+        
+    if( reschedule )
+    {
+      //leon3smp_diag_printf("Cpu %d received reshedule\n",HAL_SMP_CPU_THIS());
+      cyg_scheduler_set_need_reschedule();
+    }
+    if( timeslice )
+    {
+      //leon3smp_diag_printf("Cpu %d received timeslice\n",HAL_SMP_CPU_THIS());
+      cyg_scheduler_timeslice_cpu();
+    }
+
+    return 0;
+}
+
+#endif //CYGPKG_HAL_SMP_SUPPORT
diff -Naur ecos-rep-ori/packages/hal/sparc/leon3/current/support/README ecos-rep/packages/hal/sparc/leon3/current/support/README
--- ecos-rep-ori/packages/hal/sparc/leon3/current/support/README	1970-01-01 01:00:00.000000000 +0100
+++ ecos-rep/packages/hal/sparc/leon3/current/support/README	2005-07-26 18:08:47.000000000 +0200
@@ -0,0 +1,32 @@
+
+LEON/TSIM Support
+=================
+
+See <http://www.gaisler.com> for information about the TSIM
+simulator and Leon project per se.
+
+The simulator TSIM can be run "as one" with GDB by using the
+script do-gdb-sim in this directory.  The script can be used in
+automated testing systems to run as if it were embedded within
+GDB.  It contains:
+
+----------------------------------------------------------------
+#! /bin/csh
+tsim-leon -nfp -gdb >& /dev/stdout &
+sparc-rtems-gdb -nw -nx $*:q
+----------------------------------------------------------------
+
+which simply runs tsim in background, directing its output to the
+common stdout.
+
+The command to connect to the simulator target will be
+
+        (gdb) target remote localhost:1234
+
+This fully described in the TSIM documentation from
+  (home)        <http://www.gaisler.com/tsim.html>
+  (flyer)       <http://www.gaisler.com/doc/tsim-erc32.pdf>
+  (doc)         <http://www.gaisler.com/doc/tsim-1.0.18.pdf>
+
+
+
diff -Naur ecos-rep-ori/packages/hal/sparc/leon3/current/support/do-gdb-sim ecos-rep/packages/hal/sparc/leon3/current/support/do-gdb-sim
--- ecos-rep-ori/packages/hal/sparc/leon3/current/support/do-gdb-sim	1970-01-01 01:00:00.000000000 +0100
+++ ecos-rep/packages/hal/sparc/leon3/current/support/do-gdb-sim	2005-07-26 18:08:47.000000000 +0200
@@ -0,0 +1,3 @@
+#! /bin/csh
+tsim-leon -nfp -gdb >& /dev/stdout &
+sparc-rtems-gdb -nw -nx $*:q
diff -Naur ecos-rep-ori/packages/hal/i386/arch/current/include/hal_smp.h ecos-rep/packages/hal/i386/arch/current/include/hal_smp.h
--- ecos-rep-ori/packages/hal/i386/arch/current/include/hal_smp.h	2005-07-26 17:57:15.000000000 +0200
+++ ecos-rep/packages/hal/i386/arch/current/include/hal_smp.h	2005-07-26 18:08:48.000000000 +0200
@@ -156,6 +156,12 @@
 
 #define HAL_SMP_CPU_COUNT()     cyg_hal_smp_cpu_count
 
+#define HAL_SMP_CPU_START_COUNT() HAL_SMP_CPU_COUNT()
+     
+#define HAL_SMP_CPU_COUNT2IDX(n)  (n)
+
+#define HAL_SMP_CPU_IDX2COUNT(n)  (n)
+
 #define HAL_SMP_CPU_THIS()                      \
 ({                                              \
     HAL_SMP_CPU_TYPE __id;                      \
diff -Naur -x tests -x tests_smp -x kernel.cdl ecos-rep-ori/packages/kernel/current/include/smp.hxx ecos-rep/packages/kernel/current/include/smp.hxx
--- ecos-rep-ori/packages/kernel/current/include/smp.hxx	2005-07-26 17:57:21.000000000 +0200
+++ ecos-rep/packages/kernel/current/include/smp.hxx	2005-07-26 18:08:48.000000000 +0200
@@ -88,6 +88,8 @@
 
 #define CYG_KERNEL_CPU_COUNT()          HAL_SMP_CPU_COUNT()
 
+#define CYG_KERNEL_CPU_START_COUNT()    HAL_SMP_CPU_START_COUNT()
+
 #define CYG_KERNEL_CPU_THIS()           HAL_SMP_CPU_THIS()
 
 #define CYG_KERNEL_CPU_NONE             HAL_SMP_CPU_NONE
diff -Naur -x tests -x tests_smp -x kernel.cdl ecos-rep-ori/packages/kernel/current/src/sched/mlqueue.cxx ecos-rep/packages/kernel/current/src/sched/mlqueue.cxx
--- ecos-rep-ori/packages/kernel/current/src/sched/mlqueue.cxx	2005-07-26 17:57:21.000000000 +0200
+++ ecos-rep/packages/kernel/current/src/sched/mlqueue.cxx	2005-07-26 18:08:48.000000000 +0200
@@ -350,7 +350,8 @@
 
     for(int i = 0; i < cpu_count; i++)
     {
-        HAL_SMP_CPU_TYPE cpu = (i + cpu_this) % cpu_count;
+        HAL_SMP_CPU_TYPE cpu =
+          HAL_SMP_CPU_COUNT2IDX ( (i + HAL_SMP_CPU_IDX2COUNT( cpu_this ) ) % cpu_count );
        
         // If a CPU is not already marked for rescheduling, and its
         // current thread is of lower priority than _thread_, then
@@ -464,12 +465,15 @@
 
 #ifdef CYGPKG_KERNEL_SMP_SUPPORT
 
+    int c;
     HAL_SMP_CPU_TYPE cpu;
     HAL_SMP_CPU_TYPE cpu_count = CYG_KERNEL_CPU_COUNT();
     HAL_SMP_CPU_TYPE cpu_this = CYG_KERNEL_CPU_THIS();
     
-    for( cpu = 0; cpu < cpu_count; cpu++ )
+    for( c = 0; c < cpu_count; c++ )
     {
+        cpu = HAL_SMP_CPU_COUNT2IDX(c);
+      
         if( --timeslice_count[cpu] == 0 )
             if( cpu == cpu_this )
                 timeslice_cpu();
diff -Naur -x tests -x tests_smp -x kernel.cdl ecos-rep-ori/packages/kernel/current/src/sched/sched.cxx ecos-rep/packages/kernel/current/src/sched/sched.cxx
--- ecos-rep-ori/packages/kernel/current/src/sched/sched.cxx	2005-07-26 17:57:21.000000000 +0200
+++ ecos-rep/packages/kernel/current/src/sched/sched.cxx	2005-07-26 18:08:48.000000000 +0200
@@ -321,7 +321,7 @@
 
     HAL_SMP_CPU_TYPE cpu;
     
-    for( cpu = 0; cpu < CYG_KERNEL_CPU_COUNT(); cpu++ )
+    for( cpu = 0; cpu < CYG_KERNEL_CPU_START_COUNT(); cpu++ )
     {
         // Don't start this CPU, it is running already!
         if( cpu == CYG_KERNEL_CPU_THIS() )
--- ecos-rep-ori/packages/kernel/current/tests/tm_basic.cxx	2005-07-26 17:57:22.000000000 +0200
+++ ecos-rep/packages/kernel/current/tests/tm_basic.cxx	2005-07-26 18:08:48.000000000 +0200
@@ -88,7 +88,7 @@
 
 #define STACK_SIZE CYGNUM_HAL_STACK_SIZE_MINIMUM
 
-#ifdef CYGMEM_REGION_ram_SIZE
+#if defined(CYGMEM_REGION_ram_SIZE) && !(defined(CYGPKG_HAL_SPARC_LEON3_OPTIONS) || defined(CYGPKG_HAL_SPARC_LEON_OPTIONS))
 #define CYG_THREAD_OVERHEAD  (STACK_SIZE+sizeof(cyg_thread)+(sizeof(fun_times)*2))
 #define NTEST_THREADS        ((CYGMEM_REGION_ram_SIZE/16)/CYG_THREAD_OVERHEAD)
 #define CYG_MUTEX_OVERHEAD   (sizeof(cyg_mutex_t)+sizeof(fun_times))

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