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Re: eCos + LPC21xx footprint
However, we shouldn't have platform/variant specific ifdefs in
vectors.S. Also, a problem with your approach is that it assumes
that the vectors will remain constant. This is true of the interrupt
and exception vectors, however, the contents of the reset vector may
change depending on memory layout.
You mean by the use of the CYGSEM_HAL_ROM_RESET_USES_JUMP switch ?
1) With Andrew's proposed CDL soulution this could be handled in the LPC cdl
having different requires for the different startup modes.
2) I am just looking at CYGSEM_HAL_ROM_RESET_USES_JUMP and I cannot figure out why it is
// Assumption: ROM code has these vectors at the hardware reset address.
// A simple jump removes any address-space dependencies [i.e. safer]
b reset_vector // 0x00
ldr pc,.reset_vector // 0x00
Which targets need this? I blindly copied it from the AT91 hal.
I disabled it now and the app works using the ldr.
So if I don't define this switch at all there should be not reset vector differences
right? I see that the xscales do not use it either.