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PowerPC - fix baud rate calculations


-- 
Gary Thomas <gary@mlbassoc.com>
MLB Associates
Index: hal/powerpc/mpc8xxx/current/ChangeLog
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/hal/powerpc/mpc8xxx/current/ChangeLog,v
retrieving revision 1.2
diff -u -5 -p -r1.2 ChangeLog
--- hal/powerpc/mpc8xxx/current/ChangeLog	26 Aug 2003 17:04:02 -0000	1.2
+++ hal/powerpc/mpc8xxx/current/ChangeLog	8 Sep 2003 14:52:17 -0000
@@ -1,5 +1,10 @@
+2003-09-08  Gary Thomas  <gary@mlbassoc.com>
+
+	* src/quicc2_diag.c: Fix baud rate clock setup - was off by 1.
+	Reported by Tord Andersson <Tord.Andersson@combitechsystems.com>
+
 2003-08-26  Gary Thomas  <gary@mlbassoc.com>
 
 	* include/mpc8xxx.h: Flesh out PCI definitions.
 
 2003-08-19  Gary Thomas  <gary@mlbassoc.com>
Index: hal/powerpc/mpc8xxx/current/src/quicc2_diag.c
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/hal/powerpc/mpc8xxx/current/src/quicc2_diag.c,v
retrieving revision 1.1
diff -u -5 -p -r1.1 quicc2_diag.c
--- hal/powerpc/mpc8xxx/current/src/quicc2_diag.c	19 Aug 2003 17:29:48 -0000	1.1
+++ hal/powerpc/mpc8xxx/current/src/quicc2_diag.c	8 Sep 2003 14:44:22 -0000
@@ -116,11 +116,11 @@ static struct port_info ports[] = {
 };
 
 // For Baud Rate Calculation, see MPC8260 PowerQUICC II User's Manual
 // 16.3 UART Baud Rate Examples, page 16-5.
 #define UART_BIT_RATE(n) \
-    (((int)(((CYGHWR_HAL_POWERPC_CPM_SPEED*2)*1000000)/16))/(n * 16))
+    ((((int)(((CYGHWR_HAL_POWERPC_CPM_SPEED*2)*1000000)/16))/(n * 16))-1)
 #define UART_BAUD_RATE CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD
 
 
 // Function prototypes
 static cyg_uint8 cyg_hal_plf_serial_getc(void* __ch_data);
Index: hal/powerpc/quicc/current/ChangeLog
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/hal/powerpc/quicc/current/ChangeLog,v
retrieving revision 1.34
diff -u -5 -p -r1.34 ChangeLog
--- hal/powerpc/quicc/current/ChangeLog	31 Mar 2003 15:50:48 -0000	1.34
+++ hal/powerpc/quicc/current/ChangeLog	8 Sep 2003 14:52:30 -0000
@@ -1,5 +1,10 @@
+2003-09-08  Gary Thomas  <gary@mlbassoc.com>
+
+	* src/quicc_smc1.c: Fix baud rate clock setup - was off by 1.
+	Reported by Tord Andersson <Tord.Andersson@combitechsystems.com>
+
 2003-03-31  Gary Thomas  <gary@mlbassoc.com>
 
 	* src/quicc_smc1.c (cyg_hal_sccx_init_channel): Proper handling
 	(signal routing) for SCC3 - differs on 850 and 850T!
 
Index: hal/powerpc/quicc/current/src/quicc_smc1.c
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/hal/powerpc/quicc/current/src/quicc_smc1.c,v
retrieving revision 1.28
diff -u -5 -p -r1.28 quicc_smc1.c
--- hal/powerpc/quicc/current/src/quicc_smc1.c	31 Mar 2003 15:50:48 -0000	1.28
+++ hal/powerpc/quicc/current/src/quicc_smc1.c	8 Sep 2003 14:44:03 -0000
@@ -71,11 +71,11 @@
 #include <cyg/hal/hal_if.h>             // Calling interface definitions
 #include <cyg/hal/hal_misc.h>           // Helper functions
 #include <cyg/hal/drv_api.h>            // CYG_ISR_HANDLED
 #include <string.h>                     // memset
 
-#define UART_BIT_RATE(n) (((int)(CYGHWR_HAL_POWERPC_BOARD_SPEED*1000000)/16)/n)
+#define UART_BIT_RATE(n) ((((int)(CYGHWR_HAL_POWERPC_BOARD_SPEED*1000000)/16)/n)-1)
 #define UART_BAUD_RATE CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD
 
 // Note: buffers will be placed just after descriptors
 // Sufficient space should be provided between descrptors
 // for the buffers (single characters)
Index: devs/serial/powerpc/quicc/current/ChangeLog
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/devs/serial/powerpc/quicc/current/ChangeLog,v
retrieving revision 1.18
diff -u -5 -p -r1.18 ChangeLog
--- devs/serial/powerpc/quicc/current/ChangeLog	31 Mar 2003 15:50:57 -0000	1.18
+++ devs/serial/powerpc/quicc/current/ChangeLog	8 Sep 2003 14:52:42 -0000
@@ -1,5 +1,10 @@
+2003-09-08  Gary Thomas  <gary@mlbassoc.com>
+
+	* src/quicc_smc_serial.h: Fix baud rate clock setup - was off by 1.
+	Reported by Tord Andersson <Tord.Andersson@combitechsystems.com>
+
 2003-03-31  Gary Thomas  <gary@mlbassoc.com>
 
 	* src/quicc_smc_serial.c (quicc_sxx_serial_init): Handle SCC3 on
 	various processors (signal routing differs).
 
Index: devs/serial/powerpc/quicc/current/src/quicc_smc_serial.h
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/devs/serial/powerpc/quicc/current/src/quicc_smc_serial.h,v
retrieving revision 1.5
diff -u -5 -p -r1.5 quicc_smc_serial.h
--- devs/serial/powerpc/quicc/current/src/quicc_smc_serial.h	23 Mar 2003 16:21:40 -0000	1.5
+++ devs/serial/powerpc/quicc/current/src/quicc_smc_serial.h	8 Sep 2003 14:48:56 -0000
@@ -128,11 +128,11 @@ static cyg_int32 select_baud[] = {
     57600,  // 57600
     115200, // 115200
     0,      // 230400
 };
 
-#define UART_BITRATE(n) (((CYGHWR_HAL_POWERPC_BOARD_SPEED*1000000)/16)/n)
+#define UART_BITRATE(n) ((((CYGHWR_HAL_POWERPC_BOARD_SPEED*1000000)/16)/n)-1)
 #define UART_SLOW_BITRATE(n) ((CYGHWR_HAL_POWERPC_BOARD_SPEED*1000000)/n))
 
 // Channel type select
 #define _SCC_CHAN 0
 #define _SMC_CHAN 1
Index: devs/serial/powerpc/quicc2/current/ChangeLog
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/devs/serial/powerpc/quicc2/current/ChangeLog,v
retrieving revision 1.3
diff -u -5 -p -r1.3 ChangeLog
--- devs/serial/powerpc/quicc2/current/ChangeLog	24 Feb 2003 14:19:05 -0000	1.3
+++ devs/serial/powerpc/quicc2/current/ChangeLog	8 Sep 2003 14:52:51 -0000
@@ -1,5 +1,10 @@
+2003-09-08  Gary Thomas  <gary@mlbassoc.com>
+
+	* src/quicc2_scc_serial.h: Fix baud rate clock setup - was off by 1.
+	Reported by Tord Andersson <Tord.Andersson@combitechsystems.com>
+
 2003-02-24  Jonathan Larmour  <jifl@eCosCentric.com>
 
 	* cdl/ser_quicc2_scc.cdl: Remove irrelevant doc link.
 
 2003-01-24  Gary Thomas  <gary@mlbassoc.com> (inspired by)
Index: devs/serial/powerpc/quicc2/current/src/quicc2_scc_serial.h
===================================================================
RCS file: /misc/cvsfiles/ecos/packages/devs/serial/powerpc/quicc2/current/src/quicc2_scc_serial.h,v
retrieving revision 1.2
diff -u -5 -p -r1.2 quicc2_scc_serial.h
--- devs/serial/powerpc/quicc2/current/src/quicc2_scc_serial.h	24 Jan 2003 15:13:25 -0000	1.2
+++ devs/serial/powerpc/quicc2/current/src/quicc2_scc_serial.h	8 Sep 2003 14:48:55 -0000
@@ -58,11 +58,11 @@
 
 // macro for aligning buffers to cache lines
 #define ALIGN_TO_CACHELINES(b) ((cyg_uint8 *)(((CYG_ADDRESS)(b) + (HAL_DCACHE_LINE_SIZE-1)) & ~(HAL_DCACHE_LINE_SIZE-1)))
 
 #define UART_BIT_RATE(n) \
-    (((int)(CYGHWR_HAL_POWERPC_BOARD_SPEED*1000000))/(n * 64))
+    ((((int)(CYGHWR_HAL_POWERPC_BOARD_SPEED*1000000))/(n * 64))-1)
 
 // SCC PSMR masks ....
 #define QUICC2_SCC_PSMR_ASYNC     0x8000
 #define QUICC2_SCC_PSMR_SB(n)     ((n-1)<<14)  // Stop bits (1=1sb, 2=2sb)
 #define QUICC2_SCC_PSMR_CLEN(n)   ((n-5)<<12)  // Character Length (5-8)

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